src/mainboard/google/dedede/variants/beadrix/memory.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/variants.h>
   4 #include <baseboard/gpio.h>
   5 #include <gpio.h>
   6 #include <soc/meminit.h>
   7 #include <soc/romstage.h>
   8
   9 static const struct mb_cfg board_memcfg_cfg = {
  10         .dq_map[DDR_CH0] = {
  11                 {0xf, 0xf0},
  12                 {0xf, 0xf0},
  13                 {0xff, 0x0},
  14                 {0x0, 0x0},
  15                 {0x0, 0x0},
  16                 {0x0, 0x0}
  17         },
  18         .dq_map[DDR_CH1] = {
  19                 {0xf, 0xf0},
  20                 {0xf, 0xf0},
  21                 {0xff, 0x0},
  22                 {0x0, 0x0},
  23                 {0x00, 0x0},
  24                 {0x00, 0x0}
  25         },
  26
  27         /*
  28          * The dqs_map arrays map the ddr4 pins to the SoC pins
  29          * for both channels.
  30          *
  31          * the index = pin number on SoC
  32          * the value = pin number on LPDDR4 part
  33          */
  34         .dqs_map[DDR_CH0] = {0, 3, 2, 1, 7, 5, 4, 6},
  35         .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 7, 6, 5},
  36
  37         /* Disable Early Command Training */
  38         .ect = 1,
  39
  40         /* User Board Type */
  41         .UserBd = BOARD_TYPE_MOBILE,
  42 };
  43
  44 const struct mb_cfg *variant_memcfg_config(void)
  45 {
  46         return &board_memcfg_cfg;
  47 }