mainboard/intel/avenuecity_crb: Update full IIO configuration
[coreboot2.git] / src / mainboard / google / foster / bootblock.c
blobf7b5623d9d9e3d5e90d2ff4c37f3bc74c43b5684
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/mmio.h>
4 #include <bootblock_common.h>
5 #include <device/i2c_simple.h>
6 #include <soc/addressmap.h>
7 #include <soc/clk_rst.h>
8 #include <soc/clock.h>
9 #include <soc/funitcfg.h>
10 #include <soc/nvidia/tegra/i2c.h>
11 #include <soc/padconfig.h>
12 #include <soc/spi.h> /* FIXME: move back to soc code? */
14 #include "pmic.h"
16 static const struct pad_config pmic_pads[] = {
17 PAD_CFG_SFIO(PWR_I2C_SCL, PINMUX_INPUT_ENABLE, I2CPMU),
18 PAD_CFG_SFIO(PWR_I2C_SDA, PINMUX_INPUT_ENABLE, I2CPMU),
21 static const struct pad_config spiflash_pads[] = {
22 /* QSPI fLash: mosi, miso, clk, cs0, hold, wp */
23 PAD_CFG_SFIO(QSPI_IO0, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, QSPI),
24 PAD_CFG_SFIO(QSPI_IO1, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, QSPI),
25 PAD_CFG_SFIO(QSPI_SCK, PINMUX_INPUT_ENABLE, QSPI),
26 PAD_CFG_SFIO(QSPI_CS_N, PINMUX_INPUT_ENABLE, QSPI),
27 PAD_CFG_SFIO(QSPI_IO2, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, QSPI),
28 PAD_CFG_SFIO(QSPI_IO3, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, QSPI),
31 /********************* TPM ************************************/
32 static const struct pad_config tpm_pads[] = {
33 PAD_CFG_SFIO(GEN3_I2C_SCL, PINMUX_INPUT_ENABLE, I2C3),
34 PAD_CFG_SFIO(GEN3_I2C_SDA, PINMUX_INPUT_ENABLE, I2C3),
37 static const struct funit_cfg funits[] = {
38 /* PMIC on I2C5 (PWR_I2C* pads) at 400kHz. */
39 FUNIT_CFG(I2C5, PLLP, 400, pmic_pads, ARRAY_SIZE(pmic_pads)),
40 /* SPI flash at 24MHz on QSPI controller. */
41 FUNIT_CFG(QSPI, PLLP, 24000, spiflash_pads, ARRAY_SIZE(spiflash_pads)),
42 /* Foster has no TPM yet. This is for futurn TPM on I2C3 @ 400kHz. */
43 FUNIT_CFG(I2C3, PLLP, 400, tpm_pads, ARRAY_SIZE(tpm_pads)),
46 static const struct pad_config uart_console_pads[] = {
47 /* UARTA: tx, rx, rts, cts */
48 PAD_CFG_SFIO(UART1_TX, PINMUX_PULL_NONE, UARTA),
49 PAD_CFG_SFIO(UART1_RX, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UARTA),
50 PAD_CFG_SFIO(UART1_RTS, PINMUX_PULL_UP, UARTA),
51 PAD_CFG_SFIO(UART1_CTS, PINMUX_PULL_UP, UARTA),
54 void bootblock_mainboard_early_init(void)
56 soc_configure_pads(uart_console_pads, ARRAY_SIZE(uart_console_pads));
59 static void set_clock_sources(void)
61 /* UARTA gets PLLP, deactivate CLK_UART_DIV_OVERRIDE */
62 write32(CLK_RST_REG(clk_src_uarta), PLLP << CLK_SOURCE_SHIFT);
65 void bootblock_mainboard_init(void)
67 set_clock_sources();
69 soc_configure_funits(funits, ARRAY_SIZE(funits));
71 i2c_init(I2CPWR_BUS);
72 pmic_init(I2CPWR_BUS);
74 /* Foster has no TPM yet. This is for future TPM. */
75 i2c_init(I2C3_BUS);