1 chip soc
/intel
/apollolake
3 # Refer
to EDS
-Vol2
-16.32.
4 #
[14:8] steps of delay
for DDR mode
, each
125ps.
5 #
[6:0] steps of delay
for SDR mode
, each
125ps.
6 register
"emmc_tx_cmd_cntl" = "0x00000505"
9 # Refer
to EDS
-Vol2
-16.33.
10 #
[14:8] steps of delay
for HS400
, each
125ps.
11 #
[6:0] steps of delay
for SDR104
/HS200
, each
125ps.
12 register
"emmc_tx_data_cntl1" = "0x00000c0d"
14 # EMMC TX DATA Delay
2
15 # Refer
to EDS
-Vol2
-16.34.
16 #
[30:24] steps of delay
for SDR50
, each
125ps.
17 #
[22:16] steps of delay
for DDR50
, each
125ps.
18 #
[14:8] steps of delay
for SDR25
/HS50
, each
125ps.
19 #
[6:0] steps of delay
for SDR12
, each
125ps.
20 register
"emmc_tx_data_cntl2" = "0x1c2a2a2a"
22 # EMMC RX CMD
/DATA Delay
1
23 # Refer
to EDS
-Vol2
-16.35.
24 #
[30:24] steps of delay
for SDR50
, each
125ps.
25 #
[22:16] steps of delay
for DDR50
, each
125ps.
26 #
[14:8] steps of delay
for SDR25
/HS50
, each
125ps.
27 #
[6:0] steps of delay
for SDR12
, each
125ps.
28 register
"emmc_rx_cmd_data_cntl1" = "0x00181b1b"
30 # EMMC RX CMD
/DATA Delay
2
31 # Refer
to EDS
-Vol2
-16.37.
32 #
[17:16] stands
for Rx Clock before Output Buffer
33 #
[14:8] steps of delay
for Auto Tuning Mode
, each
125ps.
34 #
[6:0] steps of delay
for HS200
, each
125ps.
35 register
"emmc_rx_cmd_data_cntl2" = "0x0001000f"
37 # EMMC Rx Strobe Delay
38 # Refer
to EDS
-Vol2
-16.36.
39 #
[14:8] Rx Strobe Delay DLL
1(HS400 Mode
), each
125ps.
40 #
[6:0] Rx Strobe Delay DLL
2(HS400 Mode
), each
125ps.
41 register
"emmc_rx_strobe_cntl" = "0x00000a0a"
43 # Override USB2 PER PORT register
(PORT
4)
44 register
"usb2eye[4]" = "{
46 .Usb20PerPortPeTxiSet = 7,
47 .Usb20PerPortTxiSet = 3,
48 .Usb20IUsbTxEmphasisEn = 3,
49 .Usb20PerPortTxPeHalf = 0,
52 # Override USB2 PER PORT register
(PORT
6)
53 register
"usb2eye[6]" = "{
55 .Usb20PerPortPeTxiSet = 3,
56 .Usb20PerPortTxiSet = 0,
57 .Usb20IUsbTxEmphasisEn = 3,
58 .Usb20PerPortTxPeHalf = 0,
61 # Intel Common SoC Config
62 #
+-------------------+---------------------------+
64 #
+-------------------+---------------------------+
65 #| GSPI0 | cr50 TPM. Early init is |
66 #| | required
to set up a BAR |
67 #| |
for TPM communication |
68 #| | before memory is up |
71 #
+-------------------+---------------------------+
72 register
"common_soc_config" = "{
78 .speed = I2C_SPEED_FAST,
81 .data_hold_time_ns = 350,
88 register
"desc" = ""Root Hub
""
89 register
"type" = "UPC_TYPE_HUB"
92 register
"desc" = ""Right
Type-A Port
""
93 register
"type" = "UPC_TYPE_A"
94 register
"group" = "ACPI_PLD_GROUP(2, 2)"
98 device usb
2.3 off
end
100 chip drivers
/usb
/acpi
101 register
"desc" = ""Right
Type-A Port
""
102 register
"type" = "UPC_TYPE_USB3_A"
103 register
"group" = "ACPI_PLD_GROUP(2, 2)"
104 device usb
3.1 on
end
106 chip drivers
/usb
/acpi
107 device usb
3.3 off
end
113 chip drivers
/i2c
/da7219
114 register
"irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)"
115 register
"btn_cfg" = "50"
116 register
"mic_det_thr" = "200"
117 register
"jack_ins_deb" = "20"
118 register
"jack_det_rate" = ""32ms_64ms
""
119 register
"jack_rem_deb" = "1"
120 register
"a_d_btn_thr" = "0xa"
121 register
"d_b_btn_thr" = "0x16"
122 register
"b_c_btn_thr" = "0x21"
123 register
"c_mic_btn_thr" = "0x3e"
124 register
"btn_avg" = "4"
125 register
"adc_1bit_rpt" = "1"
126 register
"micbias_lvl" = "2600"
127 register
"mic_amp_in_sel" = ""diff
""
132 chip drivers
/i2c
/generic
133 register
"hid" = ""ELAN0000
""
134 register
"desc" = ""ELAN Touchpad
""
135 register
"irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPIO_135_IRQ)"
136 register
"wake" = "GPE0_DW3_27"
137 register
"detect" = "1"
141 register
"generic.hid" = ""ZNT0000
""
142 register
"generic.desc" = ""Zinitix Touchpad
""
143 register
"generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPIO_135_IRQ)"
144 register
"generic.wake" = "GPE0_DW3_27"
145 register
"generic.detect" = "1"
146 register
"hid_desc_reg_offset" = "0xE"
152 # Disable compliance mode
153 register
"disable_compliance_mode" = "1"