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mainboard/intel/avenuecity_crb: Update full IIO configuration
[coreboot2.git] / src / mainboard / google / sarien / variants / arcada / devicetree.cb
blob7eec7a8724c4ca48182fb737e9b40809c6a32735
1 chip soc/intel/cannonlake
2
3 # GPE configuration
4 # Note that GPE events called out in ASL code rely on this
5 # route. i.e. If this route changes then the affected GPE
6 # offset bits also need to be changed.
7 register "gpe0_dw0" = "PMC_GPP_A"
8 register "gpe0_dw1" = "PMC_GPP_C"
9 register "gpe0_dw2" = "PMC_GPP_D"
10
11 # EC host command ranges
12 register "gen1_dec" = "0x00040931" # 0x930-0x937
13 register "gen2_dec" = "0x00040941" # 0x940-0x947
14 register "gen3_dec" = "0x000c0951" # 0x950-0x95f
15
16 # FSP configuration
17 register "SaGv" = "SaGv_Enabled"
18 register "SataSalpSupport" = "1"
19 register "SataPortsEnable[2]" = "1"
20 register "SataPortsDevSlp[2]" = "1"
21 register "SkipExtGfxScan" = "1"
22 register "PchPmSlpS3MinAssert" = "3" # 50ms
23 register "PchPmSlpS4MinAssert" = "4" # 4s
24 register "PchPmSlpSusMinAssert" = "4" # 4s
25 register "PchPmSlpAMinAssert" = "4" # 2s
26 register "PchUnlockGpioPads" = "1"
27 # USB2 PHY Power gating
28 register "PchUsb2PhySusPgDisable" = "1"
29
30 register "s0ix_enable" = "true"
31 register "dptf_enable" = "1"
32 register "satapwroptimize" = "1"
33 register "power_limits_config" = "{
34 .tdp_pl1_override = 25,
35 .tdp_pl2_override = 51,
36 .psys_pmax = 140,
37 }"
38 register "Device4Enable" = "1"
39 register "AcousticNoiseMitigation" = "1"
40 register "SlowSlewRateForIa" = "2"
41 register "SlowSlewRateForGt" = "2"
42 register "SlowSlewRateForSa" = "0"
43 register "SlowSlewRateForFivr" = "2"
44 # Enable eDP device
45 register "DdiPortEdp" = "1"
46 # Enable HPD for DDI ports B/C
47 register "DdiPortBHpd" = "1"
48 register "DdiPortCHpd" = "1"
49 # Enable DDC for DDI port B
50 register "DdiPortBDdc" = "1"
51
52 # VR Settings Configuration for 4 Domains
53 #+----------------+-------+-------+-------+-------+
54 #| Domain/Setting | SA | IA | GTUS | GTS |
55 #+----------------+-------+-------+-------+-------+
56 #| Psi1Threshold | 20A | 20A | 20A | 20A |
57 #| Psi2Threshold | 5A | 5A | 5A | 5A |
58 #| Psi3Threshold | 1A | 1A | 1A | 1A |
59 #| Psi3Enable | 1 | 1 | 1 | 1 |
60 #| Psi4Enable | 1 | 1 | 1 | 1 |
61 #| ImonSlope | 0 | 0 | 0 | 0 |
62 #| ImonOffset | 0 | 0 | 0 | 0 |
63 #| IccMax | 6A | 70A | 31A | 31A |
64 #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
65 #| AcLoadline | 10.3 | 1.8 | 3.1 | 3.1 |
66 #| DcLoadline | 10.3 | 1.8 | 3.1 | 3.1 |
67 #+----------------+-------+-------+-------+-------+
68 register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
69 .vr_config_enable = 1,
70 .psi1threshold = VR_CFG_AMP(20),
71 .psi2threshold = VR_CFG_AMP(5),
72 .psi3threshold = VR_CFG_AMP(1),
73 .psi3enable = 1,
74 .psi4enable = 1,
75 .imon_slope = 0x0,
76 .imon_offset = 0x0,
77 .icc_max = VR_CFG_AMP(6),
78 .voltage_limit = 1520,
79 .ac_loadline = 1030,
80 .dc_loadline = 1030,
81 }"
82
83 register "domain_vr_config[VR_IA_CORE]" = "{
84 .vr_config_enable = 1,
85 .psi1threshold = VR_CFG_AMP(20),
86 .psi2threshold = VR_CFG_AMP(5),
87 .psi3threshold = VR_CFG_AMP(1),
88 .psi3enable = 1,
89 .psi4enable = 1,
90 .imon_slope = 0x0,
91 .imon_offset = 0x0,
92 .icc_max = VR_CFG_AMP(70),
93 .voltage_limit = 1520,
94 .ac_loadline = 180,
95 .dc_loadline = 180,
96 }"
97
98 register "domain_vr_config[VR_GT_UNSLICED]" = "{
99 .vr_config_enable = 1,
100 .psi1threshold = VR_CFG_AMP(20),
101 .psi2threshold = VR_CFG_AMP(5),
102 .psi3threshold = VR_CFG_AMP(1),
103 .psi3enable = 1,
104 .psi4enable = 1,
105 .imon_slope = 0x0,
106 .imon_offset = 0x0,
107 .icc_max = VR_CFG_AMP(31),
108 .voltage_limit = 1520,
109 .ac_loadline = 310,
110 .dc_loadline = 310,
111 }"
112
113 register "domain_vr_config[VR_GT_SLICED]" = "{
114 .vr_config_enable = 1,
115 .psi1threshold = VR_CFG_AMP(20),
116 .psi2threshold = VR_CFG_AMP(5),
117 .psi3threshold = VR_CFG_AMP(1),
118 .psi3enable = 1,
119 .psi4enable = 1,
120 .imon_slope = 0x0,
121 .imon_offset = 0x0,
122 .icc_max = VR_CFG_AMP(31),
123 .voltage_limit = 1520,
124 .ac_loadline = 310,
125 .dc_loadline = 310,
126 }"
127
128 # Intel Common SoC Config
129 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Left Type-C Port
130 register "usb2_ports[1]" = "USB2_PORT_LONG(OC0)" # Left Type-A Port
131 register "usb2_ports[2]" = "USB2_PORT_LONG(OC1)" # Right Type-A Port
132 register "usb2_ports[5]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
133 register "usb2_ports[6]" = "{
134 .enable = 1,
135 .ocpin = OC_SKIP,
136 .tx_bias = USB2_BIAS_0MV,
137 .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON,
138 .pre_emp_bias = USB2_BIAS_28P15MV,
139 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
140 }" # WWAN
141 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # USH
142 register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
143 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
144
145 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Left Type-C Port
146 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # Left Type-A Port
147 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # Right Type-A Port
148 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # WWAN
149
150 # Intel Common SoC Config
151 #+-------------------+---------------------------+
152 #| Field | Value |
153 #+-------------------+---------------------------+
154 #| I2C0 | Touchscreen |
155 #| I2C1 | Touchpad |
156 #| I2C4 | H1 TPM |
157 #+-------------------+---------------------------+
158
159 register "tcc_offset" = "1"
160
161 # PCH Thermal Trip Temperature in deg C
162 register "common_soc_config.pch_thermal_trip" = "77"
163
164 register "common_soc_config" = "{
165 .i2c[0] = {
166 .speed = I2C_SPEED_FAST,
167 .rise_time_ns = 52,
168 .fall_time_ns = 110,
169 },
170 .i2c[1] = {
171 .speed = I2C_SPEED_FAST,
172 .rise_time_ns = 52,
173 .fall_time_ns = 110,
174 .data_hold_time_ns = 330,
175 },
176 .i2c[4] = {
177 .early_init = 1,
178 .speed = I2C_SPEED_FAST,
179 .rise_time_ns = 36,
180 .fall_time_ns = 99,
181 },
182 }"
183
184 # PCIe port 10 for M.2 2230 WLAN
185 register "PcieRpEnable[9]" = "1"
186 register "PcieClkSrcUsage[2]" = "9"
187 register "PcieClkSrcClkReq[2]" = "2"
188
189 # PCIe port 11 for card reader
190 register "PcieRpEnable[10]" = "1"
191 register "PcieRpLtrEnable[10]" = "1"
192 register "PcieClkSrcUsage[1]" = "10"
193 register "PcieClkSrcClkReq[1]" = "1"
194
195 # PCIe port 13 for M.2 2280 SSD
196 register "PcieRpEnable[12]" = "1"
197 register "PcieRpLtrEnable[12]" = "1"
198 register "PcieClkSrcUsage[4]" = "12"
199 register "PcieClkSrcClkReq[4]" = "4"
200
201 # GPIO PM programming
202 register "gpio_override_pm" = "1"
203
204 # GPIO community PM configuration
205 register "gpio_pm[COMM_0]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
206 register "gpio_pm[COMM_1]" = "MISCCFG_GPSIDEDPCGEN | MISCCFG_GPRTCDLCGEN | MISCCFG_GSXSLCGEN | MISCCFG_GPDPCGEN | MISCCFG_GPDLCGEN"
207 register "gpio_pm[COMM_2]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
208 register "gpio_pm[COMM_3]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
209 register "gpio_pm[COMM_4]" = "MISCCFG_GPIO_PM_CONFIG_BITS"
210
211 device domain 0 on
212 device ref igpu on end
213 device ref dptf on end
214 device ref thermal on end
215 device ref ish on
216 chip drivers/intel/ish
217 register "firmware_name" = ""arcada_ish.bin""
218 device generic 0 on end
219 end
220 end
221 device ref xhci on
222 chip drivers/usb/acpi
223 register "desc" = ""Root Hub""
224 register "type" = "UPC_TYPE_HUB"
225 device usb 0.0 on
226 chip drivers/usb/acpi
227 register "desc" = ""Left Type-C Port""
228 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
229 register "group" = "ACPI_PLD_GROUP(1, 1)"
230 device usb 2.0 on end
231 end
232 chip drivers/usb/acpi
233 register "desc" = ""Left Type-A Port""
234 register "type" = "UPC_TYPE_A"
235 register "group" = "ACPI_PLD_GROUP(1, 2)"
236 device usb 2.1 on end
237 end
238 chip drivers/usb/acpi
239 register "desc" = ""Right Type-A Port""
240 register "type" = "UPC_TYPE_A"
241 register "group" = "ACPI_PLD_GROUP(2, 1)"
242 device usb 2.2 on end
243 end
244 chip drivers/usb/acpi
245 register "desc" = ""Camera""
246 register "type" = "UPC_TYPE_INTERNAL"
247 device usb 2.5 on end
248 end
249 chip drivers/usb/acpi
250 register "desc" = ""WWAN""
251 register "type" = "UPC_TYPE_INTERNAL"
252 device usb 2.6 on end
253 end
254 chip drivers/usb/acpi
255 register "desc" = ""USH""
256 register "type" = "UPC_TYPE_INTERNAL"
257 device usb 2.7 on end
258 end
259 chip drivers/usb/acpi
260 register "desc" = ""Fingerprint""
261 register "type" = "UPC_TYPE_INTERNAL"
262 device usb 2.8 on end
263 end
264 chip drivers/usb/acpi
265 register "desc" = ""Bluetooth""
266 register "type" = "UPC_TYPE_INTERNAL"
267 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H15)"
268 device usb 2.9 on end
269 end
270 chip drivers/usb/acpi
271 register "desc" = ""Left Type-C Port""
272 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
273 register "group" = "ACPI_PLD_GROUP(1, 1)"
274 device usb 3.0 on end
275 end
276 chip drivers/usb/acpi
277 register "desc" = ""Left Type-A Port""
278 register "type" = "UPC_TYPE_USB3_A"
279 register "group" = "ACPI_PLD_GROUP(1, 2)"
280 device usb 3.1 on end
281 end
282 chip drivers/usb/acpi
283 register "desc" = ""Right Type-A Port""
284 register "type" = "UPC_TYPE_USB3_A"
285 register "group" = "ACPI_PLD_GROUP(2, 1)"
286 device usb 3.2 on end
287 end
288 chip drivers/usb/acpi
289 register "desc" = ""WWAN""
290 register "type" = "UPC_TYPE_INTERNAL"
291 device usb 3.3 on end
292 end
293 end
294 end
295 end
296 device ref cnvi_wifi on
297 chip drivers/wifi/generic
298 register "wake" = "PME_B0_EN_BIT"
299 device generic 0 on end
300 end
301 end
302 device ref i2c0 on
303 chip drivers/i2c/hid
304 register "generic.hid" = ""WCOM48E2""
305 register "generic.desc" = ""Wacom Touchscreen""
306 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C23_IRQ)"
307 register "generic.detect" = "1"
308 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
309 register "generic.reset_delay_ms" = "120"
310 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
311 register "generic.enable_delay_ms" = "55"
312 register "generic.has_power_resource" = "1"
313 register "hid_desc_reg_offset" = "0x1"
314 device i2c 0A on end
315 end
316 end
317 device ref i2c1 on
318 chip drivers/i2c/generic
319 register "hid" = ""ELAN0000""
320 register "desc" = ""ELAN Touchpad""
321 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
322 register "detect" = "1"
323 device i2c 2c on end
324 end
325 chip drivers/i2c/hid
326 register "generic.hid" = ""PNP0C50""
327 register "generic.desc" = ""Cirque Touchpad""
328 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
329 register "generic.detect" = "1"
330 register "hid_desc_reg_offset" = "0x20"
331 device i2c 2a on end
332 end
333 end
334 device ref sata on end
335 device ref i2c4 on
336 chip drivers/i2c/tpm
337 register "hid" = ""GOOG0005""
338 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D18_IRQ)"
339 device i2c 50 on end
340 end
341 end
342 device ref uart2 on end
343 device ref pcie_rp10 on
344 smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
345 register "PcieRpSlotImplemented[9]" = "1"
346 end
347 device ref pcie_rp11 on
348 register "PcieRpSlotImplemented[10]" = "1"
349 end
350 device ref pcie_rp13 on
351 # x4 lanes
352 chip drivers/generic/bayhub
353 register "power_saving" = "1"
354 device pci 00.0 on end
355 end
356 smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
357 register "PcieRpSlotImplemented[12]" = "1"
358 end
359 device ref lpc_espi on
360 chip ec/google/wilco
361 device pnp 0c09.0 on end
362 end
363 end
364 device ref hda on end
365 device ref smbus on end
366 end
367 end
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