src/mainboard/google/smaug/pmic.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <delay.h>
   5 #include <device/i2c_simple.h>
   6 #include <reset.h>
   7 #include <stdint.h>
   8
   9 #include "pmic.h"
  10
  11 enum {
  12         MAX77620_I2C_ADDR = 0x3c,
  13         MAX77621_CPU_I2C_ADDR = 0x1B,
  14         MAX77621_GPU_I2C_ADDR = 0x1C,
  15 };
  16
  17 struct max77620_init_reg {
  18         u8 reg;
  19         u8 val;
  20         u8 delay;
  21 };
  22
  23 static void pmic_write_reg(unsigned int bus, uint8_t chip, uint8_t reg, uint8_t val,
  24                            int delay)
  25 {
  26         if (i2c_writeb(bus, chip, reg, val)) {
  27                 printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n",
  28                         __func__, reg, val);
  29                 /* Reset the board on any PMIC write error */
  30                 board_reset();
  31         } else {
  32                 if (delay)
  33                         udelay(500);
  34         }
  35 }
  36
  37 void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
  38                                         int delay)
  39 {
  40         pmic_write_reg(bus, MAX77620_I2C_ADDR, reg, val, delay);
  41 }
  42
  43 static inline void pmic_write_reg_77621(unsigned int bus, uint8_t reg, uint8_t val,
  44                                         int delay)
  45 {
  46         pmic_write_reg(bus, MAX77621_CPU_I2C_ADDR, reg, val, delay);
  47 }
  48
  49 void pmic_init(unsigned int bus)
  50 {
  51         /* MAX77620: Set SD0 to 1.0V - VDD_CORE */
  52         pmic_write_reg_77620(bus, MAX77620_SD0_REG, 0x20, 1);
  53         pmic_write_reg_77620(bus, MAX77620_VDVSSD0_REG, 0x20, 1);
  54
  55         /* MAX77620: GPIO 0,1,2,5,6,7 = GPIO, 3,4 = alt mode */
  56         pmic_write_reg_77620(bus, MAX77620_AME_GPIO, 0x18, 1);
  57
  58         /* MAX77620: Disable SD1 Remote Sense, Set SD1 for LPDDR4 to 1.125V */
  59         pmic_write_reg_77620(bus, MAX77620_CNFG2SD_REG, 0x04, 1);
  60         pmic_write_reg_77620(bus, MAX77620_SD1_REG, 0x2a, 1);
  61
  62         /*
  63          * MAX77620: Set LDO2 output to 1.8V. LDO2 is used as always-on
  64          * reference for the droop alert circuit. Match this setting with what
  65          * the kernel expects.
  66          */
  67         pmic_write_reg_77620(bus, MAX77620_CNFG1_L2_REG, 0x14, 1);
  68
  69         /* MAX77621: Set VOUT_REG to 1.0V - CPU VREG */
  70         pmic_write_reg_77621(bus, MAX77621_VOUT_REG, 0xBF, 1);
  71
  72         /* MAX77621: Set VOUT_DVC_REG to 1.0V - CPU VREG DVC */
  73         pmic_write_reg_77621(bus, MAX77621_VOUT_DVC_REG, 0xBF, 1);
  74
  75         /* MAX77621: Set CONTROL1 to 0x38 */
  76         pmic_write_reg_77621(bus, MAX77621_CONTROL1_REG, 0x38, 1);
  77
  78         /* MAX77621: Set CONTROL2 to 0xD2 */
  79         pmic_write_reg_77621(bus, MAX77621_CONTROL2_REG, 0xD2, 1);
  80
  81         /* MAX77620: Setup/Enable GPIO5 - EN_VDD_CPU */
  82         pmic_write_reg_77620(bus, MAX77620_GPIO5_REG, 0x09, 1);
  83
  84         /* Required delay of 2msec */
  85         udelay(2000);
  86
  87         printk(BIOS_DEBUG, "PMIC init done\n");
  88 }