src/mainboard/google/storm/cdp.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/mmio.h>
   4 #include <gpio.h>
   5 #include <soc/cdp.h>
   6 #include <soc/ebi2.h>
   7 #include <soc/clock.h>
   8 #include <types.h>
   9 #include <boardid.h>
  10
  11 void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned int count)
  12 {
  13         int i;
  14
  15         for (i = 0; i < count; i++) {
  16                 gpio_tlmm_config(gpio->gpio, gpio->func, gpio->dir,
  17                                 gpio->pull, gpio->drvstr, gpio->enable);
  18                 gpio++;
  19         }
  20 }
  21
  22 static void configure_nand_gpio(void)
  23 {
  24         /* EBI2 CS, CLE, ALE, WE, OE */
  25         gpio_tlmm_config(34, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
  26         gpio_tlmm_config(35, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
  27         gpio_tlmm_config(36, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
  28         gpio_tlmm_config(37, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
  29         gpio_tlmm_config(38, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
  30
  31         /* EBI2 BUSY */
  32         gpio_tlmm_config(39, 1, 0, GPIO_PULL_UP, GPIO_10MA, GPIO_DISABLE);
  33
  34         /* EBI2 D7 - D0 */
  35         gpio_tlmm_config(40, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  36         gpio_tlmm_config(41, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  37         gpio_tlmm_config(42, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  38         gpio_tlmm_config(43, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  39         gpio_tlmm_config(44, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  40         gpio_tlmm_config(45, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  41         gpio_tlmm_config(46, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  42         gpio_tlmm_config(47, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
  43 }
  44
  45 void board_nand_init(void)
  46 {
  47         struct ebi2cr_regs *ebi2_regs;
  48
  49         if (board_id() != BOARD_ID_PROTO_0_2_NAND)
  50                 return;
  51
  52         ebi2_regs = (struct ebi2cr_regs *)EBI2CR_BASE;
  53
  54         nand_clock_config();
  55         configure_nand_gpio();
  56
  57         /* NAND Flash is connected to CS0 */
  58         clrsetbits32(&ebi2_regs->chip_select_cfg0, CS0_CFG_MASK,
  59                      CS0_CFG_SERIAL_FLASH_DEVICE);
  60 }