src/mainboard/roda/rv11/variants/rw11/early_init.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <arch/hpet.h>
   4 #include <bootblock_common.h>
   5 #include <stdint.h>
   6 #include <device/pnp_ops.h>
   7 #include <device/pnp.h>
   8 #include <northbridge/intel/sandybridge/raminit.h>
   9 #include <superio/ite/it8783ef/it8783ef.h>
  10 #include <superio/ite/common/ite.h>
  11
  12 void bootblock_mainboard_early_init(void)
  13 {
  14         const pnp_devfn_t dev = PNP_DEV(0x2e, IT8783EF_GPIO);
  15
  16         pnp_enter_conf_state(dev);
  17         pnp_set_logical_device(dev);
  18
  19         pnp_write_config(dev, 0x23, ITE_UART_CLK_PREDIVIDE_24);
  20
  21         /* Switch multi function for UART4 */
  22         pnp_write_config(dev, 0x2a, 0x04);
  23         /* Switch multi function for UART3 */
  24         pnp_write_config(dev, 0x2c, 0x13);
  25
  26         /* No GPIOs used: Clear any output / pull-up that's set by default */
  27         pnp_write_config(dev, 0xb8, 0x00);
  28         pnp_write_config(dev, 0xc0, 0x00);
  29         pnp_write_config(dev, 0xc3, 0x00);
  30         pnp_write_config(dev, 0xc8, 0x00);
  31         pnp_write_config(dev, 0xcb, 0x00);
  32         pnp_write_config(dev, 0xef, 0x00);
  33
  34         pnp_exit_conf_state(dev);
  35 }
  36
  37 void mainboard_fill_pei_data(struct pei_data *pei_data)
  38 {
  39         /* TODO: Confirm if need to enable peg10 in devicetree */
  40         pei_data->pcie_init = 1;
  41 }