src/mainboard/system76/cml-u/devicetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/cannonlake
   4         register "common_soc_config" = "{
   5                 /* Touchpad */
   6                 .i2c[0] = {
   7                         .speed = I2C_SPEED_FAST,
   8                         .rise_time_ns = 80,
   9                         .fall_time_ns = 110,
  10                 },
  11         }"
  12
  13 # CPU (soc/intel/cannonlake/cpu.c)
  14         # Power limit
  15         register "power_limits_config" = "{
  16                 .tdp_pl1_override = 20,
  17                 .tdp_pl2_override = 30,
  18         }"
  19
  20         # Enable Enhanced Intel SpeedStep
  21         register "eist_enable" = "true"
  22
  23 # FSP Memory (soc/intel/cannonlake/romstage/fsp_params.c)
  24         register "SaGv" = "SaGv_Enabled"
  25         register "enable_c6dram" = "1"
  26
  27 # FSP Silicon (soc/intel/cannonlake/fsp_params.c)
  28         # Serial I/O
  29         register "SerialIoDevMode" = "{
  30                 [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad
  31                 [PchSerialIoIndexUART2] = PchSerialIoSkipInit, // LPSS UART
  32         }"
  33
  34         # Misc
  35         register "AcousticNoiseMitigation" = "1"
  36
  37         # Power
  38         register "PchPmSlpS3MinAssert" = "3"    # 50ms
  39         register "PchPmSlpS4MinAssert" = "1"    # 1s
  40         register "PchPmSlpSusMinAssert" = "2"   # 500ms
  41         register "PchPmSlpAMinAssert" = "4"     # 2s
  42
  43         # Thermal
  44         register "tcc_offset" = "12"
  45
  46         # Serial IRQ Continuous
  47         register "serirq_mode" = "SERIRQ_CONTINUOUS"
  48
  49 # PM Util (soc/intel/cannonlake/pmutil.c)
  50         # GPE configuration
  51         # Note that GPE events called out in ASL code rely on this
  52         # route. i.e. If this route changes then the affected GPE
  53         # offset bits also need to be changed.
  54         register "gpe0_dw0" = "PMC_GPP_C"
  55         register "gpe0_dw1" = "PMC_GPP_D"
  56         register "gpe0_dw2" = "PMC_GPP_E"
  57
  58 # Actual device tree
  59         device domain 0 on
  60                 device ref igpu         on
  61                         register "gfx" = "GMA_DEFAULT_PANEL(0)"
  62                 end
  63                 device ref dptf         on
  64                         register "Device4Enable" = "1"
  65                 end
  66                 device ref thermal      on      end
  67                 device ref cnvi_wifi    on
  68                         chip drivers/wifi/generic
  69                                 register "wake" = "GPE0_PME_B0"
  70                                 device generic 0 on end
  71                         end
  72                 end
  73                 device ref uart2        on      end
  74                 device ref lpc_espi     on
  75                         register "gen1_dec" = "0x00040069"
  76                         register "gen2_dec" = "0x00fc0e01"
  77                         register "gen3_dec" = "0x00fc0f01"
  78                         chip drivers/pc80/tpm
  79                                 device pnp 0c31.0 on end
  80                         end
  81                 end
  82                 device ref hda          on
  83                         register "PchHdaAudioLinkHda" = "1"
  84                 end
  85                 device ref smbus        on      end
  86         end
  87 end