3 This page describes coreboot support status for the [OCP] (Open Compute Project)
4 Tioga Pass server platform.
8 OCP Tioga Pass server platform was contributed by Facebook, and was accepted
9 in 2019. The design collateral including datasheet can be found at [OCP Tioga Pass].
11 Since complete EE design collateral is open sourced, anyone can build server
12 as-is or a variant based on the original design. It can also be purchased from [OCP Market Place].
13 An off-the-shelf version is available, as well as rack ready version. With the
14 off-the-shelf version, the server can be plugged into wall power outlet.
16 With the off-the-shelf version of Tioga Pass, a complete software solution is
17 available. [Off-the-shelf Host Firmware] takes the approach of UEFI/Linuxboot.
19 coreboot as of release 4.13 is a proof-of-concept project between Facebook,
20 Intel, Wiwynn and Quanta. The context is described at [OCP Tioga Pass POC Blog].
24 This board currently requires:
25 - FSP blob: The blob (Intel Skylake Scalable Processor Firmware Support Package)
26 is not yet available to the public. The binary is at POC status, hopefully
27 someday an IBV is able to obtain the privilege to maintain it.
28 - Microcode: `3rdparty/intel-microcode/intel-ucode/06-55-04`
29 - ME binary: The binary can be extracted from [Off-the-shelf Host Firmware].
32 - Linuxboot: This is necessary only if you use Linuxboot as coreboot payload.
33 U-root as initramfs, is used in the POC activity. It can be extracted from
34 [Off-the-shelf Host Firmware], or it can be built following [All about u-root].
38 To do in-band FW image update, use [flashrom]:
39 flashrom -p internal:ich_spi_mode=hwseq -c "Opaque flash chip" --ifd \
40 -i bios --noverify-all -w <path to coreboot image>
42 From OpenBMC, to update FW image:
43 fw-util mb --force --update <path to coreboot image>
45 To power off/on the host:
49 To connect to console through SOL (Serial Over Lan):
52 ## Known issues / feature gaps
53 - C6 state is not supported. Workaround is to disable C6 support through
54 target OS and Linuxboot kernel parameter, such as "cpuidle.off=1".
55 - SMI handlers are not implemented.
56 - xSDT tables are not fully populated, such as processor/socket devices,
58 - There is boot stability issue. Occasionally the boot hangs at ramstage
59 with following message "BIOS PCU Misc Config Read timed out."
60 - If [CB 40500 patchset] is not merged, when PCIe riser card is used,
62 - PCIe devices connected to socket 1 may not work, because FSP
63 does not support PCIe topology input for socket 1.k
64 - SMBIOS type 7 and type 17 are not populated.
67 The solution was developed using Linuxboot payload. The Linuxboot
68 kernel versions tried are 4.16.18 and 5.2.9. The initramfs image is
75 - POST complete pin acknowledgement
76 - SEL record generation
78 - port 80h direct to GPIO
79 - ACPI tables: APIC/DMAR/DSDT/FACP/FACS/HPET/MCFG/SPMI/SRAT/SLIT/SSDT
84 +------------------------+---------------------------------------------+
85 | Processor (2 sockets) | Intel Skylake Scalable Processor LGA3647 |
86 +------------------------+---------------------------------------------+
87 | BMC | Aspeed AST 2500 |
88 +------------------------+---------------------------------------------+
89 | PCH | Intel Lewisburg C621 |
90 +------------------------+---------------------------------------------+
93 [flashrom]: https://flashrom.org/Flashrom
94 [OCP]: https://www.opencompute.org/
95 [OCP Tioga Pass]: http://files.opencompute.org/oc/public.php?service=files&t=6fc3033e64fb029b0f84be5a8faf47e8
96 [OCP Market Place]: https://www.opencompute.org/products/109/wiwynn-tioga-pass-advanced-2u-ocp-server-up-to-768gb-12-dimm-slots-4-ssds-for-io-performance
97 [Off-the-shelf Host Firmware]: https://book.linuxboot.org/case_studies/TiogaPass.html
98 [OCP Tioga Pass POC Blog]: https://www.opencompute.org/blog/linux-firmware-boots-up-server-powered-by-intelr-xeonr-scalable-processor
99 [All about u-root]: https://book.linuxboot.org/u-root.html
100 [CB 40500 patchset]: https://review.coreboot.org/c/coreboot/+/40500