mb/google/nissa/var/telith: Modify PLD for typeC and typeA
[coreboot2.git] / payloads / libpayload / arch / x86 / sysinfo.c
blob5dd606746f5c3debeca4f568c3599438087097db
1 /*
3 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 #include <libpayload-config.h>
30 #include <libpayload.h>
31 #include <coreboot_tables.h>
32 #include <multiboot_tables.h>
34 #define CPU_KHZ_DEFAULT 200
36 /**
37 * This is a global structure that is used through the library - we set it
38 * up initially with some dummy values - hopefully they will be overridden.
40 struct sysinfo_t lib_sysinfo = {
41 .cpu_khz = CPU_KHZ_DEFAULT,
42 #if CONFIG(LP_SERIAL_CONSOLE)
43 .ser_ioport = CONFIG_LP_SERIAL_IOBASE,
44 #else
45 .ser_ioport = 0x3f8,
46 #endif
49 int lib_get_sysinfo(void)
51 int ret;
53 #if CONFIG(LP_MULTIBOOT)
54 /* Get the information from the multiboot tables,
55 * if they exist */
56 get_multiboot_info(&lib_sysinfo);
57 #endif
59 /* Get information from the coreboot tables,
60 * if they exist */
62 ret = get_coreboot_info(&lib_sysinfo);
64 /* Get the CPU speed (for delays) if not set from the default value. */
65 if (lib_sysinfo.cpu_khz == CPU_KHZ_DEFAULT)
66 lib_sysinfo.cpu_khz = get_cpu_speed();
68 if (!lib_sysinfo.n_memranges) {
69 /* If we can't get a good memory range, use the default. */
70 lib_sysinfo.n_memranges = 2;
72 lib_sysinfo.memrange[0].base = 0;
73 lib_sysinfo.memrange[0].size = 640 * 1024;
74 lib_sysinfo.memrange[0].type = CB_MEM_RAM;
76 lib_sysinfo.memrange[1].base = 1024 * 1024;
77 lib_sysinfo.memrange[1].size = 31 * 1024 * 1024;
78 lib_sysinfo.memrange[1].type = CB_MEM_RAM;
81 #if CONFIG(LP_PCI)
82 pci_init(&lib_sysinfo.pacc);
83 pci_scan_bus(&lib_sysinfo.pacc);
84 #endif
86 return ret;