3 ## SPDX-License-Identifier: GPL-2.0-only
7 default TIMER_NONE if !ARCH_X86
8 default TIMER_RDTSC if ARCH_X86
17 The timer driver is provided by the payload itself.
22 config TIMER_TEGRA_1US
26 bool "Timer for ipq806x platforms"
29 bool "Timer for ipq40xx platforms"
31 This is the timer driver for QCA IPQ40xx based
34 config TIMER_ARM64_ARCH
35 bool "Architecture Timer for ARM64 platforms"
37 The cntfrq register needs to have been pre-initialized.
40 bool "Timer for Rockchip RK3288"
43 bool "Timer for Rockchip RK3399"
46 bool "Timer for MediaTek"
49 bool "Timer for MediaTek V2"
53 config TIMER_GENERIC_HZ
54 int "Generic Timer Frequency"
55 default 48000000 if TIMER_IPQ40XX
56 default 6250000 if TIMER_IPQ806X
57 default 24000000 if TIMER_MCT
58 default 13000000 if TIMER_MTK
59 default 13000000 if TIMER_MTK_V2
60 default 24000000 if TIMER_RK3288
61 default 24000000 if TIMER_RK3399
62 default 1000000 if TIMER_TEGRA_1US
65 Clock frequency of generic time counter in Hertz. Leave at 0 to
66 disable when using a non-generic timer driver.
68 config TIMER_GENERIC_REG
69 hex "Generic Timer Register Address"
70 default 0x004A2000 if TIMER_IPQ40XX
71 default 0x0200A028 if TIMER_IPQ806X
72 default 0x101C0100 if TIMER_MCT
73 default 0x10008068 if TIMER_MTK
74 default 0x100080A8 if TIMER_MTK_V2
75 default 0xff810028 if TIMER_RK3288
76 default 0xff850008 if TIMER_RK3399
77 default 0x60005010 if TIMER_TEGRA_1US
80 Register address to read generic time counter from.
82 config TIMER_GENERIC_HIGH_REG
83 hex "Generic Timer High Register Address"
84 default 0x004A2004 if TIMER_IPQ40XX
85 default 0x101C0104 if TIMER_MCT
86 default 0x10008078 if TIMER_MTK
87 default 0x100080B0 if TIMER_MTK_V2
88 default 0xff81002C if TIMER_RK3288
89 default 0xff85000C if TIMER_RK3399
92 Register address to read high 32 bits of generic time counter from.
93 Leave at 0x0 for 32-bit counters.