payloads/libpayload/drivers/usb/ehci_private.h

   1 /*
   2  *
   3  * Copyright (C) 2010 coresystems GmbH
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #ifndef __EHCI_PRIVATE_H
  30 #define __EHCI_PRIVATE_H
  31
  32 #include <usb/usb.h>
  33
  34 #define USBBASE 0x10
  35 #define FLADJ 0x61
  36 #define FLADJ_framelength(x) (((x)-59488)/16)
  37
  38 typedef volatile u32 portsc_t;
  39 #define P_CURR_CONN_STATUS (1 << 0)
  40 #define P_CONN_STATUS_CHANGE (1 << 1)
  41 #define P_PORT_ENABLE (1 << 2)
  42 #define P_PORT_RESET (1 << 8)
  43 #define P_LINE_STATUS (3 << 10)
  44 #define P_LINE_STATUS_LOWSPEED (1 << 10)
  45 #define P_PP (1 << 12)
  46 #define P_PORT_OWNER (1 << 13)
  47
  48 typedef volatile struct {
  49 #define HCS_NPORTS_MASK 0xf
  50 #define HCS_PORT_POWER_CONTROL 0x10
  51         u8 caplength;
  52         u8 res1;
  53         u16 hciversion;
  54         u32 hcsparams;
  55         u32 hccparams;
  56         u64 hcsp_portroute;
  57 } __packed hc_cap_t;
  58
  59 typedef volatile struct {
  60         u32 usbcmd;
  61 #define HC_OP_RS 1
  62 #define HC_OP_HC_RESET (1 << 1)
  63 #define HC_OP_PERIODIC_SCHED_EN_SHIFT 4
  64 #define HC_OP_PERIODIC_SCHED_EN (1 << HC_OP_PERIODIC_SCHED_EN_SHIFT)
  65 #define HC_OP_ASYNC_SCHED_EN_SHIFT 5
  66 #define HC_OP_ASYNC_SCHED_EN (1 << HC_OP_ASYNC_SCHED_EN_SHIFT)
  67         u32 usbsts;
  68 #define HC_OP_PERIODIC_SCHED_STAT_SHIFT 14
  69 #define HC_OP_PERIODIC_SCHED_STAT (1 << HC_OP_PERIODIC_SCHED_STAT_SHIFT)
  70 #define HC_OP_ASYNC_SCHED_STAT_SHIFT 15
  71 #define HC_OP_ASYNC_SCHED_STAT (1 << HC_OP_ASYNC_SCHED_STAT_SHIFT)
  72 #define HC_OP_HC_HALTED_SHIFT 12
  73 #define HC_OP_HC_HALTED (1 << HC_OP_HC_HALTED_SHIFT)
  74         u32 usbintr;
  75         u32 frindex;
  76         u32 ctrldssegment;
  77         u32 periodiclistbase;
  78         u32 asynclistaddr;
  79         u8 res1[0x40-0x1c];
  80         u32 configflag;
  81         portsc_t portsc[0];
  82         u8 res2[0x40];
  83         u32 hostpc;
  84         /* hostpc register is used for CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT */
  85 } __packed hc_op_t;
  86
  87 typedef volatile struct {
  88 #define QTD_TERMINATE 1
  89 #define QTD_PTR_MASK ~0x1f
  90         u32 next_qtd;
  91         u32 alt_next_qtd;
  92         u32 token;
  93 #define QTD_STATUS_MASK 0xff
  94 #define QTD_HALTED (1 << 6)
  95 #define QTD_ACTIVE (1 << 7)
  96 #define QTD_PID_SHIFT 8
  97 #define QTD_PID_MASK (3 << QTD_PID_SHIFT)
  98 #define QTD_CERR_SHIFT 10
  99 #define QTD_CERR_MASK (3 << QTD_CERR_SHIFT)
 100 #define QTD_CPAGE_SHIFT 12
 101 #define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT)
 102 #define QTD_TOTAL_LEN_SHIFT 16
 103 #define QTD_TOTAL_LEN_MASK (((1 << 15)-1) << QTD_TOTAL_LEN_SHIFT)
 104 #define QTD_TOGGLE_SHIFT 31
 105 #define QTD_TOGGLE_MASK (1 << 31)
 106 #define QTD_TOGGLE_DATA0 0
 107 #define QTD_TOGGLE_DATA1 (1 << QTD_TOGGLE_SHIFT)
 108         u32 bufptrs[5];
 109         u32 bufptrs64[5];
 110 } __packed qtd_t;
 111
 112 typedef volatile struct {
 113         u32 horiz_link_ptr;
 114 #define QH_TERMINATE 1
 115 #define QH_iTD (0 << 1)
 116 #define QH_QH (1 << 1)
 117 #define QH_siTD (2 << 1)
 118 #define QH_FSTN (3 << 1)
 119         u32 epchar;
 120 #define QH_EP_SHIFT 8
 121 #define QH_EPS_SHIFT 12
 122 #define QH_DTC_SHIFT 14
 123 #define QH_RECLAIM_HEAD_SHIFT 15
 124 #define QH_MPS_SHIFT 16
 125 #define QH_NON_HS_CTRL_EP_SHIFT 27
 126 #define QH_NAK_CNT_SHIFT 28
 127         u32 epcaps;
 128 #define QH_UFRAME_CMASK_SHIFT 8
 129 #define QH_HUB_ADDRESS_SHIFT 16
 130 #define QH_PORT_NUMBER_SHIFT 23
 131 #define QH_PIPE_MULTIPLIER_SHIFT 30
 132         volatile u32 current_td_ptr;
 133         volatile qtd_t td;
 134 } __packed ehci_qh_t;
 135
 136 typedef struct ehci {
 137         hc_cap_t *capabilities;
 138         hc_op_t *operation;
 139         ehci_qh_t *dummy_qh;
 140 #define DMA_SIZE (64 * 1024)
 141         void *dma_buffer;
 142 } ehci_t;
 143
 144 #define PS_TERMINATE 1
 145 #define PS_TYPE_QH (1 << 1)
 146 #define PS_PTR_MASK ~0x1f
 147
 148 #define EHCI_INST(controller) ((ehci_t*)((controller)->instance))
 149
 150 #endif