mb/siemens/mc_ehl{2...5}: Fix return in variant_mainboard_final()
[coreboot2.git] / payloads / libpayload / include / arm / arch / io.h
blobc36494ded3aefa3441a8190db7086df4b5f0742e
1 /*
3 * Copyright (C) 2008 Advanced Micro Devices, Inc.
4 * Copyright (C) 2008 coresystems GmbH
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
30 #ifndef _ARCH_IO_H
31 #define _ARCH_IO_H
33 #include <stdint.h>
34 #include <arch/cache.h>
37 * readb/w/l writeb/w/l are deprecated. use read8/16/32 and write8/16/32
38 * instead for future development.
40 * TODO: make the existing code use read8/16/32 and write8/16/32 then remove
41 * readb/w/l and writeb/w/l.
44 static inline uint8_t readb(volatile const void *_a)
46 dmb();
47 return *(volatile const uint8_t *)_a;
50 static inline uint16_t readw(volatile const void *_a)
52 dmb();
53 return *(volatile const uint16_t *)_a;
56 static inline uint32_t readl(volatile const void *_a)
58 dmb();
59 return *(volatile const uint32_t *)_a;
62 static inline void writeb(uint8_t _v, volatile void *_a)
64 dmb();
65 *(volatile uint8_t *)_a = _v;
66 dmb();
69 static inline void writew(uint16_t _v, volatile void *_a)
71 dmb();
72 *(volatile uint16_t *)_a = _v;
73 dmb();
76 static inline void writel(uint32_t _v, volatile void *_a)
78 dmb();
79 *(volatile uint32_t *)_a = _v;
80 dmb();
83 static inline uint8_t read8(volatile const void *addr)
85 dmb();
86 return *(volatile uint8_t *)addr;
89 static inline uint16_t read16(volatile const void *addr)
91 dmb();
92 return *(volatile uint16_t *)addr;
95 static inline uint32_t read32(volatile const void *addr)
97 dmb();
98 return *(volatile uint32_t *)addr;
101 static inline uint64_t read64(volatile const void *addr)
103 dmb();
104 return *(volatile uint64_t *)addr;
107 static inline void write8(volatile void *addr, uint8_t val)
109 dmb();
110 *(volatile uint8_t *)addr = val;
111 dmb();
114 static inline void write16(volatile void *addr, uint16_t val)
116 dmb();
117 *(volatile uint16_t *)addr = val;
118 dmb();
121 static inline void write32(volatile void *addr, uint32_t val)
123 dmb();
124 *(volatile uint32_t *)addr = val;
125 dmb();
128 static inline void write64(volatile void *addr, uint64_t val)
130 dmb();
131 *(volatile uint64_t *)addr = val;
132 dmb();
135 #endif