1 ## SPDX-License-Identifier: GPL-2.0-only
6 config ARCH_BOOTBLOCK_ARM64
10 config ARCH_VERSTAGE_ARM64
14 config ARCH_ROMSTAGE_ARM64
18 config ARCH_RAMSTAGE_ARM64
22 source "src/arch/arm64/armv8/Kconfig"
26 config ARM64_CURRENT_EL
31 The exception level on which coreboot is started. Accepted
32 values are: 1 (EL1), 2 (EL2) and 3 (EL3). This option can be
33 used to restrict access to available control registers in case
34 prior firmware already dropped to a lower exception level. By default,
35 coreboot is the first firmware that runs on the system and should thus
36 always run on EL3. This option is only provided for edge-case platforms
37 that require running a different firmware before coreboot which drops
38 to a lower exception level.
40 config ARM64_USE_ARCH_TIMER
44 config ARM64_USE_ARM_TRUSTED_FIRMWARE
47 depends on ARCH_RAMSTAGE_ARM64 && ARM64_CURRENT_EL = 3
49 config ARM64_BL31_OPTEE_WITH_SMC
50 bool "Build OP-TEE dispatcher for BL31 and allow loading via an SMC"
52 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE
54 This option adds support for building the OP-TEE Secure Payload Dispatcher
55 (SPD) for BL31, and allows loading the OP-TEE image via a Secure Monitor Call
58 config ARM64_BL31_EXTERNAL_FILE
59 string "Path to external BL31.ELF (leave empty to build from source)"
60 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE
62 The blob to use instead of building the Arm Trusted Firmware
63 from tree. It is discouraged as compatibility with out-of-tree
64 blobs may break anytime.
66 config ARM64_USE_SECURE_OS
69 depends on ARM64_USE_ARM_TRUSTED_FIRMWARE
71 config ARM64_SECURE_OS_FILE
72 string "Secure OS binary file"
73 depends on ARM64_USE_SECURE_OS
75 Secure OS binary file.
77 config ARM64_A53_ERRATUM_843419
81 Some early Cortex-A53 revisions had a hardware bug that results in
82 incorrect address calculations in rare cases. This option enables a
83 linker workaround to avoid those cases if your toolchain supports it.
84 Should be selected automatically by SoCs that are affected.