src/cpu/intel/haswell/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2
   3 ramstage-y += haswell_init.c
   4
   5 romstage-y += romstage.c
   6 romstage-y += ../car/romstage.c
   7
   8 ramstage-y += acpi.c
   9 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c
  10
  11 smm-y += finalize.c
  12
  13 bootblock-y += ../car/non-evict/cache_as_ram.S
  14 bootblock-y += ../car/bootblock.c
  15 bootblock-y += ../../x86/early_reset.S
  16 bootblock-y += bootblock.c
  17
  18 postcar-y += ../car/non-evict/exit_car.S
  19
  20 subdirs-y += ../microcode
  21 subdirs-y += ../turbo
  22
  23 ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
  24 # Haswell ULT/ULX
  25 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*)
  26 ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
  27 # Broadwell ULT/ULX
  28 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3d-*)
  29 endif
  30 else
  31 # Haswell Trad
  32 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
  33 # Crystal Well (Trad)
  34 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-46-*)
  35 # Broadwell Trad
  36 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-47-*)
  37 endif