soc/mediatek/mt8196: Add pi_img loader in ramstage
[coreboot2.git] / src / cpu / intel / microcode / Makefile.mk
blob4e10a4b15f1c973194431a689294efe6e200525e
1 ## SPDX-License-Identifier: GPL-2.0-only
3 bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += microcode_asm.S
5 bootblock-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
6 ramstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
7 romstage-$(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) += microcode.c
9 # Pack individual microcodes per CPUID from CONFIG_CPU_INTEL_UCODE_SPLIT_BINARIES directory into the CBFS.
10 ifeq ($(CONFIG_CPU_INTEL_MICROCODE_CBFS_SPLIT_BINS),y)
11 microcode-params-dir := $(call strip_quotes,$(CONFIG_CPU_INTEL_UCODE_SPLIT_BINARIES))/
12 microcode-params := $(shell find "$(microcode-params-dir)" -type f -exec basename {} \;)
14 # Make "cpu_microcode_$(CPUID).bin" file entry into the FIT table
15 $(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL))
16 $(foreach params, $(microcode-params), $(shell $(IFITTOOL) -f $< -a -n $(params) -t 1 \
17 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT)) true
19 # Add "cpu_microcode_$(CPUID).bin" file into the CBFS
20 $(foreach params,$(microcode-params), \
21 $(eval cbfs-files-y += $(params)) \
22 $(eval $(params)-file := $(microcode-params-dir)/$(params)) \
23 $(eval $(params)-type := microcode) \
24 $(eval $(params)-align := 16) \
27 endif