src/cpu/intel/model_206ax/chip.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef __CPU_INTEL_MODEL_206AX_CHIP_H__
   4 #define __CPU_INTEL_MODEL_206AX_CHIP_H__
   5
   6 #include "stdbool.h"
   7
   8 /* Keep this in sync with acpi.c */
   9 enum cpu_acpi_level {
  10         CPU_ACPI_DISABLED = 0,
  11         CPU_ACPI_C1,
  12         CPU_ACPI_C2,
  13         CPU_ACPI_C3,
  14         CPU_ACPI_C6,
  15         CPU_ACPI_C7,
  16         CPU_ACPI_C7S,
  17 };
  18
  19 /* VR12 PSI codes */
  20 enum vr12_phases {
  21         VR12_KEEP_DEFAULT = 0,  /* For device-trees missing the setting */
  22         VR12_ALL_PHASES,
  23         VR12_2_PHASES,
  24         VR12_1_PHASE,
  25         VR12_LIGHT_LOAD,
  26 };
  27
  28 /* VR12 power state listing */
  29 enum vr12_psi {
  30         VR12_PSI1 = 0,
  31         VR12_PSI2,
  32         VR12_PSI3,
  33         VR12_PSI_MAX,
  34 };
  35
  36 struct psi_state {
  37         enum vr12_phases phases;
  38         int current;                    /* In Amps */
  39 };
  40
  41 union turbo_ratio_limits {
  42                 /* Limit for 1, 2, 3 and 4 active cores respectively */
  43                 struct {
  44                         int limit_1c;
  45                         int limit_2c;
  46                         int limit_3c;
  47                         int limit_4c;
  48                 };
  49                 int raw[4];
  50 };
  51
  52 struct cpu_intel_model_206ax_config {
  53         enum cpu_acpi_level acpi_c1;
  54         enum cpu_acpi_level acpi_c2;
  55         enum cpu_acpi_level acpi_c3;
  56
  57         int tcc_offset;         /* TCC Activation Offset */
  58
  59         unsigned int pl1_mw; /* Long-term power limit in milliwatts */
  60         bool pl1_clamp; /* Long-term power limit clamping limitation */
  61         unsigned int pl2_mw; /* Short-term power limit in milliwatts */
  62         bool pl2_clamp; /* Short-term power limit clamping limitation */
  63
  64         int pp0_current_limit;  /* Primary Plane Current Limit (Icc) in Amps */
  65         int pp1_current_limit;  /* Secondary Plane Current Limit (IAXG) in Amps */
  66
  67         /* PSI states only have an effect when in Package C3 or higher */
  68         struct psi_state pp0_psi[3];    /* Power states for Primary Plane (Icc) */
  69         struct psi_state pp1_psi[3];    /* Power states for Secondary Plane (IAXG) */
  70
  71         union turbo_ratio_limits turbo_limits; /* Turbo ratio limits depending on the number of active cores */
  72 };
  73
  74 #endif /* __CPU_INTEL_MODEL_206AX_CHIP_H__ */