src/drivers/intel/fsp2_0/header_display.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <console/console.h>
   4 #include <fsp/util.h>
   5
   6 void fsp_print_header_info(const struct fsp_header *hdr)
   7 {
   8         union fsp_revision revision;
   9         union extended_fsp_revision ext_revision;
  10         ext_revision.val = 0;
  11         int i;
  12
  13         /* For FSP 2.3 and later use extended image revision field present in header
  14          * for build number and revision calculation */
  15         if (CONFIG(PLATFORM_USES_FSP2_3))
  16                 ext_revision.val = hdr->extended_image_revision;
  17
  18         revision.val = hdr->image_revision;
  19         printk(BIOS_SPEW, "Spec version: v%u.%u\n", (hdr->spec_version >> 4),
  20                                                      hdr->spec_version & 0xf);
  21         printk(BIOS_SPEW, "Revision: %u.%u.%u, Build Number %u\n",
  22                         revision.rev.major,
  23                         revision.rev.minor,
  24                         ((ext_revision.rev.revision << 8) | revision.rev.revision),
  25                         ((ext_revision.rev.bld_num << 8) | revision.rev.bld_num));
  26         printk(BIOS_SPEW, "Type: %s/%s\n",
  27                         (hdr->component_attribute & 1) ? "release" : "debug",
  28                         (hdr->component_attribute & 2) ? "official" : "test");
  29
  30         printk(BIOS_SPEW, "image ID: ");
  31         for (i = 0; i < FSP_IMAGE_ID_LENGTH; i++)
  32                 printk(BIOS_SPEW, "%c", hdr->image_id[i]);
  33         printk(BIOS_SPEW, "\n");
  34
  35         printk(BIOS_SPEW, "     base 0x%zx + 0x%zx\n",
  36                 (size_t)hdr->image_base, (size_t)hdr->image_size);
  37         printk(BIOS_SPEW, "\tConfig region        0x%zx + 0x%zx\n",
  38                 (size_t)hdr->cfg_region_offset, (size_t)hdr->cfg_region_size);
  39
  40         if ((hdr->component_attribute >> 12) == FSP_HDR_ATTRIB_FSPM) {
  41                 printk(BIOS_SPEW, "\tMemory init offset   0x%zx\n",
  42                        (size_t)hdr->fsp_memory_init_entry_offset);
  43         }
  44
  45         if ((hdr->component_attribute >> 12) == FSP_HDR_ATTRIB_FSPS) {
  46                 printk(BIOS_SPEW, "\tSilicon init offset  0x%zx\n",
  47                        (size_t)hdr->fsp_silicon_init_entry_offset);
  48                 if (CONFIG(PLATFORM_USES_FSP2_2))
  49                         printk(BIOS_SPEW, "\tMultiPhaseSiInit offset  0x%zx\n",
  50                                (size_t)hdr->fsp_multi_phase_si_init_entry_offset);
  51                 printk(BIOS_SPEW, "\tNotify phase offset  0x%zx\n",
  52                        (size_t)hdr->notify_phase_entry_offset);
  53         }
  54 }