soc/intel/xeon_sp: Allow OS to control LTR and AER
[coreboot2.git] / src / ec / apple / acpi / ac.asl
blob0103229936e2ff886124b01532fbb8dfc0d23fea
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 Scope(\_SB.PCI0.LPCB.EC)
5         Field(ERAM, ByteAcc, NoLock, Preserve)
6         {
7                 Offset(HPAC_OFFSET),
8                         , 1,
9                 HPAC, 1,  /* AC status */
10         }
12         Device(AC)
13         {
14                 Name(_HID, "ACPI0003")
15                 Name(_UID, 0x00)
16                 Name(_PCL, Package() { \_SB } )
18                 Method(_PSR, 0, NotSerialized)
19                 {
20                         Return(HPAC)
21                 }
23                 Method(_STA, 0, NotSerialized)
24                 {
25                         Return(0x0f)
26                 }
27         }