1 /* SPDX-License-Identifier: BSD-3-Clause */
6 /* Host communication command constants for Chrome EC */
9 * TODO(b/272518464): Work around coreboot GCC preprocessor bug.
10 * #line marks the *next* line, so it is off by one.
14 #ifndef __CROS_EC_EC_COMMANDS_H
15 #define __CROS_EC_EC_COMMANDS_H
17 #if !defined(__ACPI__) && !defined(__KERNEL__)
23 * CHROMIUM_EC is defined by the Makefile system of Chromium EC repository.
24 * It is used to not include macros that may cause conflicts in foreign
25 * projects (refer to crbug.com/984623).
29 * Include common.h for CONFIG_HOSTCMD_ALIGNED, if it's defined. This
30 * generates more efficient code for accessing request/response structures on
31 * ARM Cortex-M if the structures are guaranteed 32-bit aligned.
34 #include "compile_time_macros.h"
37 /* If BUILD_ASSERT isn't already defined, make it a no-op */
39 #define BUILD_ASSERT(_cond)
40 #endif /* !BUILD_ASSERT */
41 #endif /* CHROMIUM_EC */
44 #include <linux/limits.h>
47 * Defines macros that may be needed but are for sure defined by the linux
48 * kernel. This section is removed when cros_ec_commands.h is generated (by
49 * util/make_linux_ec_commands_h.sh).
50 * cros_ec_commands.h looks more integrated to the kernel.
54 #define BIT(nr) (1UL << (nr))
58 #define BIT_ULL(nr) (1ULL << (nr))
62 * When building Zephyr, this file ends up being included before Zephyr's
63 * include/sys/util.h so causes a warning there. We don't want to add an #ifdef
64 * in that file since it won't be accepted upstream. So work around it here.
68 #define GENMASK(h, l) (((BIT(h) << 1) - 1) ^ (BIT(l) - 1))
72 #define GENMASK_ULL(h, l) (((BIT_ULL(h) << 1) - 1) ^ (BIT_ULL(l) - 1))
76 #endif /* __KERNEL__ */
83 * Constant for creation of flexible array members that work in both C and
84 * C++. Flexible array members were added in C99 and are not part of the C++
85 * standard. However, clang++ supports them for C++.
86 * When compiling with gcc, flexible array members are not allowed to appear
87 * in an otherwise empty struct, so we use the GCC zero-length array
88 * extension that works with both clang/gcc/g++.
90 #if defined(__cplusplus) && defined(__clang__)
91 #define FLEXIBLE_ARRAY_MEMBER_SIZE
93 #define FLEXIBLE_ARRAY_MEMBER_SIZE 0
97 * Current version of this protocol
99 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
100 * determined in other ways. Remove this once the kernel code no longer
103 #define EC_PROTO_VERSION 0x00000002
105 /* Command version mask */
106 #define EC_VER_MASK(version) BIT(version)
108 /* I/O addresses for ACPI commands */
109 #define EC_LPC_ADDR_ACPI_DATA 0x62
110 #define EC_LPC_ADDR_ACPI_CMD 0x66
112 /* I/O addresses for host command */
113 #define EC_LPC_ADDR_HOST_DATA 0x200
114 #define EC_LPC_ADDR_HOST_CMD 0x204
116 /* I/O addresses for host command args and params */
117 /* Protocol version 2 */
118 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
119 /* For version 2 params; size is EC_PROTO2_MAX_PARAM_SIZE */
120 #define EC_LPC_ADDR_HOST_PARAM 0x804
122 /* Protocol version 3 */
123 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
124 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
127 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
128 * and they tell the kernel that so we have to think of it as two parts.
130 * Other BIOSes report only the I/O port region spanned by the Microchip
131 * MEC series EC; an attempt to address a larger region may fail.
133 #define EC_HOST_CMD_REGION0 0x800
134 #define EC_HOST_CMD_REGION1 0x880
135 #define EC_HOST_CMD_REGION_SIZE 0x80
136 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
138 /* EC command register bit functions */
139 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
140 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
141 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
142 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */
143 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */
144 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */
145 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
147 #define EC_LPC_ADDR_MEMMAP 0x900
148 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
149 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
151 /* The offset address of each type of data in mapped memory. */
152 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
153 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
154 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
155 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
156 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
157 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
158 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
159 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
160 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
161 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
162 /* Unused 0x28 - 0x2f */
163 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
164 /* Unused 0x31 - 0x33 */
165 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
166 /* Battery values are all 32 bits, unless otherwise noted. */
167 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
168 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
169 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
170 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
171 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
172 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
174 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
175 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
176 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
177 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
178 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
179 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
180 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
181 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
182 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
183 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
184 /* Unused 0x84 - 0x8f */
185 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
187 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
188 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
189 /* 0x94 - 0x99: 1st Accelerometer */
190 /* 0x9a - 0x9f: 2nd Accelerometer */
192 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
193 #define EC_MEMMAP_GPU 0xa6 /* GPU-specific, 8 bits */
196 * Bit fields for EC_MEMMAP_GPU
197 * 0:2: D-Notify level (0:D1, ... 4:D5)
198 * 3: Over temperature
200 #define EC_MEMMAP_GPU_D_NOTIFY_MASK GENMASK(2, 0)
201 #define EC_MEMMAP_GPU_OVERT_BIT BIT(3)
203 /* Power Participant related components */
204 #define EC_MEMMAP_PWR_SRC 0xa7 /* Power source (8-bit) */
205 /* Unused 0xa8 - 0xdf */
208 * ACPI is unable to access memory mapped data at or above this offset due to
209 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
210 * which might be needed by ACPI.
212 #define EC_MEMMAP_NO_ACPI 0xe0
214 /* Define the format of the accelerometer mapped memory status byte. */
215 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
216 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
217 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
219 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
220 #define EC_TEMP_SENSOR_ENTRIES 16
222 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
224 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
226 #define EC_TEMP_SENSOR_B_ENTRIES 8
228 /* Max temp sensor entries for host commands */
229 #define EC_MAX_TEMP_SENSOR_ENTRIES \
230 (EC_TEMP_SENSOR_ENTRIES + EC_TEMP_SENSOR_B_ENTRIES)
232 /* Special values for mapped temperature sensors */
233 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
234 #define EC_TEMP_SENSOR_ERROR 0xfe
235 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
236 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
238 * The offset of temperature value stored in mapped memory. This allows
239 * reporting a temperature range of 200K to 454K = -73C to 181C.
241 #define EC_TEMP_SENSOR_OFFSET 200
244 * Number of ALS readings at EC_MEMMAP_ALS
246 #define EC_ALS_ENTRIES 2
249 * The default value a temperature sensor will return when it is present but
250 * has not been read this boot. This is a reasonable number to avoid
251 * triggering alarms on the host.
253 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
255 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
256 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
258 /* Report 0 for fan stalled so userspace applications can take
259 * an appropriate action based on this value to control the fan.
261 #define EC_FAN_SPEED_STALLED 0x0
262 /* This should be used only for ectool to support old ECs. */
263 #define EC_FAN_SPEED_STALLED_DEPRECATED 0xfffe
265 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
266 #define EC_BATT_FLAG_AC_PRESENT 0x01
267 #define EC_BATT_FLAG_BATT_PRESENT 0x02
268 #define EC_BATT_FLAG_DISCHARGING 0x04
269 #define EC_BATT_FLAG_CHARGING 0x08
270 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
271 /* Set if some of the static/dynamic data is invalid (or outdated). */
272 #define EC_BATT_FLAG_INVALID_DATA 0x20
273 #define EC_BATT_FLAG_CUT_OFF 0x40
275 /* Switch flags at EC_MEMMAP_SWITCHES */
276 #define EC_SWITCH_LID_OPEN 0x01
277 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
278 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
279 /* Was recovery requested via keyboard; now unused. */
280 #define EC_SWITCH_IGNORE1 0x08
281 /* Recovery requested via dedicated signal (from servo board) */
282 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
283 /* Was fake developer mode switch; now unused. Remove in next refactor. */
284 #define EC_SWITCH_IGNORE0 0x20
286 /* Host command interface flags */
287 /* Host command interface supports LPC args (LPC interface only) */
288 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
289 /* Host command interface supports version 3 protocol */
290 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
292 /* Wireless switch flags */
293 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
294 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
295 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
296 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
297 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
299 /*****************************************************************************/
303 * These are valid ONLY on the ACPI command/data port.
307 * ACPI Read Embedded Controller
309 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
311 * Use the following sequence:
313 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
314 * - Wait for EC_LPC_CMDR_PENDING bit to clear
315 * - Write address to EC_LPC_ADDR_ACPI_DATA
316 * - Wait for EC_LPC_CMDR_DATA bit to set
317 * - Read value from EC_LPC_ADDR_ACPI_DATA
319 #define EC_CMD_ACPI_READ 0x0080
322 * ACPI Write Embedded Controller
324 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
326 * Use the following sequence:
328 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
329 * - Wait for EC_LPC_CMDR_PENDING bit to clear
330 * - Write address to EC_LPC_ADDR_ACPI_DATA
331 * - Wait for EC_LPC_CMDR_PENDING bit to clear
332 * - Write value to EC_LPC_ADDR_ACPI_DATA
334 #define EC_CMD_ACPI_WRITE 0x0081
337 * ACPI Burst Enable Embedded Controller
339 * This enables burst mode on the EC to allow the host to issue several
340 * commands back-to-back. While in this mode, writes to mapped multi-byte
341 * data are locked out to ensure data consistency.
343 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
346 * ACPI Burst Disable Embedded Controller
348 * This disables burst mode on the EC and stops preventing EC writes to mapped
351 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
354 * ACPI Query Embedded Controller
356 * This clears the lowest-order bit in the currently pending host events, and
357 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
358 * event 0x80000000 = 32), or 0 if no event was pending.
360 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
362 /* Valid addresses in ACPI memory space, for read/write commands */
364 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
365 #define EC_ACPI_MEM_VERSION 0x00
367 * Test location; writing value here updates test compliment byte to (0xff -
370 #define EC_ACPI_MEM_TEST 0x01
371 /* Test compliment; writes here are ignored. */
372 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
374 /* Keyboard backlight brightness percent (0 - 100) */
375 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
376 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
377 #define EC_ACPI_MEM_FAN_DUTY 0x04
380 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
381 * independent thresholds attached to them. The current value of the ID
382 * register determines which sensor is affected by the THRESHOLD and COMMIT
383 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
384 * as the memory-mapped sensors. The COMMIT register applies those settings.
386 * The spec does not mandate any way to read back the threshold settings
387 * themselves, but when a threshold is crossed the AP needs a way to determine
388 * which sensor(s) are responsible. Each reading of the ID register clears and
389 * returns one sensor ID that has crossed one of its threshold (in either
390 * direction) since the last read. A value of 0xFF means "no new thresholds
391 * have tripped". Setting or enabling the thresholds for a sensor will clear
392 * the unread event count for that sensor.
394 #define EC_ACPI_MEM_TEMP_ID 0x05
395 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
396 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
398 * Here are the bits for the COMMIT register:
399 * bit 0 selects the threshold index for the chosen sensor (0/1)
400 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
401 * Each write to the commit register affects one threshold.
403 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
404 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
408 * Set the thresholds for sensor 2 to 50 C and 60 C:
409 * write 2 to [0x05] -- select temp sensor 2
410 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
411 * write 0x2 to [0x07] -- enable threshold 0 with this value
412 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
413 * write 0x3 to [0x07] -- enable threshold 1 with this value
415 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
416 * write 2 to [0x05] -- select temp sensor 2
417 * write 0x1 to [0x07] -- disable threshold 1
420 /* DPTF battery charging current limit */
421 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
423 /* Charging limit is specified in 64 mA steps */
424 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
425 /* Value to disable DPTF battery charging limit */
426 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
429 * Report device orientation
431 * 4 Off Body/On Body status: 0 = Off Body.
432 * 3:1 Device DPTF Profile Number (DDPN)
433 * 0 = Reserved for backward compatibility (indicates no valid
434 * profile number. Host should fall back to using TBMD).
435 * 1..7 = DPTF Profile number to indicate to host which table needs
437 * 0 Tablet Mode Device Indicator (TBMD)
439 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
440 #define EC_ACPI_MEM_TBMD_SHIFT 0
441 #define EC_ACPI_MEM_TBMD_MASK 0x1
442 #define EC_ACPI_MEM_DDPN_SHIFT 1
443 #define EC_ACPI_MEM_DDPN_MASK 0x7
444 #define EC_ACPI_MEM_STTB_SHIFT 4
445 #define EC_ACPI_MEM_STTB_MASK 0x1
448 * Report device features. Uses the same format as the host command, except:
450 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
451 * of features", which is of limited interest when the system is already
452 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
453 * these are supported, it defaults to 0.
454 * This allows detecting the presence of this field since older versions of
455 * the EC codebase would simply return 0xff to that unknown address. Check
456 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
459 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
460 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
461 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
462 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
463 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
464 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
465 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
466 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
468 #define EC_ACPI_MEM_BATTERY_INDEX 0x12
471 * USB Port Power. Each bit indicates whether the corresponding USB ports' power
472 * is enabled (1) or disabled (0).
473 * bit 0 USB port ID 0
475 * bit 7 USB port ID 7
477 #define EC_ACPI_MEM_USB_PORT_POWER 0x13
480 * USB Retimer firmware update.
482 * Result of last operation AP requested
484 * bits[3:0]: USB-C port number
485 * bits[7:4]: Operation requested by AP
487 * NDA (no device attached) case:
488 * To update retimer firmware, AP needs set up TBT Alt mode.
489 * AP requests operations in this sequence:
490 * 1. Get port information about which ports support retimer firmware update.
491 * In the query result, each bit represents one port.
492 * 2. Get current MUX mode, it's NDA.
493 * 3. Suspend specified PD port's task.
494 * 4. AP requests EC to enter USB mode -> enter Safe mode -> enter TBT mode ->
495 * update firmware -> disconnect MUX -> resume PD task.
497 * DA (device attached) cases:
498 * Retimer firmware update is not supported in DA cases.
499 * 1. Get port information about which ports support retimer firmware update
500 * 2. Get current MUX mode, it's DA.
501 * 3. AP continues. No more retimer firmware update activities.
504 #define EC_ACPI_MEM_USB_RETIMER_FW_UPDATE 0x14
506 #define USB_RETIMER_FW_UPDATE_OP_SHIFT 4
507 #define USB_RETIMER_FW_UPDATE_ERR 0xfe
508 #define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff
509 /* Mask to clear unused MUX bits in retimer firmware update */
510 #define USB_RETIMER_FW_UPDATE_MUX_MASK \
511 (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | \
512 USB_PD_MUX_SAFE_MODE | USB_PD_MUX_TBT_COMPAT_ENABLED | \
513 USB_PD_MUX_USB4_ENABLED)
515 /* Retimer firmware update operations */
516 #define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */
517 #define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */
518 #define USB_RETIMER_FW_UPDATE_RESUME_PD 2 /* Resume PD port */
519 #define USB_RETIMER_FW_UPDATE_GET_MUX 3 /* Read current USB MUX */
520 #define USB_RETIMER_FW_UPDATE_SET_USB 4 /* Set MUX to USB mode */
521 #define USB_RETIMER_FW_UPDATE_SET_SAFE 5 /* Set MUX to Safe mode */
522 #define USB_RETIMER_FW_UPDATE_SET_TBT 6 /* Set MUX to TBT mode */
523 #define USB_RETIMER_FW_UPDATE_DISCONNECT 7 /* Set MUX to disconnect */
525 #define EC_ACPI_MEM_USB_RETIMER_PORT(x) ((x) & 0x0f)
526 #define EC_ACPI_MEM_USB_RETIMER_OP(x) \
527 (((x) & 0xf0) >> USB_RETIMER_FW_UPDATE_OP_SHIFT)
530 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
531 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
533 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20
534 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0
536 /* Current version of ACPI memory address space */
537 #define EC_ACPI_MEM_VERSION_CURRENT 2
540 * This header file is used in coreboot both in C and ACPI code. The ACPI code
541 * is pre-processed to handle constants but the ASL compiler is unable to
542 * handle actual C code so keep it separate.
548 * Define __packed if someone hasn't beat us to it. Linux kernel style
549 * checking prefers __packed over __attribute__((packed)).
552 #define __packed __attribute__((packed))
556 #define __aligned(x) __attribute__((aligned(x)))
558 #endif /* __KERNEL__ */
561 * Attributes for EC request and response packets. Just defining __packed
562 * results in inefficient assembly code on ARM, if the structure is actually
563 * 32-bit aligned, as it should be for all buffers.
565 * Be very careful when adding these to existing structures. They will round
566 * up the structure size to the specified boundary.
568 * Also be very careful to make that if a structure is included in some other
569 * parent structure that the alignment will still be true given the packing of
570 * the parent structure. This is particularly important if the sub-structure
571 * will be passed as a pointer to another function, since that function will
572 * not know about the misalignment caused by the parent structure's packing.
574 * Also be very careful using __packed - particularly when nesting non-packed
575 * structures inside packed ones. In fact, DO NOT use __packed directly;
576 * always use one of these attributes.
578 * Once everything is annotated properly, the following search strings should
579 * not return ANY matches in this file other than right here:
581 * "__packed" - generates inefficient code; all sub-structs must also be packed
583 * "struct [^_]" - all structs should be annotated, except for structs that are
584 * members of other structs/unions (and their original declarations should be
587 #ifdef CONFIG_HOSTCMD_ALIGNED
590 * Packed structures where offset and size are always aligned to 1, 2, or 4
593 #define __ec_align1 __packed
594 #define __ec_align2 __packed __aligned(2)
595 #define __ec_align4 __packed __aligned(4)
598 * Packed structure which must be under-aligned, because its size is not a
599 * 4-byte multiple. This is sub-optimal because it forces byte-wise access
600 * of all multi-byte fields in it, even though they are themselves aligned.
602 * In theory, we could duplicate the structure with __aligned(4) for accessing
603 * its members, but use the __packed version for sizeof().
605 #define __ec_align_size1 __packed
608 * Packed structure which must be under-aligned, because its offset inside a
609 * parent structure is not a 4-byte multiple.
611 #define __ec_align_offset1 __packed
612 #define __ec_align_offset2 __packed __aligned(2)
615 * Structures which are complicated enough that I'm skipping them on the first
616 * pass. They are effectively unchanged from their previous definitions.
618 * TODO(rspangler): Figure out what to do with these. It's likely necessary
619 * to work out the size and offset of each member and add explicit padding to
622 #define __ec_todo_packed __packed
623 #define __ec_todo_unpacked
625 #else /* !CONFIG_HOSTCMD_ALIGNED */
628 * Packed structures make no assumption about alignment, so they do inefficient
631 #define __ec_align1 __packed
632 #define __ec_align2 __packed
633 #define __ec_align4 __packed
634 #define __ec_align_size1 __packed
635 #define __ec_align_offset1 __packed
636 #define __ec_align_offset2 __packed
637 #define __ec_todo_packed __packed
638 #define __ec_todo_unpacked
640 #endif /* !CONFIG_HOSTCMD_ALIGNED */
642 /* LPC command status byte masks */
643 /* EC has written a byte in the data register and host hasn't read it yet */
644 #define EC_LPC_STATUS_TO_HOST 0x01
645 /* Host has written a command/data byte and the EC hasn't read it yet */
646 #define EC_LPC_STATUS_FROM_HOST 0x02
647 /* EC is processing a command */
648 #define EC_LPC_STATUS_PROCESSING 0x04
649 /* Last write to EC was a command, not data */
650 #define EC_LPC_STATUS_LAST_CMD 0x08
651 /* EC is in burst mode */
652 #define EC_LPC_STATUS_BURST_MODE 0x10
653 /* SCI event is pending (requesting SCI query) */
654 #define EC_LPC_STATUS_SCI_PENDING 0x20
655 /* SMI event is pending (requesting SMI query) */
656 #define EC_LPC_STATUS_SMI_PENDING 0x40
658 #define EC_LPC_STATUS_RESERVED 0x80
661 * EC is busy. This covers both the EC processing a command, and the host has
662 * written a new command but the EC hasn't picked it up yet.
664 #define EC_LPC_STATUS_BUSY_MASK \
665 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
668 * Host command response codes (16-bit).
672 EC_RES_INVALID_COMMAND
= 1,
674 EC_RES_INVALID_PARAM
= 3,
675 EC_RES_ACCESS_DENIED
= 4,
676 EC_RES_INVALID_RESPONSE
= 5,
677 EC_RES_INVALID_VERSION
= 6,
678 EC_RES_INVALID_CHECKSUM
= 7,
679 EC_RES_IN_PROGRESS
= 8, /* Accepted, command in progress */
680 EC_RES_UNAVAILABLE
= 9, /* No response available */
681 EC_RES_TIMEOUT
= 10, /* We got a timeout */
682 EC_RES_OVERFLOW
= 11, /* Table / data overflow */
683 EC_RES_INVALID_HEADER
= 12, /* Header contains invalid data */
684 EC_RES_REQUEST_TRUNCATED
= 13, /* Didn't get the entire request */
685 EC_RES_RESPONSE_TOO_BIG
= 14, /* Response was too big to handle */
686 EC_RES_BUS_ERROR
= 15, /* Communications bus error */
687 EC_RES_BUSY
= 16, /* Up but too busy. Should retry */
688 EC_RES_INVALID_HEADER_VERSION
= 17, /* Header version invalid */
689 EC_RES_INVALID_HEADER_CRC
= 18, /* Header CRC invalid */
690 EC_RES_INVALID_DATA_CRC
= 19, /* Data CRC invalid */
691 EC_RES_DUP_UNAVAILABLE
= 20, /* Can't resend response */
695 EC_RES_MAX
= UINT16_MAX
, /**< Force enum to be 16 bits */
697 BUILD_ASSERT(sizeof(enum ec_status
) == sizeof(uint16_t));
698 #ifdef CONFIG_EC_HOST_CMD
700 * Make sure Zephyre uses the same status codes.
702 #include <zephyr/mgmt/ec_host_cmd/ec_host_cmd.h>
704 BUILD_ASSERT((uint16_t)EC_RES_SUCCESS
== (uint16_t)EC_HOST_CMD_SUCCESS
);
705 BUILD_ASSERT((uint16_t)EC_RES_INVALID_COMMAND
==
706 (uint16_t)EC_HOST_CMD_INVALID_COMMAND
);
707 BUILD_ASSERT((uint16_t)EC_RES_ERROR
== (uint16_t)EC_HOST_CMD_ERROR
);
708 BUILD_ASSERT((uint16_t)EC_RES_INVALID_PARAM
==
709 (uint16_t)EC_HOST_CMD_INVALID_PARAM
);
710 BUILD_ASSERT((uint16_t)EC_RES_ACCESS_DENIED
==
711 (uint16_t)EC_HOST_CMD_ACCESS_DENIED
);
712 BUILD_ASSERT((uint16_t)EC_RES_INVALID_RESPONSE
==
713 (uint16_t)EC_HOST_CMD_INVALID_RESPONSE
);
714 BUILD_ASSERT((uint16_t)EC_RES_INVALID_VERSION
==
715 (uint16_t)EC_HOST_CMD_INVALID_VERSION
);
716 BUILD_ASSERT((uint16_t)EC_RES_INVALID_CHECKSUM
==
717 (uint16_t)EC_HOST_CMD_INVALID_CHECKSUM
);
718 BUILD_ASSERT((uint16_t)EC_RES_IN_PROGRESS
== (uint16_t)EC_HOST_CMD_IN_PROGRESS
);
719 BUILD_ASSERT((uint16_t)EC_RES_UNAVAILABLE
== (uint16_t)EC_HOST_CMD_UNAVAILABLE
);
720 BUILD_ASSERT((uint16_t)EC_RES_TIMEOUT
== (uint16_t)EC_HOST_CMD_TIMEOUT
);
721 BUILD_ASSERT((uint16_t)EC_RES_OVERFLOW
== (uint16_t)EC_HOST_CMD_OVERFLOW
);
722 BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER
==
723 (uint16_t)EC_HOST_CMD_INVALID_HEADER
);
724 BUILD_ASSERT((uint16_t)EC_RES_REQUEST_TRUNCATED
==
725 (uint16_t)EC_HOST_CMD_REQUEST_TRUNCATED
);
726 BUILD_ASSERT((uint16_t)EC_RES_RESPONSE_TOO_BIG
==
727 (uint16_t)EC_HOST_CMD_RESPONSE_TOO_BIG
);
728 BUILD_ASSERT((uint16_t)EC_RES_BUS_ERROR
== (uint16_t)EC_HOST_CMD_BUS_ERROR
);
729 BUILD_ASSERT((uint16_t)EC_RES_BUSY
== (uint16_t)EC_HOST_CMD_BUSY
);
730 BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER_VERSION
==
731 (uint16_t)EC_HOST_CMD_INVALID_HEADER_VERSION
);
732 BUILD_ASSERT((uint16_t)EC_RES_INVALID_HEADER_CRC
==
733 (uint16_t)EC_HOST_CMD_INVALID_HEADER_CRC
);
734 BUILD_ASSERT((uint16_t)EC_RES_INVALID_DATA_CRC
==
735 (uint16_t)EC_HOST_CMD_INVALID_DATA_CRC
);
736 BUILD_ASSERT((uint16_t)EC_RES_DUP_UNAVAILABLE
==
737 (uint16_t)EC_HOST_CMD_DUP_UNAVAILABLE
);
738 BUILD_ASSERT((uint16_t)EC_RES_MAX
== (uint16_t)EC_HOST_CMD_MAX
);
742 /* clang-format off */
743 #define EC_STATUS_TEXT \
745 EC_MAP_ITEM(EC_RES_SUCCESS, SUCCESS), \
746 EC_MAP_ITEM(EC_RES_INVALID_COMMAND, INVALID_COMMAND), \
747 EC_MAP_ITEM(EC_RES_ERROR, ERROR), \
748 EC_MAP_ITEM(EC_RES_INVALID_PARAM, INVALID_PARAM), \
749 EC_MAP_ITEM(EC_RES_ACCESS_DENIED, ACCESS_DENIED), \
750 EC_MAP_ITEM(EC_RES_INVALID_RESPONSE, INVALID_RESPONSE), \
751 EC_MAP_ITEM(EC_RES_INVALID_VERSION, INVALID_VERSION), \
752 EC_MAP_ITEM(EC_RES_INVALID_CHECKSUM, INVALID_CHECKSUM), \
753 EC_MAP_ITEM(EC_RES_IN_PROGRESS, IN_PROGRESS), \
754 EC_MAP_ITEM(EC_RES_UNAVAILABLE, UNAVAILABLE), \
755 EC_MAP_ITEM(EC_RES_TIMEOUT, TIMEOUT), \
756 EC_MAP_ITEM(EC_RES_OVERFLOW, OVERFLOW), \
757 EC_MAP_ITEM(EC_RES_INVALID_HEADER, INVALID_HEADER), \
758 EC_MAP_ITEM(EC_RES_REQUEST_TRUNCATED, REQUEST_TRUNCATED), \
759 EC_MAP_ITEM(EC_RES_RESPONSE_TOO_BIG, RESPONSE_TOO_BIG), \
760 EC_MAP_ITEM(EC_RES_BUS_ERROR, BUS_ERROR), \
761 EC_MAP_ITEM(EC_RES_BUSY, BUSY), \
762 EC_MAP_ITEM(EC_RES_INVALID_HEADER_VERSION, INVALID_HEADER_VERSION), \
763 EC_MAP_ITEM(EC_RES_INVALID_HEADER_CRC, INVALID_HEADER_CRC), \
764 EC_MAP_ITEM(EC_RES_INVALID_DATA_CRC, INVALID_DATA_CRC), \
765 EC_MAP_ITEM(EC_RES_DUP_UNAVAILABLE, DUP_UNAVAILABLE), \
767 /* clang-format on */
770 #define EC_MAP_ITEM(k, v) [k] = #v
771 BUILD_ASSERT(ARRAY_SIZE(((const char *[])EC_STATUS_TEXT
)) == EC_RES_COUNT
);
776 * Host event codes. ACPI query EC command uses code 0 to mean "no event
777 * pending". We explicitly specify each value in the enum listing so they won't
778 * change if we delete/insert an item or rearrange the list (it needs to be
779 * stable across platforms, not just within a single compiled instance).
781 enum host_event_code
{
782 EC_HOST_EVENT_NONE
= 0,
783 EC_HOST_EVENT_LID_CLOSED
= 1,
784 EC_HOST_EVENT_LID_OPEN
= 2,
785 EC_HOST_EVENT_POWER_BUTTON
= 3,
786 EC_HOST_EVENT_AC_CONNECTED
= 4,
787 EC_HOST_EVENT_AC_DISCONNECTED
= 5,
788 EC_HOST_EVENT_BATTERY_LOW
= 6,
789 EC_HOST_EVENT_BATTERY_CRITICAL
= 7,
790 EC_HOST_EVENT_BATTERY
= 8,
791 EC_HOST_EVENT_THERMAL_THRESHOLD
= 9,
792 /* Event generated by a device attached to the EC */
793 EC_HOST_EVENT_DEVICE
= 10,
794 EC_HOST_EVENT_THERMAL
= 11,
795 /* GPU related event. Formerly named EC_HOST_EVENT_USB_CHARGER. */
796 EC_HOST_EVENT_GPU
= 12,
797 EC_HOST_EVENT_KEY_PRESSED
= 13,
799 * EC has finished initializing the host interface. The host can check
800 * for this event following sending a EC_CMD_REBOOT_EC command to
801 * determine when the EC is ready to accept subsequent commands.
803 EC_HOST_EVENT_INTERFACE_READY
= 14,
804 /* Keyboard recovery combo has been pressed */
805 EC_HOST_EVENT_KEYBOARD_RECOVERY
= 15,
807 /* Shutdown due to thermal overload */
808 EC_HOST_EVENT_THERMAL_SHUTDOWN
= 16,
809 /* Shutdown due to battery level too low */
810 EC_HOST_EVENT_BATTERY_SHUTDOWN
= 17,
812 /* Suggest that the AP throttle itself */
813 EC_HOST_EVENT_THROTTLE_START
= 18,
814 /* Suggest that the AP resume normal speed */
815 EC_HOST_EVENT_THROTTLE_STOP
= 19,
817 /* Hang detect logic detected a hang and host event timeout expired */
818 EC_HOST_EVENT_HANG_DETECT
= 20,
819 /* Hang detect logic detected a hang and warm rebooted the AP */
820 EC_HOST_EVENT_HANG_REBOOT
= 21,
822 /* PD MCU triggering host event */
823 EC_HOST_EVENT_PD_MCU
= 22,
825 /* Battery Status flags have changed */
826 EC_HOST_EVENT_BATTERY_STATUS
= 23,
828 /* EC encountered a panic, triggering a reset */
829 EC_HOST_EVENT_PANIC
= 24,
831 /* Keyboard fastboot combo has been pressed */
832 EC_HOST_EVENT_KEYBOARD_FASTBOOT
= 25,
834 /* EC RTC event occurred */
835 EC_HOST_EVENT_RTC
= 26,
837 /* Emulate MKBP event */
838 EC_HOST_EVENT_MKBP
= 27,
840 /* EC desires to change state of host-controlled USB mux */
841 EC_HOST_EVENT_USB_MUX
= 28,
844 * The device has changed "modes". This can be one of the following:
846 * - TABLET/LAPTOP mode
847 * - detachable base attach/detach event
848 * - on body/off body transition event
850 EC_HOST_EVENT_MODE_CHANGE
= 29,
852 /* Keyboard recovery combo with hardware reinitialization */
853 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT
= 30,
856 EC_HOST_EVENT_WOV
= 31,
859 * The high bit of the event mask is not used as a host event code. If
860 * it reads back as set, then the entire event mask should be
861 * considered invalid by the host. This can happen when reading the
862 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
863 * not initialized on the EC, or improperly configured on the host.
865 EC_HOST_EVENT_INVALID
= 32,
867 /* Body detect (lap/desk) change event */
868 EC_HOST_EVENT_BODY_DETECT_CHANGE
= 33,
871 * Only 64 host events are supported. This enum uses 1-based counting so
872 * it can skip 0 (NONE), so the last legal host event number is 64.
876 /* Host event mask */
877 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code)-1)
879 /* clang-format off */
880 #define HOST_EVENT_TEXT \
882 [EC_HOST_EVENT_NONE] = "NONE", \
883 [EC_HOST_EVENT_LID_CLOSED] = "LID_CLOSED", \
884 [EC_HOST_EVENT_LID_OPEN] = "LID_OPEN", \
885 [EC_HOST_EVENT_POWER_BUTTON] = "POWER_BUTTON", \
886 [EC_HOST_EVENT_AC_CONNECTED] = "AC_CONNECTED", \
887 [EC_HOST_EVENT_AC_DISCONNECTED] = "AC_DISCONNECTED", \
888 [EC_HOST_EVENT_BATTERY_LOW] = "BATTERY_LOW", \
889 [EC_HOST_EVENT_BATTERY_CRITICAL] = "BATTERY_CRITICAL", \
890 [EC_HOST_EVENT_BATTERY] = "BATTERY", \
891 [EC_HOST_EVENT_THERMAL_THRESHOLD] = "THERMAL_THRESHOLD", \
892 [EC_HOST_EVENT_DEVICE] = "DEVICE", \
893 [EC_HOST_EVENT_THERMAL] = "THERMAL", \
894 [EC_HOST_EVENT_GPU] = "GPU", \
895 [EC_HOST_EVENT_KEY_PRESSED] = "KEY_PRESSED", \
896 [EC_HOST_EVENT_INTERFACE_READY] = "INTERFACE_READY", \
897 [EC_HOST_EVENT_KEYBOARD_RECOVERY] = "KEYBOARD_RECOVERY", \
898 [EC_HOST_EVENT_THERMAL_SHUTDOWN] = "THERMAL_SHUTDOWN", \
899 [EC_HOST_EVENT_BATTERY_SHUTDOWN] = "BATTERY_SHUTDOWN", \
900 [EC_HOST_EVENT_THROTTLE_START] = "THROTTLE_START", \
901 [EC_HOST_EVENT_THROTTLE_STOP] = "THROTTLE_STOP", \
902 [EC_HOST_EVENT_HANG_DETECT] = "HANG_DETECT", \
903 [EC_HOST_EVENT_HANG_REBOOT] = "HANG_REBOOT", \
904 [EC_HOST_EVENT_PD_MCU] = "PD_MCU", \
905 [EC_HOST_EVENT_BATTERY_STATUS] = "BATTERY_STATUS", \
906 [EC_HOST_EVENT_PANIC] = "PANIC", \
907 [EC_HOST_EVENT_KEYBOARD_FASTBOOT] = "KEYBOARD_FASTBOOT", \
908 [EC_HOST_EVENT_RTC] = "RTC", \
909 [EC_HOST_EVENT_MKBP] = "MKBP", \
910 [EC_HOST_EVENT_USB_MUX] = "USB_MUX", \
911 [EC_HOST_EVENT_MODE_CHANGE] = "MODE_CHANGE", \
912 [EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT] = \
913 "KEYBOARD_RECOVERY_HW_REINIT", \
914 [EC_HOST_EVENT_WOV] = "WOV", \
915 [EC_HOST_EVENT_INVALID] = "INVALID", \
916 [EC_HOST_EVENT_BODY_DETECT_CHANGE] = "BODY_DETECT_CHANGE", \
918 /* clang-format on */
921 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
922 * @flags: The host argument flags.
923 * @command_version: Command version.
924 * @data_size: The length of data.
925 * @checksum: Checksum; sum of command + flags + command_version + data_size +
926 * all params/response data bytes.
928 struct ec_lpc_host_args
{
930 uint8_t command_version
;
935 /* Flags for ec_lpc_host_args.flags */
937 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
940 * If EC gets a command and this flag is not set, this is an old-style command.
941 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
942 * unknown length. EC must respond with an old-style response (that is,
943 * without setting EC_HOST_ARGS_FLAG_TO_HOST).
945 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
947 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
949 * If EC responds to a command and this flag is not set, this is an old-style
950 * response. Command version is 0 and response data from EC is at
951 * EC_LPC_ADDR_OLD_PARAM with unknown length.
953 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
955 /*****************************************************************************/
957 * Byte codes returned by EC over SPI interface.
959 * These can be used by the AP to debug the EC interface, and to determine
960 * when the EC is not in a state where it will ever get around to responding
963 * Example of sequence of bytes read from EC for a current good transfer:
964 * 1. - - AP asserts chip select (CS#)
965 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
966 * 3. - - EC starts handling CS# interrupt
967 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
968 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
969 * bytes looking for EC_SPI_FRAME_START
970 * 6. - - EC finishes processing and sets up response
971 * 7. EC_SPI_FRAME_START - AP reads frame byte
972 * 8. (response packet) - AP reads response packet
973 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
974 * 10 - - AP deasserts chip select
975 * 11 - - EC processes CS# interrupt and sets up DMA for
978 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
979 * the following byte values:
985 * Then the EC found an error in the request, or was not ready for the request
986 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
987 * because the EC is unable to tell when the AP is done sending its request.
991 * Framing byte which precedes a response packet from the EC. After sending a
992 * request, the AP will clock in bytes until it sees the framing byte, then
993 * clock in the response packet.
995 #define EC_SPI_FRAME_START 0xec
998 * Padding bytes which are clocked out after the end of a response packet.
1000 #define EC_SPI_PAST_END 0xed
1003 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
1004 * that the AP will send a valid packet header (starting with
1005 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
1007 * NOTE: Some SPI configurations place the Most Significant Bit on SDO when
1008 * CS goes low. This macro has the Most Significant Bit set to zero,
1009 * so SDO will not be driven high when CS goes low.
1011 #define EC_SPI_RX_READY 0x78
1014 * EC has started receiving the request from the AP, but hasn't started
1015 * processing it yet.
1017 #define EC_SPI_RECEIVING 0xf9
1019 /* EC has received the entire request from the AP and is processing it. */
1020 #define EC_SPI_PROCESSING 0xfa
1023 * EC received bad data from the AP, such as a packet header with an invalid
1024 * length. EC will ignore all data until chip select deasserts.
1026 #define EC_SPI_RX_BAD_DATA 0xfb
1029 * EC received data from the AP before it was ready. That is, the AP asserted
1030 * chip select and started clocking data before the EC was ready to receive it.
1031 * EC will ignore all data until chip select deasserts.
1033 #define EC_SPI_NOT_READY 0xfc
1036 * EC was ready to receive a request from the AP. EC has treated the byte sent
1037 * by the AP as part of a request packet, or (for old-style ECs) is processing
1038 * a fully received packet but is not ready to respond yet.
1040 #define EC_SPI_OLD_READY 0xfd
1042 /*****************************************************************************/
1045 * Protocol version 2 for I2C and SPI send a request this way:
1047 * 0 EC_CMD_VERSION0 + (command version)
1049 * 2 Length of params = N
1050 * 3..N+2 Params, if any
1051 * N+3 8-bit checksum of bytes 0..N+2
1053 * The corresponding response is:
1055 * 0 Result code (EC_RES_*)
1056 * 1 Length of params = M
1057 * 2..M+1 Params, if any
1058 * M+2 8-bit checksum of bytes 0..M+1
1060 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
1061 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
1062 #define EC_PROTO2_REQUEST_OVERHEAD \
1063 (EC_PROTO2_REQUEST_HEADER_BYTES + EC_PROTO2_REQUEST_TRAILER_BYTES)
1065 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
1066 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
1067 #define EC_PROTO2_RESPONSE_OVERHEAD \
1068 (EC_PROTO2_RESPONSE_HEADER_BYTES + EC_PROTO2_RESPONSE_TRAILER_BYTES)
1070 /* Parameter length was limited by the LPC interface */
1071 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
1073 /* Maximum request and response packet sizes for protocol version 2 */
1074 #define EC_PROTO2_MAX_REQUEST_SIZE \
1075 (EC_PROTO2_REQUEST_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)
1076 #define EC_PROTO2_MAX_RESPONSE_SIZE \
1077 (EC_PROTO2_RESPONSE_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)
1079 /*****************************************************************************/
1082 * Value written to legacy command port / prefix byte to indicate protocol
1083 * 3+ structs are being used. Usage is bus-dependent.
1085 #define EC_COMMAND_PROTOCOL_3 0xda
1087 #define EC_HOST_REQUEST_VERSION 3
1090 * struct ec_host_request - Version 3 request from host.
1091 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
1092 * receives a header with a version it doesn't know how to
1094 * @checksum: Checksum of request and data; sum of all bytes including checksum
1095 * should total to 0.
1096 * @command: Command to send (EC_CMD_...)
1097 * @command_version: Command version.
1098 * @reserved: Unused byte in current protocol version; set to 0.
1099 * @data_len: Length of data which follows this header.
1101 struct ec_host_request
{
1102 uint8_t struct_version
;
1105 uint8_t command_version
;
1110 #define EC_HOST_RESPONSE_VERSION 3
1113 * struct ec_host_response - Version 3 response from EC.
1114 * @struct_version: Struct version (=3).
1115 * @checksum: Checksum of response and data; sum of all bytes including
1116 * checksum should total to 0.
1117 * @result: EC's response to the command (separate from communication failure)
1118 * @data_len: Length of data which follows this header.
1119 * @reserved: Unused bytes in current protocol version; set to 0.
1121 struct ec_host_response
{
1122 uint8_t struct_version
;
1129 /*****************************************************************************/
1132 * Host command protocol V4.
1134 * Packets always start with a request or response header. They are followed
1135 * by data_len bytes of data. If the data_crc_present flag is set, the data
1136 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1
1139 * Host algorithm when sending a request q:
1141 * 101) tries_left=(some value, e.g. 3);
1144 * 104) Calculate q.header_crc.
1145 * 105) Send request q to EC.
1146 * 106) Wait for response r. Go to 201 if received or 301 if timeout.
1148 * 201) If r.struct_version != 4, go to 301.
1149 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
1150 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
1151 * 204) If r.seq_num != q.seq_num, go to 301.
1152 * 205) If r.seq_dup == q.seq_dup, return success.
1153 * 207) If r.seq_dup == 1, go to 301.
1154 * 208) Return error.
1156 * 301) If --tries_left <= 0, return error.
1157 * 302) If q.seq_dup == 1, go to 105.
1158 * 303) q.seq_dup = 1
1161 * EC algorithm when receiving a request q.
1162 * EC has response buffer r, error buffer e.
1164 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
1166 * 102) If q.header_crc mismatches calculated CRC, set e.result =
1167 * EC_RES_INVALID_HEADER_CRC and go to 301
1168 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC
1169 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
1171 * 104) If q.seq_dup == 0, go to 201.
1172 * 105) If q.seq_num != r.seq_num, go to 201.
1173 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
1175 * 201) Process request q into response r.
1176 * 202) r.seq_num = q.seq_num
1177 * 203) r.seq_dup = q.seq_dup
1178 * 204) Calculate r.header_crc
1179 * 205) If r.data_len > 0 and data is no longer available, set e.result =
1180 * EC_RES_DUP_UNAVAILABLE and go to 301.
1181 * 206) Send response r.
1183 * 301) e.seq_num = q.seq_num
1184 * 302) e.seq_dup = q.seq_dup
1185 * 303) Calculate e.header_crc.
1186 * 304) Send error response e.
1189 /* Version 4 request from host */
1190 struct ec_host_request4
{
1192 * bits 0-3: struct_version: Structure version (=4)
1193 * bit 4: is_response: Is response (=0)
1194 * bits 5-6: seq_num: Sequence number
1195 * bit 7: seq_dup: Sequence duplicate flag
1200 * bits 0-4: command_version: Command version
1201 * bits 5-6: Reserved (set 0, ignore on read)
1202 * bit 7: data_crc_present: Is data CRC present after data
1206 /* Command code (EC_CMD_*) */
1209 /* Length of data which follows this header (not including data CRC) */
1212 /* Reserved (set 0, ignore on read) */
1215 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
1219 /* Version 4 response from EC */
1220 struct ec_host_response4
{
1222 * bits 0-3: struct_version: Structure version (=4)
1223 * bit 4: is_response: Is response (=1)
1224 * bits 5-6: seq_num: Sequence number
1225 * bit 7: seq_dup: Sequence duplicate flag
1230 * bits 0-6: Reserved (set 0, ignore on read)
1231 * bit 7: data_crc_present: Is data CRC present after data
1235 /* Result code (EC_RES_*) */
1238 /* Length of data which follows this header (not including data CRC) */
1241 /* Reserved (set 0, ignore on read) */
1244 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
1248 /* Fields in fields0 byte */
1249 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
1250 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
1251 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5
1252 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60
1253 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80
1255 /* Fields in fields1 byte */
1256 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */
1257 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
1259 /*****************************************************************************/
1261 * Notes on commands:
1263 * Each command is an 16-bit command value. Commands which take params or
1264 * return response data specify structures for that data. If no structure is
1265 * specified, the command does not input or output data, respectively.
1266 * Parameter/response length is implicit in the structs. Some underlying
1267 * communication protocols (I2C, SPI) may add length or checksum headers, but
1268 * those are implementation-dependent and not defined here.
1270 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
1271 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
1274 /*****************************************************************************/
1275 /* General / test commands */
1278 * Get protocol version, used to deal with non-backward compatible protocol
1281 #define EC_CMD_PROTO_VERSION 0x0000
1284 * struct ec_response_proto_version - Response to the proto version command.
1285 * @version: The protocol version.
1287 struct ec_response_proto_version
{
1292 * Hello. This is a simple command to test the EC is responsive to
1295 #define EC_CMD_HELLO 0x0001
1298 * struct ec_params_hello - Parameters to the hello command.
1299 * @in_data: Pass anything here.
1301 struct ec_params_hello
{
1306 * struct ec_response_hello - Response to the hello command.
1307 * @out_data: Output will be in_data + 0x01020304.
1309 struct ec_response_hello
{
1313 /* Get version number */
1314 #define EC_CMD_GET_VERSION 0x0002
1317 EC_IMAGE_UNKNOWN
= 0,
1320 EC_IMAGE_RW_A
= EC_IMAGE_RW
,
1326 * struct ec_response_get_version - Response to the v0 get version command.
1327 * @version_string_ro: Null-terminated RO firmware version string.
1328 * @version_string_rw: Null-terminated RW firmware version string.
1329 * @reserved: Unused bytes; was previously RW-B firmware version string.
1330 * @current_image: One of ec_image.
1332 struct ec_response_get_version
{
1333 char version_string_ro
[32];
1334 char version_string_rw
[32];
1335 char reserved
[32]; /* Changed to cros_fwid_ro in version 1 */
1336 uint32_t current_image
;
1340 * struct ec_response_get_version_v1 - Response to the v1 get version command.
1342 * ec_response_get_version_v1 is a strict superset of ec_response_get_version.
1343 * The v1 response changes the semantics of one field (reserved to cros_fwid_ro)
1344 * and adds one additional field (cros_fwid_rw).
1346 * @version_string_ro: Null-terminated RO firmware version string.
1347 * @version_string_rw: Null-terminated RW firmware version string.
1348 * @cros_fwid_ro: Null-terminated RO CrOS FWID string.
1349 * @current_image: One of ec_image.
1350 * @cros_fwid_rw: Null-terminated RW CrOS FWID string.
1352 struct ec_response_get_version_v1
{
1353 char version_string_ro
[32];
1354 char version_string_rw
[32];
1355 char cros_fwid_ro
[32]; /* Added in version 1 (Used to be reserved) */
1356 uint32_t current_image
;
1357 char cros_fwid_rw
[32]; /* Added in version 1 */
1360 /* Read test - OBSOLETE */
1361 #define EC_CMD_READ_TEST 0x0003
1364 * Get build information
1366 * Response is null-terminated string.
1368 #define EC_CMD_GET_BUILD_INFO 0x0004
1371 #define EC_CMD_GET_CHIP_INFO 0x0005
1374 * struct ec_response_get_chip_info - Response to the get chip info command.
1375 * @vendor: Null-terminated string for chip vendor.
1376 * @name: Null-terminated string for chip name.
1377 * @revision: Null-terminated string for chip mask version.
1379 struct ec_response_get_chip_info
{
1385 /* Get board HW version */
1386 #define EC_CMD_GET_BOARD_VERSION 0x0006
1389 * struct ec_response_board_version - Response to the board version command.
1390 * @board_version: A monotonously incrementing number.
1392 struct ec_response_board_version
{
1393 uint16_t board_version
;
1397 * Read memory-mapped data.
1399 * This is an alternate interface to memory-mapped data for bus protocols
1400 * which don't support direct-mapped memory - I2C, SPI, etc.
1402 * Response is params.size bytes of data.
1404 #define EC_CMD_READ_MEMMAP 0x0007
1407 * struct ec_params_read_memmap - Parameters for the read memory map command.
1408 * @offset: Offset in memmap (EC_MEMMAP_*).
1409 * @size: Size to read in bytes.
1411 struct ec_params_read_memmap
{
1416 /* Read versions supported for a command */
1417 #define EC_CMD_GET_CMD_VERSIONS 0x0008
1420 * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1421 * @cmd: Command to check.
1423 struct ec_params_get_cmd_versions
{
1428 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1430 * @cmd: Command to check.
1432 struct ec_params_get_cmd_versions_v1
{
1437 * struct ec_response_get_cmd_version - Response to the get command versions.
1438 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1439 * a desired version.
1441 struct ec_response_get_cmd_versions
{
1442 uint32_t version_mask
;
1446 * Check EC communications status (busy). This is needed on i2c/spi but not
1447 * on lpc since it has its own out-of-band busy indicator.
1449 * lpc must read the status from the command register. Attempting this on
1450 * lpc will overwrite the args/parameter space and corrupt its data.
1452 #define EC_CMD_GET_COMMS_STATUS 0x0009
1454 /* Avoid using ec_status which is for return values */
1455 enum ec_comms_status
{
1456 EC_COMMS_STATUS_PROCESSING
= BIT(0), /* Processing cmd */
1460 * struct ec_response_get_comms_status - Response to the get comms status
1462 * @flags: Mask of enum ec_comms_status.
1464 struct ec_response_get_comms_status
{
1465 uint32_t flags
; /* Mask of enum ec_comms_status */
1468 /* Fake a variety of responses, purely for testing purposes. */
1469 #define EC_CMD_TEST_PROTOCOL 0x000A
1471 /* Tell the EC what to send back to us. */
1472 struct ec_params_test_protocol
{
1478 /* Here it comes... */
1479 struct ec_response_test_protocol
{
1483 /* Get protocol information */
1484 #define EC_CMD_GET_PROTOCOL_INFO 0x000B
1486 /* Flags for ec_response_get_protocol_info.flags */
1487 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
1488 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1491 * struct ec_response_get_protocol_info - Response to the get protocol info.
1492 * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1494 * @max_request_packet_size: Maximum request packet size in bytes.
1495 * @max_response_packet_size: Maximum response packet size in bytes.
1496 * @flags: see EC_PROTOCOL_INFO_*
1498 struct ec_response_get_protocol_info
{
1499 /* Fields which exist if at least protocol version 3 supported */
1500 uint32_t protocol_versions
;
1501 uint16_t max_request_packet_size
;
1502 uint16_t max_response_packet_size
;
1506 /*****************************************************************************/
1507 /* Get/Set miscellaneous values */
1509 /* The upper byte of .flags tells what to do (nothing means "get") */
1510 #define EC_GSV_SET 0x80000000
1513 * The lower three bytes of .flags identifies the parameter, if that has
1514 * meaning for an individual command.
1516 #define EC_GSV_PARAM_MASK 0x00ffffff
1518 struct ec_params_get_set_value
{
1523 struct ec_response_get_set_value
{
1528 /* More than one command can use these structs to get/set parameters. */
1529 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1531 /*****************************************************************************/
1532 /* List the features supported by the firmware */
1533 #define EC_CMD_GET_FEATURES 0x000D
1535 /* Supported features */
1536 enum ec_feature_code
{
1538 * This image contains a limited set of features. Another image
1539 * in RW partition may support more features.
1541 EC_FEATURE_LIMITED
= 0,
1543 * Commands for probing/reading/writing/erasing the flash in the
1546 EC_FEATURE_FLASH
= 1,
1548 * Can control the fan speed directly.
1550 EC_FEATURE_PWM_FAN
= 2,
1552 * Can control the intensity of the keyboard backlight.
1554 EC_FEATURE_PWM_KEYB
= 3,
1556 * Support Google lightbar, introduced on Pixel.
1558 EC_FEATURE_LIGHTBAR
= 4,
1559 /* Control of LEDs */
1561 /* Exposes an interface to control gyro and sensors.
1562 * The host goes through the EC to access these sensors.
1563 * In addition, the EC may provide composite sensors, like lid angle.
1565 EC_FEATURE_MOTION_SENSE
= 6,
1566 /* The keyboard is controlled by the EC */
1567 EC_FEATURE_KEYB
= 7,
1568 /* The AP can use part of the EC flash as persistent storage. */
1569 EC_FEATURE_PSTORE
= 8,
1570 /* The EC monitors BIOS port 80h, and can return POST codes. */
1571 EC_FEATURE_PORT80
= 9,
1573 * Thermal management: include TMP specific commands.
1574 * Higher level than direct fan control.
1576 EC_FEATURE_THERMAL
= 10,
1577 /* Can switch the screen backlight on/off */
1578 EC_FEATURE_BKLIGHT_SWITCH
= 11,
1579 /* Can switch the wifi module on/off */
1580 EC_FEATURE_WIFI_SWITCH
= 12,
1581 /* Monitor host events, through for example SMI or SCI */
1582 EC_FEATURE_HOST_EVENTS
= 13,
1583 /* The EC exposes GPIO commands to control/monitor connected devices. */
1584 EC_FEATURE_GPIO
= 14,
1585 /* The EC can send i2c messages to downstream devices. */
1586 EC_FEATURE_I2C
= 15,
1587 /* Command to control charger are included */
1588 EC_FEATURE_CHARGER
= 16,
1589 /* Simple battery support. */
1590 EC_FEATURE_BATTERY
= 17,
1592 * Support Smart battery protocol
1593 * (Common Smart Battery System Interface Specification)
1595 EC_FEATURE_SMART_BATTERY
= 18,
1596 /* EC can detect when the host hangs. */
1597 EC_FEATURE_HANG_DETECT
= 19,
1598 /* Report power information, for pit only */
1599 EC_FEATURE_PMU
= 20,
1600 /* Another Cros EC device is present downstream of this one */
1601 EC_FEATURE_SUB_MCU
= 21,
1602 /* Support USB Power delivery (PD) commands */
1603 EC_FEATURE_USB_PD
= 22,
1604 /* Control USB multiplexer, for audio through USB port for instance. */
1605 EC_FEATURE_USB_MUX
= 23,
1606 /* Motion Sensor code has an internal software FIFO */
1607 EC_FEATURE_MOTION_SENSE_FIFO
= 24,
1608 /* Support temporary secure vstore */
1609 EC_FEATURE_VSTORE
= 25,
1610 /* EC decides on USB-C SS mux state, muxes configured by host */
1611 EC_FEATURE_USBC_SS_MUX_VIRTUAL
= 26,
1612 /* EC has RTC feature that can be controlled by host commands */
1613 EC_FEATURE_RTC
= 27,
1614 /* The MCU exposes a Fingerprint sensor */
1615 EC_FEATURE_FINGERPRINT
= 28,
1616 /* The MCU exposes a Touchpad */
1617 EC_FEATURE_TOUCHPAD
= 29,
1618 /* The MCU has RWSIG task enabled */
1619 EC_FEATURE_RWSIG
= 30,
1620 /* EC has device events support */
1621 EC_FEATURE_DEVICE_EVENT
= 31,
1622 /* EC supports the unified wake masks for LPC/eSPI systems */
1623 EC_FEATURE_UNIFIED_WAKE_MASKS
= 32,
1624 /* EC supports 64-bit host events */
1625 EC_FEATURE_HOST_EVENT64
= 33,
1626 /* EC runs code in RAM (not in place, a.k.a. XIP) */
1627 EC_FEATURE_EXEC_IN_RAM
= 34,
1628 /* EC supports CEC commands */
1629 EC_FEATURE_CEC
= 35,
1630 /* EC supports tight sensor timestamping. */
1631 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS
= 36,
1633 * EC supports tablet mode detection aligned to Chrome and allows
1634 * setting of threshold by host command using
1635 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1637 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS
= 37,
1639 * Early Firmware Selection ver.2. Enabled by CONFIG_VBOOT_EFS2.
1640 * Note this is a RO feature. So, a query (EC_CMD_GET_FEATURES) should
1641 * be sent to RO to be precise.
1643 EC_FEATURE_EFS2
= 38,
1644 /* The MCU is a System Companion Processor (SCP). */
1645 EC_FEATURE_SCP
= 39,
1646 /* The MCU is an Integrated Sensor Hub */
1647 EC_FEATURE_ISH
= 40,
1648 /* New TCPMv2 TYPEC_ prefaced commands supported */
1649 EC_FEATURE_TYPEC_CMD
= 41,
1651 * The EC will wait for direction from the AP to enter Type-C alternate
1654 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY
= 42,
1656 * The EC will wait for an acknowledge from the AP after setting the
1659 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK
= 43,
1661 * The EC supports entering and residing in S4.
1663 EC_FEATURE_S4_RESIDENCY
= 44,
1665 * The EC supports the AP directing mux sets for the board.
1667 EC_FEATURE_TYPEC_AP_MUX_SET
= 45,
1669 * The EC supports the AP composing VDMs for us to send.
1671 EC_FEATURE_TYPEC_AP_VDM_SEND
= 46,
1673 * The EC supports system safe mode panic recovery.
1675 EC_FEATURE_SYSTEM_SAFE_MODE
= 47,
1677 * The EC will reboot on runtime assertion failures.
1679 EC_FEATURE_ASSERT_REBOOTS
= 48,
1681 * The EC image is built with tokenized logging enabled.
1683 EC_FEATURE_TOKENIZED_LOGGING
= 49,
1685 * The EC supports triggering an STB dump.
1687 EC_FEATURE_AMD_STB_DUMP
= 50,
1689 * The EC supports memory dump commands.
1691 EC_FEATURE_MEMORY_DUMP
= 51,
1693 * The EC supports DP2.1 capability
1695 EC_FEATURE_TYPEC_DP2_1
= 52,
1697 * The MCU is System Companion Processor Core 1
1699 EC_FEATURE_SCP_C1
= 53,
1701 * The EC supports UCSI PPM.
1703 EC_FEATURE_UCSI_PPM
= 54,
1706 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1707 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1709 struct ec_response_get_features
{
1713 /*****************************************************************************/
1714 /* Get the board's SKU ID from EC */
1715 #define EC_CMD_GET_SKU_ID 0x000E
1717 /* Set SKU ID from AP */
1718 #define EC_CMD_SET_SKU_ID 0x000F
1720 struct ec_sku_id_info
{
1724 /*****************************************************************************/
1725 /* Flash commands */
1727 /* Get flash info */
1728 #define EC_CMD_FLASH_INFO 0x0010
1729 #define EC_VER_FLASH_INFO 2
1732 * struct ec_response_flash_info - Response to the flash info command.
1733 * @flash_size: Usable flash size in bytes.
1734 * @write_block_size: Write block size. Write offset and size must be a
1736 * @erase_block_size: Erase block size. Erase offset and size must be a
1738 * @protect_block_size: Protection block size. Protection offset and size
1739 * must be a multiple of this.
1741 * Version 0 returns these fields.
1743 struct ec_response_flash_info
{
1744 uint32_t flash_size
;
1745 uint32_t write_block_size
;
1746 uint32_t erase_block_size
;
1747 uint32_t protect_block_size
;
1751 * Flags for version 1+ flash info command
1752 * EC flash erases bits to 0 instead of 1.
1754 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1757 * Flash must be selected for read/write/erase operations to succeed. This may
1758 * be necessary on a chip where write/erase can be corrupted by other board
1759 * activity, or where the chip needs to enable some sort of programming voltage,
1760 * or where the read/write/erase operations require cleanly suspending other
1761 * chip functionality.
1763 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1766 * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1767 * @flash_size: Usable flash size in bytes.
1768 * @write_block_size: Write block size. Write offset and size must be a
1770 * @erase_block_size: Erase block size. Erase offset and size must be a
1772 * @protect_block_size: Protection block size. Protection offset and size
1773 * must be a multiple of this.
1774 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if
1775 * size is exactly this and offset is a multiple of this.
1776 * For example, an EC may have a write buffer which can do
1777 * half-page operations if data is aligned, and a slower
1778 * word-at-a-time write mode.
1779 * @flags: Flags; see EC_FLASH_INFO_*
1781 * Version 1 returns the same initial fields as version 0, with additional
1784 * gcc anonymous structs don't seem to get along with the __packed directive;
1785 * if they did we'd define the version 0 structure as a sub-structure of this
1788 * Version 2 supports flash banks of different sizes:
1789 * The caller specified the number of banks it has preallocated
1791 * The EC returns the number of banks describing the flash memory.
1792 * It adds banks descriptions up to num_banks_desc.
1794 struct ec_response_flash_info_1
{
1795 /* Version 0 fields; see above for description */
1796 uint32_t flash_size
;
1797 uint32_t write_block_size
;
1798 uint32_t erase_block_size
;
1799 uint32_t protect_block_size
;
1801 /* Version 1 adds these fields: */
1802 uint32_t write_ideal_size
;
1806 struct ec_params_flash_info_2
{
1807 /* Number of banks to describe */
1808 uint16_t num_banks_desc
;
1809 /* Reserved; set 0; ignore on read */
1810 uint8_t reserved
[2];
1813 struct ec_flash_bank
{
1814 /* Number of sector is in this bank. */
1816 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1818 /* Minimal write size for the sectors in this bank */
1819 uint8_t write_size_exp
;
1820 /* Erase size for the sectors in this bank */
1821 uint8_t erase_size_exp
;
1822 /* Size for write protection, usually identical to erase size. */
1823 uint8_t protect_size_exp
;
1824 /* Reserved; set 0; ignore on read */
1825 uint8_t reserved
[2];
1828 struct ec_response_flash_info_2
{
1829 /* Total flash in the EC. */
1830 uint32_t flash_size
;
1831 /* Flags; see EC_FLASH_INFO_* */
1833 /* Maximum size to use to send data to write to the EC. */
1834 uint32_t write_ideal_size
;
1835 /* Number of banks present in the EC. */
1836 uint16_t num_banks_total
;
1837 /* Number of banks described in banks array. */
1838 uint16_t num_banks_desc
;
1839 struct ec_flash_bank banks
[0];
1845 * Response is params.size bytes of data.
1847 #define EC_CMD_FLASH_READ 0x0011
1850 * struct ec_params_flash_read - Parameters for the flash read command.
1851 * @offset: Byte offset to read.
1852 * @size: Size to read in bytes.
1854 struct ec_params_flash_read
{
1860 #define EC_CMD_FLASH_WRITE 0x0012
1861 #define EC_VER_FLASH_WRITE 1
1863 /* Version 0 of the flash command supported only 64 bytes of data */
1864 #define EC_FLASH_WRITE_VER0_SIZE 64
1867 * struct ec_params_flash_write - Parameters for the flash write command.
1868 * @offset: Byte offset to write.
1869 * @size: Size to write in bytes.
1870 * @data: Data to write.
1871 * @data.words32: uint32_t data to write.
1872 * @data.bytes: uint8_t data to write.
1874 struct ec_params_flash_write
{
1877 /* Followed by data to write. This union allows accessing an
1878 * underlying buffer as uint32s or uint8s for convenience.
1881 uint32_t words32
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
1882 uint8_t bytes
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
1885 BUILD_ASSERT(member_size(struct ec_params_flash_write
, data
) == 0);
1888 #define EC_CMD_FLASH_ERASE 0x0013
1891 * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1892 * @offset: Byte offset to erase.
1893 * @size: Size to erase in bytes.
1895 struct ec_params_flash_erase
{
1901 * v1 add async erase:
1902 * subcommands can returns:
1903 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1904 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1905 * EC_RES_ERROR : other errors.
1906 * EC_RES_BUSY : an existing erase operation is in progress.
1907 * EC_RES_ACCESS_DENIED: Trying to erase running image.
1909 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1910 * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1911 * the proper result.
1912 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1913 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1914 * ERASE_GET_RESULT command may timeout on EC where flash access is not
1915 * permitted while erasing. (For instance, STM32F4).
1917 enum ec_flash_erase_cmd
{
1918 FLASH_ERASE_SECTOR
, /* Erase and wait for result */
1919 FLASH_ERASE_SECTOR_ASYNC
, /* Erase and return immediately. */
1920 FLASH_ERASE_GET_RESULT
, /* Ask for last erase result */
1924 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1925 * @cmd: One of ec_flash_erase_cmd.
1926 * @reserved: Pad byte; currently always contains 0.
1927 * @flag: No flags defined yet; set to 0.
1928 * @params: Same as v0 parameters.
1930 struct ec_params_flash_erase_v1
{
1934 struct ec_params_flash_erase params
;
1938 * Get/set flash protection.
1940 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1941 * firmware write protect GPIO, not all flags will take effect immediately;
1942 * some flags require a subsequent hard reset to take effect. Check the
1943 * returned flags bits to see what actually happened.
1945 * If mask=0, simply returns the current flags state.
1947 #define EC_CMD_FLASH_PROTECT 0x0015
1948 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
1950 /* Flags for flash protection */
1951 /* RO flash code protected when the EC boots */
1952 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1954 * RO flash code protected now. If this bit is set, at-boot status cannot
1957 #define EC_FLASH_PROTECT_RO_NOW BIT(1)
1958 /* Entire flash code protected now, until reboot. */
1959 #define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1960 /* Flash write protect GPIO is asserted now */
1961 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1962 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1963 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1965 * Error - flash protection is in inconsistent state. At least one bank of
1966 * flash which should be protected is not protected. Usually fixed by
1967 * re-requesting the desired flags, or by a hard reset if that fails.
1969 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1970 /* Entire flash code protected when the EC boots */
1971 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1972 /* RW flash code protected when the EC boots */
1973 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1974 /* RW flash code protected now. */
1975 #define EC_FLASH_PROTECT_RW_NOW BIT(8)
1976 /* Rollback information flash region protected when the EC boots */
1977 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1978 /* Rollback information flash region protected now */
1979 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1980 /* Error - Unknown error */
1981 #define EC_FLASH_PROTECT_ERROR_UNKNOWN BIT(11)
1984 * struct ec_params_flash_protect - Parameters for the flash protect command.
1985 * @mask: Bits in flags to apply.
1986 * @flags: New flags to apply.
1988 struct ec_params_flash_protect
{
1993 enum flash_protect_action
{
1994 FLASH_PROTECT_ASYNC
= 0,
1995 FLASH_PROTECT_GET_RESULT
= 1,
1998 /* Version 2 of the command is "asynchronous". */
1999 struct ec_params_flash_protect_v2
{
2000 uint8_t action
; /**< enum flash_protect_action */
2001 uint8_t reserved
[3]; /**< padding for alignment */
2007 * struct ec_response_flash_protect - Response to the flash protect command.
2008 * @flags: Current value of flash protect flags.
2009 * @valid_flags: Flags which are valid on this platform. This allows the
2010 * caller to distinguish between flags which aren't set vs. flags
2011 * which can't be set on this platform.
2012 * @writable_flags: Flags which can be changed given the current protection
2015 struct ec_response_flash_protect
{
2017 uint32_t valid_flags
;
2018 uint32_t writable_flags
;
2022 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
2023 * write protect. These commands may be reused with version > 0.
2026 /* Get the region offset/size */
2027 #define EC_CMD_FLASH_REGION_INFO 0x0016
2028 #define EC_VER_FLASH_REGION_INFO 1
2030 enum ec_flash_region
{
2031 /* Region which holds read-only EC image */
2032 EC_FLASH_REGION_RO
= 0,
2034 * Region which holds active RW image. 'Active' is different from
2035 * 'running'. Active means 'scheduled-to-run'. Since RO image always
2036 * scheduled to run, active/non-active applies only to RW images (for
2037 * the same reason 'update' applies only to RW images. It's a state of
2038 * an image on a flash. Running image can be RO, RW_A, RW_B but active
2039 * image can only be RW_A or RW_B. In recovery mode, an active RW image
2040 * doesn't enter 'running' state but it's still active on a flash.
2042 EC_FLASH_REGION_ACTIVE
,
2044 * Region which should be write-protected in the factory (a superset of
2045 * EC_FLASH_REGION_RO)
2047 EC_FLASH_REGION_WP_RO
,
2048 /* Region which holds updatable (non-active) RW image */
2049 EC_FLASH_REGION_UPDATE
,
2050 /* Number of regions */
2051 EC_FLASH_REGION_COUNT
,
2054 * 'RW' is vague if there are multiple RW images; we mean the active one,
2055 * so the old constant is deprecated.
2057 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
2060 * struct ec_params_flash_region_info - Parameters for the flash region info
2062 * @region: Flash region; see EC_FLASH_REGION_*
2064 struct ec_params_flash_region_info
{
2068 struct ec_response_flash_region_info
{
2073 /* Get SPI flash information */
2074 #define EC_CMD_FLASH_SPI_INFO 0x0018
2076 struct ec_response_flash_spi_info
{
2077 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
2080 /* Pad byte; currently always contains 0 */
2083 /* Manufacturer / device ID from command 0x90 */
2084 uint8_t mfr_dev_id
[2];
2086 /* Status registers from command 0x05 and 0x35 */
2090 /* Select flash during flash operations */
2091 #define EC_CMD_FLASH_SELECT 0x0019
2094 * struct ec_params_flash_select - Parameters for the flash select command.
2095 * @select: 1 to select flash, 0 to deselect flash
2097 struct ec_params_flash_select
{
2102 * Request random numbers to be generated and returned.
2103 * Can be used to test the random number generator is truly random.
2104 * See https://csrc.nist.gov/publications/detail/sp/800-22/rev-1a/final and
2105 * https://webhome.phy.duke.edu/~rgb/General/dieharder.php.
2107 #define EC_CMD_RAND_NUM 0x001A
2108 #define EC_VER_RAND_NUM 0
2110 struct ec_params_rand_num
{
2111 uint16_t num_rand_bytes
; /**< num random bytes to generate */
2114 struct ec_response_rand_num
{
2116 * generated random numbers in the range of 1 to EC_MAX_INSIZE. The true
2117 * size of rand is determined by ec_params_rand_num's num_rand_bytes.
2119 uint8_t rand
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
2121 BUILD_ASSERT(sizeof(struct ec_response_rand_num
) == 0);
2124 * Get information about the key used to sign the RW firmware.
2125 * For more details on the fields, see "struct vb21_packed_key".
2127 #define EC_CMD_RWSIG_INFO 0x001B
2128 #define EC_VER_RWSIG_INFO 0
2130 #define VBOOT2_KEY_ID_BYTES 20
2133 /* Don't force external projects to depend on the vboot headers. */
2134 #include "vb21_struct.h"
2135 BUILD_ASSERT(sizeof(struct vb2_id
) == VBOOT2_KEY_ID_BYTES
);
2138 struct ec_response_rwsig_info
{
2140 * Signature algorithm used by the key
2141 * (enum vb2_signature_algorithm).
2146 * Hash digest algorithm used with the key
2147 * (enum vb2_hash_algorithm).
2152 uint32_t key_version
;
2154 /** Key ID (struct vb2_id). */
2155 uint8_t key_id
[VBOOT2_KEY_ID_BYTES
];
2157 uint8_t key_is_valid
;
2159 /** Alignment padding. */
2160 uint8_t reserved
[3];
2163 BUILD_ASSERT(sizeof(struct ec_response_rwsig_info
) == 32);
2166 * Get information about the system, such as reset flags, locked state, etc.
2168 #define EC_CMD_SYSINFO 0x001C
2169 #define EC_VER_SYSINFO 0
2171 enum sysinfo_flags
{
2172 SYSTEM_IS_LOCKED
= BIT(0),
2173 SYSTEM_IS_FORCE_LOCKED
= BIT(1),
2174 SYSTEM_JUMP_ENABLED
= BIT(2),
2175 SYSTEM_JUMPED_TO_CURRENT_IMAGE
= BIT(3),
2176 SYSTEM_REBOOT_AT_SHUTDOWN
= BIT(4),
2178 * Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is
2179 * set and cleared when the system shuts down (not when the host event
2182 SYSTEM_IN_MANUAL_RECOVERY
= BIT(5),
2185 struct ec_response_sysinfo
{
2186 uint32_t reset_flags
; /**< EC_RESET_FLAG_* flags */
2187 uint32_t current_image
; /**< enum ec_image */
2188 uint32_t flags
; /**< enum sysinfo_flags */
2191 /*****************************************************************************/
2194 /* Get fan target RPM */
2195 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
2197 struct ec_response_pwm_get_fan_rpm
{
2201 /* Set target fan RPM */
2202 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
2204 /* Version 0 of input params */
2205 struct ec_params_pwm_set_fan_target_rpm_v0
{
2209 /* Version 1 of input params */
2210 struct ec_params_pwm_set_fan_target_rpm_v1
{
2215 /* Get keyboard backlight */
2216 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
2217 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
2219 struct ec_response_pwm_get_keyboard_backlight
{
2224 /* Set keyboard backlight */
2225 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
2226 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
2228 struct ec_params_pwm_set_keyboard_backlight
{
2232 /* Set target fan PWM duty cycle */
2233 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
2235 /* Version 0 of input params */
2236 struct ec_params_pwm_set_fan_duty_v0
{
2240 /* Version 1 of input params */
2241 struct ec_params_pwm_set_fan_duty_v1
{
2246 #define EC_CMD_PWM_SET_DUTY 0x0025
2247 /* 16 bit duty cycle, 0xffff = 100% */
2248 #define EC_PWM_MAX_DUTY 0xffff
2251 /* All types, indexed by board-specific enum pwm_channel */
2252 EC_PWM_TYPE_GENERIC
= 0,
2253 /* Keyboard backlight */
2254 EC_PWM_TYPE_KB_LIGHT
,
2255 /* Display backlight */
2256 EC_PWM_TYPE_DISPLAY_LIGHT
,
2260 struct ec_params_pwm_set_duty
{
2261 uint16_t duty
; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
2262 uint8_t pwm_type
; /* ec_pwm_type */
2263 uint8_t index
; /* Type-specific index, or 0 if unique */
2266 #define EC_CMD_PWM_GET_DUTY 0x0026
2268 struct ec_params_pwm_get_duty
{
2269 uint8_t pwm_type
; /* ec_pwm_type */
2270 uint8_t index
; /* Type-specific index, or 0 if unique */
2273 struct ec_response_pwm_get_duty
{
2274 uint16_t duty
; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
2277 /*****************************************************************************/
2279 * Lightbar commands. This looks worse than it is. Since we only use one HOST
2280 * command to say "talk to the lightbar", we put the "and tell it to do X" part
2281 * into a subcommand. We'll make separate structs for subcommands with
2282 * different input args, so that we know how much to expect.
2284 #define EC_CMD_LIGHTBAR_CMD 0x0028
2288 } __ec_todo_unpacked
;
2290 #define LB_BATTERY_LEVELS 4
2293 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
2294 * host command, but the alignment is the same regardless. Keep it that way.
2296 struct lightbar_params_v0
{
2298 int32_t google_ramp_up
;
2299 int32_t google_ramp_down
;
2300 int32_t s3s0_ramp_up
;
2301 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2302 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2303 int32_t s0s3_ramp_down
;
2304 int32_t s3_sleep_for
;
2306 int32_t s3_ramp_down
;
2310 uint8_t osc_min
[2]; /* AC=0/1 */
2311 uint8_t osc_max
[2]; /* AC=0/1 */
2312 uint8_t w_ofs
[2]; /* AC=0/1 */
2314 /* Brightness limits based on the backlight and AC. */
2315 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2316 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2317 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2319 /* Battery level thresholds */
2320 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2322 /* Map [AC][battery_level] to color index */
2323 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2324 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2327 struct rgb_s color
[8]; /* 0-3 are Google colors */
2330 struct lightbar_params_v1
{
2332 int32_t google_ramp_up
;
2333 int32_t google_ramp_down
;
2334 int32_t s3s0_ramp_up
;
2335 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2336 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2337 int32_t s0s3_ramp_down
;
2338 int32_t s3_sleep_for
;
2340 int32_t s3_ramp_down
;
2342 int32_t s5_ramp_down
;
2343 int32_t tap_tick_delay
;
2344 int32_t tap_gate_delay
;
2345 int32_t tap_display_time
;
2347 /* Tap-for-battery params */
2348 uint8_t tap_pct_red
;
2349 uint8_t tap_pct_green
;
2350 uint8_t tap_seg_min_on
;
2351 uint8_t tap_seg_max_on
;
2352 uint8_t tap_seg_osc
;
2356 uint8_t osc_min
[2]; /* AC=0/1 */
2357 uint8_t osc_max
[2]; /* AC=0/1 */
2358 uint8_t w_ofs
[2]; /* AC=0/1 */
2360 /* Brightness limits based on the backlight and AC. */
2361 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2362 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2363 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2365 /* Battery level thresholds */
2366 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2368 /* Map [AC][battery_level] to color index */
2369 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2370 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2372 /* s5: single color pulse on inhibited power-up */
2376 struct rgb_s color
[8]; /* 0-3 are Google colors */
2379 /* Lightbar command params v2
2382 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
2383 * logical groups to make it more manageable ( < 120 bytes).
2385 * NOTE: Each of these groups must be less than 120 bytes.
2388 struct lightbar_params_v2_timing
{
2390 int32_t google_ramp_up
;
2391 int32_t google_ramp_down
;
2392 int32_t s3s0_ramp_up
;
2393 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2394 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2395 int32_t s0s3_ramp_down
;
2396 int32_t s3_sleep_for
;
2398 int32_t s3_ramp_down
;
2400 int32_t s5_ramp_down
;
2401 int32_t tap_tick_delay
;
2402 int32_t tap_gate_delay
;
2403 int32_t tap_display_time
;
2406 struct lightbar_params_v2_tap
{
2407 /* Tap-for-battery params */
2408 uint8_t tap_pct_red
;
2409 uint8_t tap_pct_green
;
2410 uint8_t tap_seg_min_on
;
2411 uint8_t tap_seg_max_on
;
2412 uint8_t tap_seg_osc
;
2416 struct lightbar_params_v2_oscillation
{
2418 uint8_t osc_min
[2]; /* AC=0/1 */
2419 uint8_t osc_max
[2]; /* AC=0/1 */
2420 uint8_t w_ofs
[2]; /* AC=0/1 */
2423 struct lightbar_params_v2_brightness
{
2424 /* Brightness limits based on the backlight and AC. */
2425 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2426 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2427 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2430 struct lightbar_params_v2_thresholds
{
2431 /* Battery level thresholds */
2432 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2435 struct lightbar_params_v2_colors
{
2436 /* Map [AC][battery_level] to color index */
2437 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2438 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2440 /* s5: single color pulse on inhibited power-up */
2444 struct rgb_s color
[8]; /* 0-3 are Google colors */
2447 /* Lightbar program. */
2448 #define EC_LB_PROG_LEN 192
2449 struct lightbar_program
{
2451 uint8_t data
[EC_LB_PROG_LEN
];
2452 } __ec_todo_unpacked
;
2454 struct ec_params_lightbar
{
2455 uint8_t cmd
; /* Command (see enum lightbar_command) */
2458 * The following commands have no args:
2460 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
2461 * version, get_brightness, get_demo, suspend, resume,
2462 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
2463 * get_params_v2_bright, get_params_v2_thlds,
2464 * get_params_v2_colors
2466 * Don't use an empty struct, because C++ hates that.
2469 struct __ec_todo_unpacked
{
2471 } set_brightness
, seq
, demo
;
2473 struct __ec_todo_unpacked
{
2474 uint8_t ctrl
, reg
, value
;
2477 struct __ec_todo_unpacked
{
2478 uint8_t led
, red
, green
, blue
;
2481 struct __ec_todo_unpacked
{
2485 struct __ec_todo_unpacked
{
2487 } manual_suspend_ctrl
;
2489 struct lightbar_params_v0 set_params_v0
;
2490 struct lightbar_params_v1 set_params_v1
;
2492 struct lightbar_params_v2_timing set_v2par_timing
;
2493 struct lightbar_params_v2_tap set_v2par_tap
;
2494 struct lightbar_params_v2_oscillation set_v2par_osc
;
2495 struct lightbar_params_v2_brightness set_v2par_bright
;
2496 struct lightbar_params_v2_thresholds set_v2par_thlds
;
2497 struct lightbar_params_v2_colors set_v2par_colors
;
2499 struct lightbar_program set_program
;
2503 struct ec_response_lightbar
{
2505 struct __ec_todo_unpacked
{
2506 struct __ec_todo_unpacked
{
2513 struct __ec_todo_unpacked
{
2515 } get_seq
, get_brightness
, get_demo
;
2517 struct lightbar_params_v0 get_params_v0
;
2518 struct lightbar_params_v1 get_params_v1
;
2520 struct lightbar_params_v2_timing get_params_v2_timing
;
2521 struct lightbar_params_v2_tap get_params_v2_tap
;
2522 struct lightbar_params_v2_oscillation get_params_v2_osc
;
2523 struct lightbar_params_v2_brightness get_params_v2_bright
;
2524 struct lightbar_params_v2_thresholds get_params_v2_thlds
;
2525 struct lightbar_params_v2_colors get_params_v2_colors
;
2527 struct __ec_todo_unpacked
{
2532 struct __ec_todo_unpacked
{
2533 uint8_t red
, green
, blue
;
2537 * The following commands have no response:
2539 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2540 * set_params_v0, set_params_v1, set_program,
2541 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2542 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2543 * set_v2par_thlds, set_v2par_colors
2548 /* Lightbar commands */
2549 enum lightbar_command
{
2550 LIGHTBAR_CMD_DUMP
= 0,
2551 LIGHTBAR_CMD_OFF
= 1,
2552 LIGHTBAR_CMD_ON
= 2,
2553 LIGHTBAR_CMD_INIT
= 3,
2554 LIGHTBAR_CMD_SET_BRIGHTNESS
= 4,
2555 LIGHTBAR_CMD_SEQ
= 5,
2556 LIGHTBAR_CMD_REG
= 6,
2557 LIGHTBAR_CMD_SET_RGB
= 7,
2558 LIGHTBAR_CMD_GET_SEQ
= 8,
2559 LIGHTBAR_CMD_DEMO
= 9,
2560 LIGHTBAR_CMD_GET_PARAMS_V0
= 10,
2561 LIGHTBAR_CMD_SET_PARAMS_V0
= 11,
2562 LIGHTBAR_CMD_VERSION
= 12,
2563 LIGHTBAR_CMD_GET_BRIGHTNESS
= 13,
2564 LIGHTBAR_CMD_GET_RGB
= 14,
2565 LIGHTBAR_CMD_GET_DEMO
= 15,
2566 LIGHTBAR_CMD_GET_PARAMS_V1
= 16,
2567 LIGHTBAR_CMD_SET_PARAMS_V1
= 17,
2568 LIGHTBAR_CMD_SET_PROGRAM
= 18,
2569 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL
= 19,
2570 LIGHTBAR_CMD_SUSPEND
= 20,
2571 LIGHTBAR_CMD_RESUME
= 21,
2572 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING
= 22,
2573 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING
= 23,
2574 LIGHTBAR_CMD_GET_PARAMS_V2_TAP
= 24,
2575 LIGHTBAR_CMD_SET_PARAMS_V2_TAP
= 25,
2576 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION
= 26,
2577 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION
= 27,
2578 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS
= 28,
2579 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS
= 29,
2580 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS
= 30,
2581 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS
= 31,
2582 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS
= 32,
2583 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS
= 33,
2587 /*****************************************************************************/
2588 /* LED control commands */
2590 #define EC_CMD_LED_CONTROL 0x0029
2593 /* LED to indicate battery state of charge */
2594 EC_LED_ID_BATTERY_LED
= 0,
2596 * LED to indicate system power state (on or in suspend).
2597 * May be on power button or on C-panel.
2599 EC_LED_ID_POWER_LED
,
2600 /* LED on power adapter or its plug */
2601 EC_LED_ID_ADAPTER_LED
,
2602 /* LED to indicate left side */
2604 /* LED to indicate right side */
2605 EC_LED_ID_RIGHT_LED
,
2606 /* LED to indicate recovery mode with HW_REINIT */
2607 EC_LED_ID_RECOVERY_HW_REINIT_LED
,
2608 /* LED to indicate sysrq debug mode. */
2609 EC_LED_ID_SYSRQ_DEBUG_LED
,
2614 /* LED control flags */
2615 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2616 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */
2618 enum ec_led_colors
{
2619 EC_LED_COLOR_INVALID
= -1,
2620 EC_LED_COLOR_RED
= 0,
2623 EC_LED_COLOR_YELLOW
,
2630 struct ec_params_led_control
{
2631 uint8_t led_id
; /* Which LED to control */
2632 uint8_t flags
; /* Control flags */
2634 uint8_t brightness
[EC_LED_COLOR_COUNT
];
2637 struct ec_response_led_control
{
2639 * Available brightness value range.
2641 * Range 0 means color channel not present.
2642 * Range 1 means on/off control.
2643 * Other values means the LED is control by PWM.
2645 uint8_t brightness_range
[EC_LED_COLOR_COUNT
];
2648 /*****************************************************************************/
2649 /* Verified boot commands */
2652 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2653 * reused for other purposes with version > 0.
2656 /* Verified boot hash command */
2657 #define EC_CMD_VBOOT_HASH 0x002A
2659 struct ec_params_vboot_hash
{
2660 uint8_t cmd
; /* enum ec_vboot_hash_cmd */
2661 uint8_t hash_type
; /* enum ec_vboot_hash_type */
2662 uint8_t nonce_size
; /* Nonce size; may be 0 */
2663 uint8_t reserved0
; /* Reserved; set 0 */
2664 uint32_t offset
; /* Offset in flash to hash */
2665 uint32_t size
; /* Number of bytes to hash */
2666 uint8_t nonce_data
[64]; /* Nonce data; ignored if nonce_size=0 */
2669 struct ec_response_vboot_hash
{
2670 uint8_t status
; /* enum ec_vboot_hash_status */
2671 uint8_t hash_type
; /* enum ec_vboot_hash_type */
2672 uint8_t digest_size
; /* Size of hash digest in bytes */
2673 uint8_t reserved0
; /* Ignore; will be 0 */
2674 uint32_t offset
; /* Offset in flash which was hashed */
2675 uint32_t size
; /* Number of bytes hashed */
2676 uint8_t hash_digest
[64]; /* Hash digest data */
2679 enum ec_vboot_hash_cmd
{
2680 EC_VBOOT_HASH_GET
= 0, /* Get current hash status */
2681 EC_VBOOT_HASH_ABORT
= 1, /* Abort calculating current hash */
2682 EC_VBOOT_HASH_START
= 2, /* Start computing a new hash */
2683 EC_VBOOT_HASH_RECALC
= 3, /* Synchronously compute a new hash */
2686 enum ec_vboot_hash_type
{
2687 EC_VBOOT_HASH_TYPE_SHA256
= 0, /* SHA-256 */
2690 enum ec_vboot_hash_status
{
2691 EC_VBOOT_HASH_STATUS_NONE
= 0, /* No hash (not started, or aborted) */
2692 EC_VBOOT_HASH_STATUS_DONE
= 1, /* Finished computing a hash */
2693 EC_VBOOT_HASH_STATUS_BUSY
= 2, /* Busy computing a hash */
2697 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2698 * If one of these is specified, the EC will automatically update offset and
2699 * size to the correct values for the specified image (RO or RW).
2701 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2702 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2703 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2706 * 'RW' is vague if there are multiple RW images; we mean the active one,
2707 * so the old constant is deprecated.
2709 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2711 /*****************************************************************************/
2713 * Motion sense commands. We'll make separate structs for sub-commands with
2714 * different input args, so that we know how much to expect.
2716 #define EC_CMD_MOTION_SENSE_CMD 0x002B
2718 /* Motion sense commands */
2719 enum motionsense_command
{
2721 * Dump command returns all motion sensor data including motion sense
2722 * module flags and individual sensor flags.
2724 MOTIONSENSE_CMD_DUMP
= 0,
2727 * Info command returns data describing the details of a given sensor,
2728 * including enum motionsensor_type, enum motionsensor_location, and
2729 * enum motionsensor_chip.
2731 MOTIONSENSE_CMD_INFO
= 1,
2734 * EC Rate command is a setter/getter command for the EC sampling rate
2736 * It is per sensor, the EC run sample task at the minimum of all
2738 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2739 * to collect all the sensor samples.
2740 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2741 * to process of all motion sensors in milliseconds.
2743 MOTIONSENSE_CMD_EC_RATE
= 2,
2746 * Sensor ODR command is a setter/getter command for the output data
2747 * rate of a specific motion sensor in millihertz.
2749 MOTIONSENSE_CMD_SENSOR_ODR
= 3,
2752 * Sensor range command is a setter/getter command for the range of
2753 * a specified motion sensor in +/-G's or +/- deg/s.
2755 MOTIONSENSE_CMD_SENSOR_RANGE
= 4,
2758 * Setter/getter command for the keyboard wake angle. When the lid
2759 * angle is greater than this value, keyboard wake is disabled in S3,
2760 * and when the lid angle goes less than this value, keyboard wake is
2761 * enabled. Note, the lid angle measurement is an approximate,
2762 * un-calibrated value, hence the wake angle isn't exact.
2764 MOTIONSENSE_CMD_KB_WAKE_ANGLE
= 5,
2767 * Returns a single sensor data.
2769 MOTIONSENSE_CMD_DATA
= 6,
2772 * Return sensor fifo info.
2774 MOTIONSENSE_CMD_FIFO_INFO
= 7,
2777 * Insert a flush element in the fifo and return sensor fifo info.
2778 * The host can use that element to synchronize its operation.
2780 MOTIONSENSE_CMD_FIFO_FLUSH
= 8,
2783 * Return a portion of the fifo.
2785 MOTIONSENSE_CMD_FIFO_READ
= 9,
2788 * Perform low level calibration.
2789 * On sensors that support it, ask to do offset calibration.
2791 MOTIONSENSE_CMD_PERFORM_CALIB
= 10,
2794 * Sensor Offset command is a setter/getter command for the offset
2795 * used for factory calibration.
2796 * The offsets can be calculated by the host, or via
2797 * PERFORM_CALIB command.
2799 MOTIONSENSE_CMD_SENSOR_OFFSET
= 11,
2802 * List available activities for a MOTION sensor.
2803 * Indicates if they are enabled or disabled.
2805 MOTIONSENSE_CMD_LIST_ACTIVITIES
= 12,
2808 * Activity management
2809 * Enable/Disable activity recognition.
2811 MOTIONSENSE_CMD_SET_ACTIVITY
= 13,
2816 MOTIONSENSE_CMD_LID_ANGLE
= 14,
2819 * Allow the FIFO to trigger interrupt via MKBP events.
2820 * By default the FIFO does not send interrupt to process the FIFO
2821 * until the AP is ready or it is coming from a wakeup sensor.
2823 MOTIONSENSE_CMD_FIFO_INT_ENABLE
= 15,
2826 * Spoof the readings of the sensors. The spoofed readings can be set
2827 * to arbitrary values, or will lock to the last read actual values.
2829 MOTIONSENSE_CMD_SPOOF
= 16,
2831 /* Set lid angle for tablet mode detection. */
2832 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE
= 17,
2835 * Sensor Scale command is a setter/getter command for the calibration
2838 MOTIONSENSE_CMD_SENSOR_SCALE
= 18,
2841 * Read the current online calibration values (if available).
2843 MOTIONSENSE_CMD_ONLINE_CALIB_READ
= 19,
2846 * Activity management
2847 * Retrieve current status of given activity.
2849 MOTIONSENSE_CMD_GET_ACTIVITY
= 20,
2851 /* Number of motionsense sub-commands. */
2852 MOTIONSENSE_NUM_CMDS
,
2855 /* List of motion sensor types. */
2856 enum motionsensor_type
{
2857 MOTIONSENSE_TYPE_ACCEL
= 0,
2858 MOTIONSENSE_TYPE_GYRO
= 1,
2859 MOTIONSENSE_TYPE_MAG
= 2,
2860 MOTIONSENSE_TYPE_PROX
= 3,
2861 MOTIONSENSE_TYPE_LIGHT
= 4,
2862 MOTIONSENSE_TYPE_ACTIVITY
= 5,
2863 MOTIONSENSE_TYPE_BARO
= 6,
2864 MOTIONSENSE_TYPE_SYNC
= 7,
2865 MOTIONSENSE_TYPE_LIGHT_RGB
= 8,
2866 MOTIONSENSE_TYPE_MAX
,
2869 /* List of motion sensor locations. */
2870 enum motionsensor_location
{
2871 MOTIONSENSE_LOC_BASE
= 0,
2872 MOTIONSENSE_LOC_LID
= 1,
2873 MOTIONSENSE_LOC_CAMERA
= 2,
2874 MOTIONSENSE_LOC_MAX
,
2877 /* List of motion sensor chips. */
2878 enum motionsensor_chip
{
2879 MOTIONSENSE_CHIP_KXCJ9
= 0,
2880 MOTIONSENSE_CHIP_LSM6DS0
= 1,
2881 MOTIONSENSE_CHIP_BMI160
= 2,
2882 MOTIONSENSE_CHIP_SI1141
= 3,
2883 MOTIONSENSE_CHIP_SI1142
= 4,
2884 MOTIONSENSE_CHIP_SI1143
= 5,
2885 MOTIONSENSE_CHIP_KX022
= 6,
2886 MOTIONSENSE_CHIP_L3GD20H
= 7,
2887 MOTIONSENSE_CHIP_BMA255
= 8,
2888 MOTIONSENSE_CHIP_BMP280
= 9,
2889 MOTIONSENSE_CHIP_OPT3001
= 10,
2890 MOTIONSENSE_CHIP_BH1730
= 11,
2891 MOTIONSENSE_CHIP_GPIO
= 12,
2892 MOTIONSENSE_CHIP_LIS2DH
= 13,
2893 MOTIONSENSE_CHIP_LSM6DSM
= 14,
2894 MOTIONSENSE_CHIP_LIS2DE
= 15,
2895 MOTIONSENSE_CHIP_LIS2MDL
= 16,
2896 MOTIONSENSE_CHIP_LSM6DS3
= 17,
2897 MOTIONSENSE_CHIP_LSM6DSO
= 18,
2898 MOTIONSENSE_CHIP_LNG2DM
= 19,
2899 MOTIONSENSE_CHIP_TCS3400
= 20,
2900 MOTIONSENSE_CHIP_LIS2DW12
= 21,
2901 MOTIONSENSE_CHIP_LIS2DWL
= 22,
2902 MOTIONSENSE_CHIP_LIS2DS
= 23,
2903 MOTIONSENSE_CHIP_BMI260
= 24,
2904 MOTIONSENSE_CHIP_ICM426XX
= 25,
2905 MOTIONSENSE_CHIP_ICM42607
= 26,
2906 MOTIONSENSE_CHIP_BMA422
= 27,
2907 MOTIONSENSE_CHIP_BMI323
= 28,
2908 MOTIONSENSE_CHIP_BMI220
= 29,
2909 MOTIONSENSE_CHIP_CM32183
= 30,
2910 MOTIONSENSE_CHIP_VEML3328
= 31,
2911 MOTIONSENSE_CHIP_MAX
,
2914 /* List of orientation positions */
2915 enum motionsensor_orientation
{
2916 MOTIONSENSE_ORIENTATION_LANDSCAPE
= 0,
2917 MOTIONSENSE_ORIENTATION_PORTRAIT
= 1,
2918 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT
= 2,
2919 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE
= 3,
2920 MOTIONSENSE_ORIENTATION_UNKNOWN
= 4,
2923 struct ec_response_activity_data
{
2924 uint8_t activity
; /* motionsensor_activity */
2928 struct ec_response_motion_sensor_data
{
2929 /* Flags for each sensor. */
2931 /* Sensor number the data comes from. */
2933 /* Each sensor is up to 3-axis. */
2936 /* for sensors using unsigned data */
2938 struct __ec_todo_packed
{
2942 struct __ec_todo_unpacked
{
2943 struct ec_response_activity_data activity_data
;
2944 int16_t add_info
[2];
2949 /* Response to AP reporting calibration data for a given sensor. */
2950 struct ec_response_online_calibration_data
{
2951 /** The calibration values. */
2955 /* Note: used in ec_response_get_next_data */
2956 struct ec_response_motion_sense_fifo_info
{
2957 /* Size of the fifo */
2959 /* Amount of space used in the fifo */
2961 /* Timestamp recorded in us.
2962 * aka accurate timestamp when host event was triggered.
2965 /* Total amount of vector lost */
2966 uint16_t total_lost
;
2967 /* Lost events since the last fifo_info, per sensors */
2971 struct ec_response_motion_sense_fifo_data
{
2972 uint32_t number_data
;
2973 struct ec_response_motion_sensor_data data
[0];
2976 /* List supported activity recognition */
2977 enum motionsensor_activity
{
2978 MOTIONSENSE_ACTIVITY_RESERVED
= 0,
2979 MOTIONSENSE_ACTIVITY_SIG_MOTION
= 1,
2980 MOTIONSENSE_ACTIVITY_DOUBLE_TAP
= 2,
2981 MOTIONSENSE_ACTIVITY_ORIENTATION
= 3,
2982 MOTIONSENSE_ACTIVITY_BODY_DETECTION
= 4,
2985 struct ec_motion_sense_activity
{
2987 uint8_t activity
; /* one of enum motionsensor_activity */
2988 uint8_t enable
; /* 1: enable, 0: disable */
2990 uint16_t parameters
[4]; /* activity dependent parameters */
2993 /* Module flag masks used for the dump sub-command. */
2994 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2996 /* Sensor flag masks used for the dump sub-command. */
2997 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
3000 * Flush entry for synchronization.
3001 * data contains time stamp
3003 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
3004 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
3005 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
3006 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
3007 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
3009 #define MOTIONSENSE_SENSOR_FLAG_BYPASS_FIFO BIT(7)
3012 * Send this value for the data element to only perform a read. If you
3013 * send any other value, the EC will interpret it as data to set and will
3014 * return the actual value set.
3016 #define EC_MOTION_SENSE_NO_VALUE -1
3018 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP INT16_MIN
3020 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
3021 /* Set Calibration information */
3022 #define MOTION_SENSE_SET_OFFSET BIT(0)
3024 /* Default Scale value, factor 1. */
3025 #define MOTION_SENSE_DEFAULT_SCALE BIT(15)
3027 #define LID_ANGLE_UNRELIABLE 500
3029 enum motionsense_spoof_mode
{
3030 /* Disable spoof mode. */
3031 MOTIONSENSE_SPOOF_MODE_DISABLE
= 0,
3033 /* Enable spoof mode, but use provided component values. */
3034 MOTIONSENSE_SPOOF_MODE_CUSTOM
,
3036 /* Enable spoof mode, but use the current sensor values. */
3037 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT
,
3039 /* Query the current spoof mode status for the sensor. */
3040 MOTIONSENSE_SPOOF_MODE_QUERY
,
3043 struct ec_params_motion_sense
{
3046 /* Used for MOTIONSENSE_CMD_DUMP. */
3047 struct __ec_todo_unpacked
{
3049 * Maximal number of sensor the host is expecting.
3050 * 0 means the host is only interested in the number
3051 * of sensors controlled by the EC.
3053 uint8_t max_sensor_count
;
3057 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
3059 struct __ec_todo_unpacked
{
3060 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
3061 * kb_wake_angle: angle to wakup AP.
3067 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
3069 struct __ec_todo_unpacked
{
3071 } info
, info_3
, info_4
, data
, fifo_flush
, list_activities
;
3074 * Used for MOTIONSENSE_CMD_PERFORM_CALIB:
3075 * Allow entering/exiting the calibration mode.
3077 struct __ec_todo_unpacked
{
3083 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
3084 * and MOTIONSENSE_CMD_SENSOR_RANGE.
3086 struct __ec_todo_unpacked
{
3089 /* Rounding flag, true for round-up, false for down. */
3094 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
3096 } ec_rate
, sensor_odr
, sensor_range
;
3098 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
3099 struct __ec_todo_packed
{
3103 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
3104 * the calibration information in the EC.
3105 * If unset, just retrieve calibration information.
3110 * Temperature at calibration, in units of 0.01 C
3111 * 0x8000: invalid / unknown.
3118 * Offset for calibration.
3120 * Accelerometer: 1/1024 g
3121 * Gyro: 1/1024 deg/s
3127 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
3128 struct __ec_todo_packed
{
3132 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
3133 * the calibration information in the EC.
3134 * If unset, just retrieve calibration information.
3139 * Temperature at calibration, in units of 0.01 C
3140 * 0x8000: invalid / unknown.
3147 * Scale for calibration:
3148 * By default scale is 1, it is encoded on 16bits:
3156 /* Used for MOTIONSENSE_CMD_FIFO_INFO */
3159 /* Used for MOTIONSENSE_CMD_FIFO_READ */
3160 struct __ec_todo_unpacked
{
3162 * Number of expected vector to return.
3163 * EC may return less or 0 if none available.
3165 uint32_t max_data_vector
;
3168 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */
3169 struct ec_motion_sense_activity set_activity
;
3171 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
3174 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
3175 struct __ec_todo_unpacked
{
3177 * 1: enable, 0 disable fifo,
3178 * EC_MOTION_SENSE_NO_VALUE return value.
3183 /* Used for MOTIONSENSE_CMD_SPOOF */
3184 struct __ec_todo_packed
{
3187 /* See enum motionsense_spoof_mode. */
3188 uint8_t spoof_enable
;
3190 /* Ignored, used for alignment. */
3194 /* Individual component values to spoof. */
3195 int16_t components
[3];
3197 /* Used when spoofing an activity */
3199 /* enum motionsensor_activity */
3200 uint8_t activity_num
;
3202 /* spoof activity state */
3203 uint8_t activity_state
;
3208 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
3209 struct __ec_todo_unpacked
{
3211 * Lid angle threshold for switching between tablet and
3217 * Hysteresis degree to prevent fluctuations between
3218 * clamshell and tablet mode if lid angle keeps
3219 * changing around the threshold. Lid motion driver will
3220 * use lid_angle + hys_degree to trigger tablet mode and
3221 * lid_angle - hys_degree to trigger clamshell mode.
3224 } tablet_mode_threshold
;
3227 * Used for MOTIONSENSE_CMD_ONLINE_CALIB_READ:
3228 * Allow reading a single sensor's online calibration value.
3230 struct __ec_todo_unpacked
{
3232 } online_calib_read
;
3235 * Used for MOTIONSENSE_CMD_GET_ACTIVITY.
3237 struct __ec_todo_unpacked
{
3239 uint8_t activity
; /* enum motionsensor_activity */
3244 enum motion_sense_cmd_info_flags
{
3245 /* The sensor supports online calibration */
3246 MOTION_SENSE_CMD_INFO_FLAG_ONLINE_CALIB
= BIT(0),
3249 struct ec_response_motion_sense
{
3251 /* Used for MOTIONSENSE_CMD_DUMP */
3252 struct __ec_todo_unpacked
{
3253 /* Flags representing the motion sensor module. */
3254 uint8_t module_flags
;
3256 /* Number of sensors managed directly by the EC. */
3257 uint8_t sensor_count
;
3260 * Sensor data is truncated if response_max is too small
3261 * for holding all the data.
3263 struct ec_response_motion_sensor_data sensor
[0];
3266 /* Used for MOTIONSENSE_CMD_INFO. */
3267 struct __ec_todo_unpacked
{
3268 /* Should be element of enum motionsensor_type. */
3271 /* Should be element of enum motionsensor_location. */
3274 /* Should be element of enum motionsensor_chip. */
3278 /* Used for MOTIONSENSE_CMD_INFO version 3 */
3279 struct __ec_todo_unpacked
{
3280 /* Should be element of enum motionsensor_type. */
3283 /* Should be element of enum motionsensor_location. */
3286 /* Should be element of enum motionsensor_chip. */
3289 /* Minimum sensor sampling frequency */
3290 uint32_t min_frequency
;
3292 /* Maximum sensor sampling frequency */
3293 uint32_t max_frequency
;
3295 /* Max number of sensor events that could be in fifo */
3296 uint32_t fifo_max_event_count
;
3299 /* Used for MOTIONSENSE_CMD_INFO version 4 */
3300 struct __ec_align4
{
3301 /* Should be element of enum motionsensor_type. */
3304 /* Should be element of enum motionsensor_location. */
3307 /* Should be element of enum motionsensor_chip. */
3310 /* Minimum sensor sampling frequency */
3311 uint32_t min_frequency
;
3313 /* Maximum sensor sampling frequency */
3314 uint32_t max_frequency
;
3316 /* Max number of sensor events that could be in fifo */
3317 uint32_t fifo_max_event_count
;
3320 * Should be elements of
3321 * enum motion_sense_cmd_info_flags
3326 /* Used for MOTIONSENSE_CMD_DATA */
3327 struct ec_response_motion_sensor_data data
;
3330 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
3331 * MOTIONSENSE_CMD_SENSOR_RANGE,
3332 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
3333 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
3334 * MOTIONSENSE_CMD_SPOOF.
3336 struct __ec_todo_unpacked
{
3337 /* Current value of the parameter queried. */
3339 } ec_rate
, sensor_odr
, sensor_range
, kb_wake_angle
,
3340 fifo_int_enable
, spoof
;
3343 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
3346 struct __ec_todo_unpacked
{
3349 } sensor_offset
, perform_calib
;
3351 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
3352 struct __ec_todo_unpacked
{
3357 struct ec_response_motion_sense_fifo_info fifo_info
, fifo_flush
;
3359 struct ec_response_motion_sense_fifo_data fifo_read
;
3361 struct ec_response_online_calibration_data online_calib_read
;
3363 struct __ec_todo_packed
{
3369 /* No params for set activity */
3371 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
3372 struct __ec_todo_unpacked
{
3374 * Angle between 0 and 360 degree if available,
3375 * LID_ANGLE_UNRELIABLE otherwise.
3380 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
3381 struct __ec_todo_unpacked
{
3383 * Lid angle threshold for switching between tablet and
3388 /* Hysteresis degree. */
3389 uint16_t hys_degree
;
3390 } tablet_mode_threshold
;
3392 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */
3393 struct __ec_todo_unpacked
{
3399 /*****************************************************************************/
3400 /* Force lid open command */
3402 /* Make lid event always open */
3403 #define EC_CMD_FORCE_LID_OPEN 0x002C
3405 struct ec_params_force_lid_open
{
3409 /*****************************************************************************/
3410 /* Configure the behavior of the power button */
3411 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
3413 enum ec_config_power_button_flags
{
3414 /* Enable/Disable power button pulses for x86 devices */
3415 EC_POWER_BUTTON_ENABLE_PULSE
= BIT(0),
3418 struct ec_params_config_power_button
{
3419 /* See enum ec_config_power_button_flags */
3423 /*****************************************************************************/
3424 /* USB charging control commands */
3426 /* Set USB port charging mode */
3427 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
3429 enum usb_charge_mode
{
3430 /* Disable USB port. */
3431 USB_CHARGE_MODE_DISABLED
,
3432 /* Set USB port to Standard Downstream Port, USB 2.0 mode. */
3433 USB_CHARGE_MODE_SDP2
,
3434 /* Set USB port to Charging Downstream Port, BC 1.2. */
3435 USB_CHARGE_MODE_CDP
,
3436 /* Set USB port to Dedicated Charging Port, BC 1.2. */
3437 USB_CHARGE_MODE_DCP_SHORT
,
3438 /* Enable USB port (for dumb ports). */
3439 USB_CHARGE_MODE_ENABLED
,
3440 /* Set USB port to CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE. */
3441 USB_CHARGE_MODE_DEFAULT
,
3443 USB_CHARGE_MODE_COUNT
,
3446 enum usb_suspend_charge
{
3447 /* Enable charging in suspend */
3448 USB_ALLOW_SUSPEND_CHARGE
,
3449 /* Disable charging in suspend */
3450 USB_DISALLOW_SUSPEND_CHARGE
,
3453 struct ec_params_usb_charge_set_mode
{
3454 uint8_t usb_port_id
;
3455 uint8_t mode
: 7; /* enum usb_charge_mode */
3456 uint8_t inhibit_charge
: 1; /* enum usb_suspend_charge */
3459 /*****************************************************************************/
3460 /* Tablet mode commands */
3462 /* Set tablet mode */
3463 #define EC_CMD_SET_TABLET_MODE 0x0031
3465 enum tablet_mode_override
{
3466 TABLET_MODE_DEFAULT
,
3467 TABLET_MODE_FORCE_TABLET
,
3468 TABLET_MODE_FORCE_CLAMSHELL
,
3471 struct ec_params_set_tablet_mode
{
3472 uint8_t tablet_mode
; /* enum tablet_mode_override */
3475 /*****************************************************************************/
3476 /* Persistent storage for host */
3478 /* Maximum bytes that can be read/written in a single command */
3479 #define EC_PSTORE_SIZE_MAX 64
3481 /* Get persistent storage info */
3482 #define EC_CMD_PSTORE_INFO 0x0040
3484 struct ec_response_pstore_info
{
3485 /* Persistent storage size, in bytes */
3486 uint32_t pstore_size
;
3487 /* Access size; read/write offset and size must be a multiple of this */
3488 uint32_t access_size
;
3492 * Read persistent storage
3494 * Response is params.size bytes of data.
3496 #define EC_CMD_PSTORE_READ 0x0041
3498 struct ec_params_pstore_read
{
3499 uint32_t offset
; /* Byte offset to read */
3500 uint32_t size
; /* Size to read in bytes */
3503 /* Write persistent storage */
3504 #define EC_CMD_PSTORE_WRITE 0x0042
3506 struct ec_params_pstore_write
{
3507 uint32_t offset
; /* Byte offset to write */
3508 uint32_t size
; /* Size to write in bytes */
3509 uint8_t data
[EC_PSTORE_SIZE_MAX
];
3512 /*****************************************************************************/
3513 /* Real-time clock */
3515 /* RTC params and response structures */
3516 struct ec_params_rtc
{
3520 struct ec_response_rtc
{
3524 /* These use ec_response_rtc */
3525 #define EC_CMD_RTC_GET_VALUE 0x0044
3526 #define EC_CMD_RTC_GET_ALARM 0x0045
3528 /* These all use ec_params_rtc */
3529 #define EC_CMD_RTC_SET_VALUE 0x0046
3530 #define EC_CMD_RTC_SET_ALARM 0x0047
3532 /* Pass as time param to SET_ALARM to clear the current alarm */
3533 #define EC_RTC_ALARM_CLEAR 0
3535 /*****************************************************************************/
3536 /* Port80 log access */
3538 /* Maximum entries that can be read/written in a single command */
3539 #define EC_PORT80_SIZE_MAX 32
3541 /* Get last port80 code from previous boot */
3542 #define EC_CMD_PORT80_LAST_BOOT 0x0048
3543 #define EC_CMD_PORT80_READ 0x0048
3545 enum ec_port80_subcmd
{
3546 EC_PORT80_GET_INFO
= 0,
3547 EC_PORT80_READ_BUFFER
,
3550 struct ec_params_port80_read
{
3553 struct __ec_todo_unpacked
{
3555 uint32_t num_entries
;
3560 struct ec_response_port80_read
{
3562 struct __ec_todo_unpacked
{
3564 uint32_t history_size
;
3567 struct __ec_todo_unpacked
{
3568 uint16_t codes
[EC_PORT80_SIZE_MAX
];
3573 struct ec_response_port80_last_boot
{
3577 /*****************************************************************************/
3578 /* Temporary secure storage for host verified boot use */
3580 /* Number of bytes in a vstore slot */
3581 #define EC_VSTORE_SLOT_SIZE 64
3583 /* Maximum number of vstore slots */
3584 #define EC_VSTORE_SLOT_MAX 32
3586 /* Get persistent storage info */
3587 #define EC_CMD_VSTORE_INFO 0x0049
3588 struct ec_response_vstore_info
{
3589 /* Indicates which slots are locked */
3590 uint32_t slot_locked
;
3591 /* Total number of slots available */
3596 * Read temporary secure storage
3598 * Response is EC_VSTORE_SLOT_SIZE bytes of data.
3600 #define EC_CMD_VSTORE_READ 0x004A
3602 struct ec_params_vstore_read
{
3603 uint8_t slot
; /* Slot to read from */
3606 struct ec_response_vstore_read
{
3607 uint8_t data
[EC_VSTORE_SLOT_SIZE
];
3611 * Write temporary secure storage and lock it.
3613 #define EC_CMD_VSTORE_WRITE 0x004B
3615 struct ec_params_vstore_write
{
3616 uint8_t slot
; /* Slot to write to */
3617 uint8_t data
[EC_VSTORE_SLOT_SIZE
];
3620 /*****************************************************************************/
3621 /* Thermal engine commands. Note that there are two implementations. We'll
3622 * reuse the command number, but the data and behavior is incompatible.
3623 * Version 0 is what originally shipped on Link.
3624 * Version 1 separates the CPU thermal limits from the fan control.
3627 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
3628 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
3630 /* The version 0 structs are opaque. You have to know what they are for
3631 * the get/set commands to make any sense.
3634 /* Version 0 - set */
3635 struct ec_params_thermal_set_threshold
{
3636 uint8_t sensor_type
;
3637 uint8_t threshold_id
;
3641 /* Version 0 - get */
3642 struct ec_params_thermal_get_threshold
{
3643 uint8_t sensor_type
;
3644 uint8_t threshold_id
;
3647 struct ec_response_thermal_get_threshold
{
3651 /* The version 1 structs are visible. */
3652 enum ec_temp_thresholds
{
3653 EC_TEMP_THRESH_WARN
= 0,
3654 EC_TEMP_THRESH_HIGH
,
3655 EC_TEMP_THRESH_HALT
,
3657 EC_TEMP_THRESH_COUNT
,
3661 * Thermal configuration for one temperature sensor. Temps are in degrees K.
3662 * Zero values will be silently ignored by the thermal task.
3664 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3667 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3668 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3669 * EC will throttle ap when temperature >= 301 K, and release throttling when
3670 * temperature <= 299 K.
3672 * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3674 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3675 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3676 * EC will throttle ap when temperature >= 301 K, and release throttling when
3677 * temperature <= 294 K.
3679 * Note that this structure is a sub-structure of
3680 * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3682 struct ec_thermal_config
{
3683 uint32_t temp_host
[EC_TEMP_THRESH_COUNT
]; /* levels of hotness */
3684 uint32_t temp_host_release
[EC_TEMP_THRESH_COUNT
]; /* release levels */
3685 uint32_t temp_fan_off
; /* no active cooling needed */
3686 uint32_t temp_fan_max
; /* max active cooling needed */
3689 /* Version 1 - get config for one sensor. */
3690 struct ec_params_thermal_get_threshold_v1
{
3691 uint32_t sensor_num
;
3693 /* This returns a struct ec_thermal_config */
3696 * Version 1 - set config for one sensor.
3697 * Use read-modify-write for best results!
3699 struct ec_params_thermal_set_threshold_v1
{
3700 uint32_t sensor_num
;
3701 struct ec_thermal_config cfg
;
3703 /* This returns no data */
3705 /****************************************************************************/
3707 /* Toggle automatic fan control */
3708 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3710 /* Version 1 of input params */
3711 struct ec_params_auto_fan_ctrl_v1
{
3715 /* Get/Set TMP006 calibration data */
3716 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3717 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3720 * The original TMP006 calibration only needed four params, but now we need
3721 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3722 * the params opaque. The v1 "get" response will include the algorithm number
3723 * and how many params it requires. That way we can change the EC code without
3724 * needing to update this file. We can also use a different algorithm on each
3728 /* This is the same struct for both v0 and v1. */
3729 struct ec_params_tmp006_get_calibration
{
3734 struct ec_response_tmp006_get_calibration_v0
{
3741 struct ec_params_tmp006_set_calibration_v0
{
3743 uint8_t reserved
[3];
3751 struct ec_response_tmp006_get_calibration_v1
{
3754 uint8_t reserved
[2];
3758 struct ec_params_tmp006_set_calibration_v1
{
3766 /* Read raw TMP006 data */
3767 #define EC_CMD_TMP006_GET_RAW 0x0055
3769 struct ec_params_tmp006_get_raw
{
3773 struct ec_response_tmp006_get_raw
{
3774 int32_t t
; /* In 1/100 K */
3775 int32_t v
; /* In nV */
3778 /*****************************************************************************/
3779 /* MKBP - Matrix KeyBoard Protocol */
3784 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3785 * expected response size.
3787 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish
3788 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3789 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3791 #define EC_CMD_MKBP_STATE 0x0060
3794 * Provide information about various MKBP things. See enum ec_mkbp_info_type.
3796 #define EC_CMD_MKBP_INFO 0x0061
3798 struct ec_response_mkbp_info
{
3801 /* Formerly "switches", which was 0. */
3805 struct ec_params_mkbp_info
{
3810 enum ec_mkbp_info_type
{
3812 * Info about the keyboard matrix: number of rows and columns.
3814 * Returns struct ec_response_mkbp_info.
3816 EC_MKBP_INFO_KBD
= 0,
3819 * For buttons and switches, info about which specifically are
3820 * supported. event_type must be set to one of the values in enum
3823 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3824 * bitmask indicating which buttons or switches are present. See the
3825 * bit inidices below.
3827 EC_MKBP_INFO_SUPPORTED
= 1,
3830 * Instantaneous state of buttons and switches.
3832 * event_type must be set to one of the values in enum ec_mkbp_event.
3834 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3835 * indicating the current state of the keyboard matrix.
3837 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3840 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3841 * state of supported buttons.
3843 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3844 * state of supported switches.
3846 EC_MKBP_INFO_CURRENT
= 2,
3849 /* Simulate key press */
3850 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3852 struct ec_params_mkbp_simulate_key
{
3858 /* Configure keyboard scanning */
3859 #define EC_CMD_MKBP_SET_CONFIG 0x0064
3860 #define EC_CMD_MKBP_GET_CONFIG 0x0065
3863 enum mkbp_config_flags
{
3864 EC_MKBP_FLAGS_ENABLE
= 1, /* Enable keyboard scanning */
3867 enum mkbp_config_valid
{
3868 EC_MKBP_VALID_SCAN_PERIOD
= BIT(0),
3869 EC_MKBP_VALID_POLL_TIMEOUT
= BIT(1),
3870 EC_MKBP_VALID_MIN_POST_SCAN_DELAY
= BIT(3),
3871 EC_MKBP_VALID_OUTPUT_SETTLE
= BIT(4),
3872 EC_MKBP_VALID_DEBOUNCE_DOWN
= BIT(5),
3873 EC_MKBP_VALID_DEBOUNCE_UP
= BIT(6),
3874 EC_MKBP_VALID_FIFO_MAX_DEPTH
= BIT(7),
3878 * Configuration for our key scanning algorithm.
3880 * Note that this is used as a sub-structure of
3881 * ec_{params/response}_mkbp_get_config.
3883 struct ec_mkbp_config
{
3884 uint32_t valid_mask
; /* valid fields */
3885 uint8_t flags
; /* some flags (enum mkbp_config_flags) */
3886 uint8_t valid_flags
; /* which flags are valid */
3887 uint16_t scan_period_us
; /* period between start of scans */
3888 /* revert to interrupt mode after no activity for this long */
3889 uint32_t poll_timeout_us
;
3891 * minimum post-scan relax time. Once we finish a scan we check
3892 * the time until we are due to start the next one. If this time is
3893 * shorter this field, we use this instead.
3895 uint16_t min_post_scan_delay_us
;
3896 /* delay between setting up output and waiting for it to settle */
3897 uint16_t output_settle_us
;
3898 uint16_t debounce_down_us
; /* time for debounce on key down */
3899 uint16_t debounce_up_us
; /* time for debounce on key up */
3900 /* maximum depth to allow for fifo (0 = no keyscan output) */
3901 uint8_t fifo_max_depth
;
3904 struct ec_params_mkbp_set_config
{
3905 struct ec_mkbp_config config
;
3908 struct ec_response_mkbp_get_config
{
3909 struct ec_mkbp_config config
;
3912 /* Run the key scan emulation */
3913 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3915 enum ec_keyscan_seq_cmd
{
3916 EC_KEYSCAN_SEQ_STATUS
= 0, /* Get status information */
3917 EC_KEYSCAN_SEQ_CLEAR
= 1, /* Clear sequence */
3918 EC_KEYSCAN_SEQ_ADD
= 2, /* Add item to sequence */
3919 EC_KEYSCAN_SEQ_START
= 3, /* Start running sequence */
3920 EC_KEYSCAN_SEQ_COLLECT
= 4, /* Collect sequence summary data */
3923 enum ec_collect_flags
{
3925 * Indicates this scan was processed by the EC. Due to timing, some
3926 * scans may be skipped.
3928 EC_KEYSCAN_SEQ_FLAG_DONE
= BIT(0),
3931 struct ec_collect_item
{
3932 uint8_t flags
; /* some flags (enum ec_collect_flags) */
3935 struct ec_params_keyscan_seq_ctrl
{
3936 uint8_t cmd
; /* Command to send (enum ec_keyscan_seq_cmd) */
3938 struct __ec_align1
{
3939 uint8_t active
; /* still active */
3940 uint8_t num_items
; /* number of items */
3941 /* Current item being presented */
3944 struct __ec_todo_unpacked
{
3946 * Absolute time for this scan, measured from the
3947 * start of the sequence.
3950 uint8_t scan
[0]; /* keyscan data */
3952 struct __ec_align1
{
3953 uint8_t start_item
; /* First item to return */
3954 uint8_t num_items
; /* Number of items to return */
3959 struct ec_result_keyscan_seq_ctrl
{
3961 struct __ec_todo_unpacked
{
3962 uint8_t num_items
; /* Number of items */
3963 /* Data for each item */
3964 struct ec_collect_item item
[0];
3970 * Get the next pending MKBP event.
3972 * Returns EC_RES_UNAVAILABLE if there is no event pending.
3974 * V0: ec_response_get_next_data
3975 * V1: ec_response_get_next_data_v1. Increased key_matrix size from 13 -> 16.
3976 * V2: Added EC_MKBP_HAS_MORE_EVENTS.
3977 * V3: ec_response_get_next_data_v3. Increased key_matrix size from 16 -> 18.
3979 #define EC_CMD_GET_NEXT_EVENT 0x0067
3981 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3984 * We use the most significant bit of the event type to indicate to the host
3985 * that the EC has more MKBP events available to provide.
3987 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3989 /* The mask to apply to get the raw event type */
3990 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3992 enum ec_mkbp_event
{
3993 /* Keyboard matrix changed. The event data is the new matrix state. */
3994 EC_MKBP_EVENT_KEY_MATRIX
= 0,
3996 /* New host event. The event data is 4 bytes of host event flags. */
3997 EC_MKBP_EVENT_HOST_EVENT
= 1,
3999 /* New Sensor FIFO data. The event data is fifo_info structure. */
4000 EC_MKBP_EVENT_SENSOR_FIFO
= 2,
4002 /* The state of the non-matrixed buttons have changed. */
4003 EC_MKBP_EVENT_BUTTON
= 3,
4005 /* The state of the switches have changed. */
4006 EC_MKBP_EVENT_SWITCH
= 4,
4008 /* New Fingerprint sensor event, the event data is fp_events bitmap. */
4009 EC_MKBP_EVENT_FINGERPRINT
= 5,
4012 * Sysrq event: send emulated sysrq. The event data is sysrq,
4013 * corresponding to the key to be pressed.
4015 EC_MKBP_EVENT_SYSRQ
= 6,
4018 * New 64-bit host event.
4019 * The event data is 8 bytes of host event flags.
4021 EC_MKBP_EVENT_HOST_EVENT64
= 7,
4023 /* Notify the AP that something happened on CEC */
4024 EC_MKBP_EVENT_CEC_EVENT
= 8,
4026 /* Send an incoming CEC message to the AP */
4027 EC_MKBP_EVENT_CEC_MESSAGE
= 9,
4029 /* We have entered DisplayPort Alternate Mode on a Type-C port. */
4030 EC_MKBP_EVENT_DP_ALT_MODE_ENTERED
= 10,
4032 /* New online calibration values are available. */
4033 EC_MKBP_EVENT_ONLINE_CALIBRATION
= 11,
4035 /* Peripheral device charger event */
4036 EC_MKBP_EVENT_PCHG
= 12,
4038 /* Number of MKBP events */
4039 EC_MKBP_EVENT_COUNT
,
4041 BUILD_ASSERT(EC_MKBP_EVENT_COUNT
<= EC_MKBP_EVENT_TYPE_MASK
);
4043 /* clang-format off */
4044 #define EC_MKBP_EVENT_TEXT \
4046 [EC_MKBP_EVENT_KEY_MATRIX] = "KEY_MATRIX", \
4047 [EC_MKBP_EVENT_HOST_EVENT] = "HOST_EVENT", \
4048 [EC_MKBP_EVENT_SENSOR_FIFO] = "SENSOR_FIFO", \
4049 [EC_MKBP_EVENT_BUTTON] = "BUTTON", \
4050 [EC_MKBP_EVENT_SWITCH] = "SWITCH", \
4051 [EC_MKBP_EVENT_FINGERPRINT] = "FINGERPRINT", \
4052 [EC_MKBP_EVENT_SYSRQ] = "SYSRQ", \
4053 [EC_MKBP_EVENT_HOST_EVENT64] = "HOST_EVENT64", \
4054 [EC_MKBP_EVENT_CEC_EVENT] = "CEC_EVENT", \
4055 [EC_MKBP_EVENT_CEC_MESSAGE] = "CEC_MESSAGE", \
4056 [EC_MKBP_EVENT_DP_ALT_MODE_ENTERED] = "DP_ALT_MODE_ENTERED", \
4057 [EC_MKBP_EVENT_ONLINE_CALIBRATION] = "ONLINE_CALIBRATION", \
4058 [EC_MKBP_EVENT_PCHG] = "PCHG", \
4060 /* clang-format on */
4062 union __ec_align_offset1 ec_response_get_next_data
{
4063 uint8_t key_matrix
[13];
4066 uint32_t host_event
;
4067 uint64_t host_event64
;
4069 struct __ec_todo_unpacked
{
4070 /* For aligning the fifo_info */
4071 uint8_t reserved
[3];
4072 struct ec_response_motion_sense_fifo_info info
;
4083 /* CEC events from enum mkbp_cec_event */
4084 uint32_t cec_events
;
4087 union __ec_align_offset1 ec_response_get_next_data_v1
{
4088 uint8_t key_matrix
[16];
4091 uint32_t host_event
;
4092 uint64_t host_event64
;
4094 struct __ec_todo_unpacked
{
4095 /* For aligning the fifo_info */
4096 uint8_t reserved
[3];
4097 struct ec_response_motion_sense_fifo_info info
;
4108 /* CEC events from enum mkbp_cec_event */
4109 uint32_t cec_events
;
4111 uint8_t cec_message
[16];
4113 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1
) == 16);
4115 union __ec_align_offset1 ec_response_get_next_data_v3
{
4116 uint8_t key_matrix
[18];
4119 uint32_t host_event
;
4120 uint64_t host_event64
;
4122 struct __ec_todo_unpacked
{
4123 /* For aligning the fifo_info */
4124 uint8_t reserved
[3];
4125 struct ec_response_motion_sense_fifo_info info
;
4136 /* CEC events from enum mkbp_cec_event */
4137 uint32_t cec_events
;
4139 uint8_t cec_message
[16];
4141 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3
) == 18);
4143 struct ec_response_get_next_event
{
4145 /* Followed by event data if any */
4146 union ec_response_get_next_data data
;
4149 struct ec_response_get_next_event_v1
{
4151 /* Followed by event data if any */
4152 union ec_response_get_next_data_v1 data
;
4155 struct ec_response_get_next_event_v3
{
4157 /* Followed by event data if any */
4158 union ec_response_get_next_data_v3 data
;
4161 /* Bit indices for buttons and switches.*/
4163 #define EC_MKBP_POWER_BUTTON 0
4164 #define EC_MKBP_VOL_UP 1
4165 #define EC_MKBP_VOL_DOWN 2
4166 #define EC_MKBP_RECOVERY 3
4169 #define EC_MKBP_LID_OPEN 0
4170 #define EC_MKBP_TABLET_MODE 1
4171 #define EC_MKBP_BASE_ATTACHED 2
4172 #define EC_MKBP_FRONT_PROXIMITY 3
4174 /* Run keyboard factory test scanning */
4175 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
4177 struct ec_response_keyboard_factory_test
{
4178 uint16_t shorted
; /* Keyboard pins are shorted */
4181 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
4182 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
4183 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
4184 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
4185 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) \
4186 (((fpe) & 0x00000FF0) >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
4187 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12
4188 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
4189 #define EC_MKBP_FP_MATCH_IDX(fpe) \
4190 (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) >> EC_MKBP_FP_MATCH_IDX_OFFSET)
4191 #define EC_MKBP_FP_ENROLL BIT(27)
4192 #define EC_MKBP_FP_MATCH BIT(28)
4193 #define EC_MKBP_FP_FINGER_DOWN BIT(29)
4194 #define EC_MKBP_FP_FINGER_UP BIT(30)
4195 #define EC_MKBP_FP_IMAGE_READY BIT(31)
4196 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
4197 #define EC_MKBP_FP_ERR_ENROLL_OK 0
4198 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
4199 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
4200 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
4201 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
4202 /* Can be used to detect if image was usable for enrollment or not. */
4203 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
4204 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
4205 #define EC_MKBP_FP_ERR_MATCH_NO 0
4206 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
4207 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
4208 #define EC_MKBP_FP_ERR_MATCH_NO_AUTH_FAIL 8
4209 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
4210 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
4211 #define EC_MKBP_FP_ERR_MATCH_YES 1
4212 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
4213 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
4215 #define EC_CMD_MKBP_WAKE_MASK 0x0069
4216 enum ec_mkbp_event_mask_action
{
4217 /* Retrieve the value of a wake mask. */
4220 /* Set the value of a wake mask. */
4224 enum ec_mkbp_mask_type
{
4226 * These are host events sent via MKBP.
4228 * Some examples are:
4229 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN)
4230 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED)
4232 * The only things that should be in this mask are:
4233 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_*)
4235 EC_MKBP_HOST_EVENT_WAKE_MASK
= 0,
4238 * These are MKBP events. Some examples are:
4240 * EC_MKBP_EVENT_KEY_MATRIX
4241 * EC_MKBP_EVENT_SWITCH
4243 * The only things that should be in this mask are EC_MKBP_EVENT_*.
4245 EC_MKBP_EVENT_WAKE_MASK
,
4248 struct ec_params_mkbp_event_wake_mask
{
4249 /* One of enum ec_mkbp_event_mask_action */
4253 * Which MKBP mask are you interested in acting upon? This is one of
4254 * ec_mkbp_mask_type.
4258 /* If setting a new wake mask, this contains the mask to set. */
4259 uint32_t new_wake_mask
;
4262 struct ec_response_mkbp_event_wake_mask
{
4266 /*****************************************************************************/
4267 /* Temperature sensor commands */
4269 /* Read temperature sensor info */
4270 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
4272 struct ec_params_temp_sensor_get_info
{
4276 struct ec_response_temp_sensor_get_info
{
4277 char sensor_name
[32];
4278 uint8_t sensor_type
;
4281 /*****************************************************************************/
4284 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
4285 * commands accidentally sent to the wrong interface. See the ACPI section
4289 /*****************************************************************************/
4290 /* Host event commands */
4292 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
4294 * Host event mask params and response structures, shared by all of the host
4295 * event commands below.
4297 struct ec_params_host_event_mask
{
4301 struct ec_response_host_event_mask
{
4305 /* These all use ec_response_host_event_mask */
4306 #define EC_CMD_HOST_EVENT_GET_B 0x0087
4307 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
4308 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
4309 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
4311 /* These all use ec_params_host_event_mask */
4312 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
4313 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
4314 #define EC_CMD_HOST_EVENT_CLEAR 0x008C
4315 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
4316 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
4319 * Unified host event programming interface - Should be used by newer versions
4320 * of BIOS/OS to program host events and masks
4323 * - EC_RES_INVALID_PARAM: Action or mask type is unknown.
4324 * - EC_RES_ACCESS_DENIED: Action is prohibited for specified mask type.
4327 struct ec_params_host_event
{
4328 /* Action requested by host - one of enum ec_host_event_action. */
4332 * Mask type that the host requested the action on - one of
4333 * enum ec_host_event_mask_type.
4337 /* Set to 0, ignore on read */
4340 /* Value to be used in case of set operations. */
4345 * Response structure returned by EC_CMD_HOST_EVENT.
4346 * Update the value on a GET request. Set to 0 on GET/CLEAR
4349 struct ec_response_host_event
{
4350 /* Mask value in case of get operation */
4354 enum ec_host_event_action
{
4356 * params.value is ignored. Value of mask_type populated
4361 /* Bits in params.value are set */
4364 /* Bits in params.value are cleared */
4365 EC_HOST_EVENT_CLEAR
,
4368 enum ec_host_event_mask_type
{
4370 /* Main host event copy */
4373 /* Copy B of host events */
4377 EC_HOST_EVENT_SCI_MASK
,
4380 EC_HOST_EVENT_SMI_MASK
,
4382 /* Mask of events that should be always reported in hostevents */
4383 EC_HOST_EVENT_ALWAYS_REPORT_MASK
,
4385 /* Active wake mask */
4386 EC_HOST_EVENT_ACTIVE_WAKE_MASK
,
4388 /* Lazy wake mask for S0ix */
4389 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX
,
4391 /* Lazy wake mask for S3 */
4392 EC_HOST_EVENT_LAZY_WAKE_MASK_S3
,
4394 /* Lazy wake mask for S5 */
4395 EC_HOST_EVENT_LAZY_WAKE_MASK_S5
,
4398 #define EC_CMD_HOST_EVENT 0x00A4
4400 /*****************************************************************************/
4401 /* Switch commands */
4403 /* Enable/disable LCD backlight */
4404 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
4406 struct ec_params_switch_enable_backlight
{
4410 /* Enable/disable WLAN/Bluetooth */
4411 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
4412 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
4414 /* Version 0 params; no response */
4415 struct ec_params_switch_enable_wireless_v0
{
4419 /* Version 1 params */
4420 struct ec_params_switch_enable_wireless_v1
{
4421 /* Flags to enable now */
4424 /* Which flags to copy from now_flags */
4428 * Flags to leave enabled in S3, if they're on at the S0->S3
4429 * transition. (Other flags will be disabled by the S0->S3
4432 uint8_t suspend_flags
;
4434 /* Which flags to copy from suspend_flags */
4435 uint8_t suspend_mask
;
4438 /* Version 1 response */
4439 struct ec_response_switch_enable_wireless_v1
{
4440 /* Flags to enable now */
4443 /* Flags to leave enabled in S3 */
4444 uint8_t suspend_flags
;
4447 /*****************************************************************************/
4448 /* GPIO commands. Only available on EC if write protect has been disabled. */
4450 /* Set GPIO output value */
4451 #define EC_CMD_GPIO_SET 0x0092
4453 struct ec_params_gpio_set
{
4458 /* Get GPIO value */
4459 #define EC_CMD_GPIO_GET 0x0093
4461 /* Version 0 of input params and response */
4462 struct ec_params_gpio_get
{
4466 struct ec_response_gpio_get
{
4470 /* Version 1 of input params and response */
4471 struct ec_params_gpio_get_v1
{
4474 struct __ec_align1
{
4476 } get_value_by_name
;
4477 struct __ec_align1
{
4483 struct ec_response_gpio_get_v1
{
4485 struct __ec_align1
{
4487 } get_value_by_name
, get_count
;
4488 struct __ec_todo_unpacked
{
4496 enum gpio_get_subcmd
{
4497 EC_GPIO_GET_BY_NAME
= 0,
4498 EC_GPIO_GET_COUNT
= 1,
4499 EC_GPIO_GET_INFO
= 2,
4502 /*****************************************************************************/
4503 /* I2C commands. Only available when flash write protect is unlocked. */
4506 * CAUTION: These commands are deprecated, and are not supported anymore in EC
4507 * builds >= 8398.0.0 (see crosbug.com/p/23570).
4509 * Use EC_CMD_I2C_PASSTHRU instead.
4513 #define EC_CMD_I2C_READ 0x0094
4515 struct ec_params_i2c_read
{
4516 uint16_t addr
; /* 8-bit address (7-bit shifted << 1) */
4517 uint8_t read_size
; /* Either 8 or 16. */
4522 struct ec_response_i2c_read
{
4527 #define EC_CMD_I2C_WRITE 0x0095
4529 struct ec_params_i2c_write
{
4531 uint16_t addr
; /* 8-bit address (7-bit shifted << 1) */
4532 uint8_t write_size
; /* Either 8 or 16. */
4537 /*****************************************************************************/
4538 /* Charge state commands. Only available when flash write protect unlocked. */
4540 /* Force charge state machine to stop charging the battery or force it to
4541 * discharge the battery.
4543 #define EC_CMD_CHARGE_CONTROL 0x0096
4544 #define EC_VER_CHARGE_CONTROL 3
4546 enum ec_charge_control_mode
{
4547 CHARGE_CONTROL_NORMAL
= 0,
4548 CHARGE_CONTROL_IDLE
,
4549 CHARGE_CONTROL_DISCHARGE
,
4550 /* Add no more entry below. */
4551 CHARGE_CONTROL_COUNT
,
4554 #define EC_CHARGE_MODE_TEXT \
4556 [CHARGE_CONTROL_NORMAL] = "NORMAL", \
4557 [CHARGE_CONTROL_IDLE] = "IDLE", \
4558 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \
4561 enum ec_charge_control_cmd
{
4562 EC_CHARGE_CONTROL_CMD_SET
= 0,
4563 EC_CHARGE_CONTROL_CMD_GET
,
4566 enum ec_charge_control_flag
{
4567 EC_CHARGE_CONTROL_FLAG_NO_IDLE
= BIT(0),
4570 struct ec_params_charge_control
{
4571 uint32_t mode
; /* enum charge_control_mode */
4573 /* Below are the fields added in V2. */
4574 uint8_t cmd
; /* enum ec_charge_control_cmd. */
4575 uint8_t flags
; /* enum ec_charge_control_flag (v3+) */
4577 * Lower and upper thresholds for battery sustainer. This struct isn't
4578 * named to avoid tainting foreign projects' name spaces.
4580 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer
4581 * will be disabled. To disable battery sustainer, set mode=NORMAL,
4582 * lower=-1, upper=-1.
4585 int8_t lower
; /* Display SoC in percentage. */
4586 int8_t upper
; /* Display SoC in percentage. */
4591 struct ec_response_charge_control
{
4592 uint32_t mode
; /* enum charge_control_mode */
4593 struct { /* Battery sustainer thresholds */
4597 uint8_t flags
; /* enum ec_charge_control_flag (v3+) */
4601 /*****************************************************************************/
4603 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
4604 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
4607 * Read data from the saved snapshot. If the subcmd parameter is
4608 * CONSOLE_READ_NEXT, this will return data starting from the beginning of
4609 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
4610 * end of the previous snapshot.
4612 * The params are only looked at in version >= 1 of this command. Prior
4613 * versions will just default to CONSOLE_READ_NEXT behavior.
4615 * Response is null-terminated string. Empty string, if there is no more
4618 #define EC_CMD_CONSOLE_READ 0x0098
4620 enum ec_console_read_subcmd
{
4621 CONSOLE_READ_NEXT
= 0,
4622 CONSOLE_READ_RECENT
,
4625 struct ec_params_console_read_v1
{
4626 uint8_t subcmd
; /* enum ec_console_read_subcmd */
4629 /* Print directly to EC console from host. */
4630 #define EC_CMD_CONSOLE_PRINT 0x00AC
4632 /*****************************************************************************/
4635 * Cut off battery power immediately or after the host has shut down.
4637 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
4638 * EC_RES_SUCCESS if the command was successful.
4639 * EC_RES_ERROR if the cut off command failed.
4641 #define EC_CMD_BATTERY_CUT_OFF 0x0099
4643 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
4645 struct ec_params_battery_cutoff
{
4649 /*****************************************************************************/
4650 /* USB port mux control. */
4653 * Switch USB mux or return to automatic switching.
4655 #define EC_CMD_USB_MUX 0x009A
4657 struct ec_params_usb_mux
{
4661 /*****************************************************************************/
4662 /* LDOs / FETs control. */
4665 EC_LDO_STATE_OFF
= 0, /* the LDO / FET is shut down */
4666 EC_LDO_STATE_ON
= 1, /* the LDO / FET is ON / providing power */
4670 * Switch on/off a LDO.
4672 #define EC_CMD_LDO_SET 0x009B
4674 struct ec_params_ldo_set
{
4682 #define EC_CMD_LDO_GET 0x009C
4684 struct ec_params_ldo_get
{
4688 struct ec_response_ldo_get
{
4692 /*****************************************************************************/
4698 * Note: v0 of this command is deprecated
4700 #define EC_CMD_POWER_INFO 0x009D
4703 * v1 of EC_CMD_POWER_INFO
4705 enum system_power_source
{
4707 * Haven't established which power source is used yet,
4708 * or no presence signals are available
4710 POWER_SOURCE_UNKNOWN
= 0,
4711 /* System is running on battery alone */
4712 POWER_SOURCE_BATTERY
= 1,
4713 /* System is running on A/C alone */
4714 POWER_SOURCE_AC
= 2,
4715 /* System is running on A/C and battery */
4716 POWER_SOURCE_AC_BATTERY
= 3,
4719 struct ec_response_power_info_v1
{
4720 /* enum system_power_source */
4721 uint8_t system_power_source
;
4722 /* Battery state-of-charge, 0-100, 0 if not present */
4723 uint8_t battery_soc
;
4724 /* AC Adapter 100% rating, Watts */
4725 uint8_t ac_adapter_100pct
;
4726 /* AC Adapter 10ms rating, Watts */
4727 uint8_t ac_adapter_10ms
;
4728 /* Battery 1C rating, derated */
4729 uint8_t battery_1cd
;
4730 /* Rest of Platform average, Watts */
4732 /* Rest of Platform peak, Watts */
4734 /* Nominal charger efficiency, % */
4735 uint8_t nominal_charger_eff
;
4736 /* Rest of Platform VR Average Efficiency, % */
4737 uint8_t rop_avg_eff
;
4738 /* Rest of Platform VR Peak Efficiency, % */
4739 uint8_t rop_peak_eff
;
4740 /* SoC VR Efficiency at Average level, % */
4741 uint8_t soc_avg_eff
;
4742 /* SoC VR Efficiency at Peak level, % */
4743 uint8_t soc_peak_eff
;
4744 /* Intel-specific items */
4746 /* Battery's level of DBPT support: 0, 2 */
4747 uint8_t batt_dbpt_support_level
;
4749 * Maximum peak power from battery (10ms), Watts
4750 * If DBPT is not supported, this is 0
4752 uint8_t batt_dbpt_max_peak_power
;
4754 * Sustained peak power from battery, Watts
4755 * If DBPT is not supported, this is 0
4757 uint8_t batt_dbpt_sus_peak_power
;
4761 /*****************************************************************************/
4762 /* I2C passthru command */
4764 #define EC_CMD_I2C_PASSTHRU 0x009E
4766 /* Read data; if not present, message is a write */
4767 #define EC_I2C_FLAG_READ BIT(15)
4769 /* Mask for address */
4770 #define EC_I2C_ADDR_MASK 0x3ff
4772 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */
4773 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */
4776 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
4778 struct ec_params_i2c_passthru_msg
{
4779 uint16_t addr_flags
; /* I2C peripheral address and flags */
4780 uint16_t len
; /* Number of bytes to read or write */
4783 struct ec_params_i2c_passthru
{
4784 uint8_t port
; /* I2C port number */
4785 uint8_t num_msgs
; /* Number of messages */
4786 struct ec_params_i2c_passthru_msg msg
[];
4787 /* Data to write for all messages is concatenated here */
4790 struct ec_response_i2c_passthru
{
4791 uint8_t i2c_status
; /* Status flags (EC_I2C_STATUS_...) */
4792 uint8_t num_msgs
; /* Number of messages processed */
4793 uint8_t data
[]; /* Data read by messages concatenated here */
4796 /*****************************************************************************/
4797 /* AP hang detect */
4798 #define EC_CMD_HANG_DETECT 0x009F
4800 #define EC_HANG_DETECT_MIN_TIMEOUT 5
4802 /* EC hang detect commands */
4803 enum ec_hang_detect_cmds
{
4804 /* Reload AP hang detect timer. */
4805 EC_HANG_DETECT_CMD_RELOAD
= 0x0,
4807 /* Stop AP hang detect timer. */
4808 EC_HANG_DETECT_CMD_CANCEL
= 0x1,
4810 /* Configure watchdog with given reboot timeout and
4811 * cancel currently running AP hand detect timer.
4813 EC_HANG_DETECT_CMD_SET_TIMEOUT
= 0x2,
4815 /* Get last hang status - whether the AP boot was clear or not */
4816 EC_HANG_DETECT_CMD_GET_STATUS
= 0x3,
4818 /* Clear last hang status. Called when AP is rebooting/shutting down
4821 EC_HANG_DETECT_CMD_CLEAR_STATUS
= 0x4
4824 struct ec_params_hang_detect
{
4825 uint16_t command
; /* enum ec_hang_detect_cmds */
4826 /* Timeout in seconds before generating reboot */
4827 uint16_t reboot_timeout_sec
;
4830 /* Status codes that describe whether AP has boot normally or the hang has been
4831 * detected and EC has reset AP
4833 enum ec_hang_detect_status
{
4834 EC_HANG_DETECT_AP_BOOT_NORMAL
= 0x0,
4835 EC_HANG_DETECT_AP_BOOT_EC_WDT
= 0x1,
4836 EC_HANG_DETECT_AP_BOOT_COUNT
,
4838 struct ec_response_hang_detect
{
4839 uint8_t status
; /* enum ec_hang_detect_status */
4841 /*****************************************************************************/
4842 /* Commands for battery charging */
4845 * This is the single catch-all host command to exchange data regarding the
4846 * charge state machine (v2 and up).
4848 #define EC_CMD_CHARGE_STATE 0x00A0
4850 /* Subcommands for this host command */
4851 enum charge_state_command
{
4852 CHARGE_STATE_CMD_GET_STATE
,
4853 CHARGE_STATE_CMD_GET_PARAM
,
4854 CHARGE_STATE_CMD_SET_PARAM
,
4855 CHARGE_STATE_NUM_CMDS
,
4859 * Known param numbers are defined here. Ranges are reserved for board-specific
4860 * params, which are handled by the particular implementations.
4862 enum charge_state_params
{
4863 /* charger voltage limit */
4864 CS_PARAM_CHG_VOLTAGE
,
4866 /* charger current limit */
4867 CS_PARAM_CHG_CURRENT
,
4869 /* charger input current limit */
4870 CS_PARAM_CHG_INPUT_CURRENT
,
4872 /* charger-specific status */
4873 CS_PARAM_CHG_STATUS
,
4875 /* charger-specific options */
4876 CS_PARAM_CHG_OPTION
,
4879 * Check if power is limited due to low battery and / or a
4880 * weak external charger. READ ONLY.
4882 CS_PARAM_LIMIT_POWER
,
4884 /* How many so far? */
4887 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4888 CS_PARAM_CUSTOM_PROFILE_MIN
= 0x10000,
4889 CS_PARAM_CUSTOM_PROFILE_MAX
= 0x1ffff,
4891 /* Range for CONFIG_CHARGE_STATE_DEBUG params */
4892 CS_PARAM_DEBUG_MIN
= 0x20000,
4893 CS_PARAM_DEBUG_CTL_MODE
= 0x20000,
4894 CS_PARAM_DEBUG_MANUAL_MODE
,
4895 CS_PARAM_DEBUG_SEEMS_DEAD
,
4896 CS_PARAM_DEBUG_SEEMS_DISCONNECTED
,
4897 CS_PARAM_DEBUG_BATT_REMOVED
, /* Deprecated */
4898 CS_PARAM_DEBUG_MANUAL_CURRENT
,
4899 CS_PARAM_DEBUG_MANUAL_VOLTAGE
,
4900 CS_PARAM_DEBUG_MAX
= 0x2ffff,
4902 /* Other custom param ranges go here... */
4905 struct ec_params_charge_state
{
4906 uint8_t cmd
; /* enum charge_state_command */
4908 /* get_state has no args */
4910 struct __ec_todo_unpacked
{
4911 uint32_t param
; /* enum charge_state_param */
4914 struct __ec_todo_unpacked
{
4915 uint32_t param
; /* param to set */
4916 uint32_t value
; /* value to set */
4919 uint8_t chgnum
; /* Version 1 supports chgnum */
4922 struct ec_response_charge_state
{
4924 struct __ec_align4
{
4928 int chg_input_current
;
4929 int batt_state_of_charge
;
4932 struct __ec_align4
{
4936 /* set_param returns no args */
4941 * Set maximum battery charging current.
4943 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4944 #define EC_VER_CHARGE_CURRENT_LIMIT 1
4946 struct ec_params_current_limit
{
4947 uint32_t limit
; /* in mA */
4950 struct ec_params_current_limit_v1
{
4951 uint32_t limit
; /* in mA */
4953 * Battery state of charge is the minimum charge percentage at which
4954 * the battery charge current limit will apply.
4955 * When not set, the limit will apply regardless of state of charge.
4957 uint8_t battery_soc
; /* battery state of charge, 0-100 */
4961 * Set maximum external voltage / current.
4963 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4965 /* Command v0 is used only on Spring and is obsolete + unsupported */
4966 struct ec_params_external_power_limit_v1
{
4967 uint16_t current_lim
; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4968 uint16_t voltage_lim
; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4971 #define EC_POWER_LIMIT_NONE 0xffff
4974 * Set maximum voltage & current of a dedicated charge port
4976 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4978 struct ec_params_dedicated_charger_limit
{
4979 uint16_t current_lim
; /* in mA */
4980 uint16_t voltage_lim
; /* in mV */
4984 * Get and set charging splashscreen variables
4986 #define EC_CMD_CHARGESPLASH 0x00A5
4988 enum ec_chargesplash_cmd
{
4989 /* Get the current state variables */
4990 EC_CHARGESPLASH_GET_STATE
= 0,
4992 /* Indicate initialization of the display loop */
4993 EC_CHARGESPLASH_DISPLAY_READY
,
4995 /* Manually put the EC into the requested state */
4996 EC_CHARGESPLASH_REQUEST
,
4998 /* Reset all state variables */
4999 EC_CHARGESPLASH_RESET
,
5001 /* Manually trigger a lockout */
5002 EC_CHARGESPLASH_LOCKOUT
,
5005 struct __ec_align1 ec_params_chargesplash
{
5006 /* enum ec_chargesplash_cmd */
5010 struct __ec_align1 ec_response_chargesplash
{
5012 uint8_t display_initialized
;
5016 /*****************************************************************************/
5017 /* Hibernate/Deep Sleep Commands */
5019 /* Set the delay before going into hibernation. */
5020 #define EC_CMD_HIBERNATION_DELAY 0x00A8
5022 struct ec_params_hibernation_delay
{
5024 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
5025 * current settings without changing them.
5030 struct ec_response_hibernation_delay
{
5032 * The current time in seconds in which the system has been in the G3
5033 * state. This value is reset if the EC transitions out of G3.
5038 * The current time remaining in seconds until the EC should hibernate.
5039 * This value is also reset if the EC transitions out of G3.
5041 uint32_t time_remaining
;
5044 * The current time in seconds that the EC should wait in G3 before
5047 uint32_t hibernate_delay
;
5050 /* Inform the EC when entering a sleep state */
5051 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
5053 enum host_sleep_event
{
5054 HOST_SLEEP_EVENT_S3_SUSPEND
= 1,
5055 HOST_SLEEP_EVENT_S3_RESUME
= 2,
5056 HOST_SLEEP_EVENT_S0IX_SUSPEND
= 3,
5057 HOST_SLEEP_EVENT_S0IX_RESUME
= 4,
5058 /* S3 suspend with additional enabled wake sources */
5059 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND
= 5,
5062 struct ec_params_host_sleep_event
{
5063 uint8_t sleep_event
;
5067 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
5068 * transition failures
5070 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
5072 /* Disable timeout detection for this sleep transition */
5073 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
5075 struct ec_params_host_sleep_event_v1
{
5076 /* The type of sleep being entered or exited. */
5077 uint8_t sleep_event
;
5082 /* Parameters that apply for suspend messages. */
5085 * The timeout in milliseconds between when this message
5086 * is received and when the EC will declare sleep
5087 * transition failure if the sleep signal is not
5090 uint16_t sleep_timeout_ms
;
5093 /* No parameters for non-suspend messages. */
5097 /* A timeout occurred when this bit is set */
5098 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
5101 * The mask defining which bits correspond to the number of sleep transitions,
5102 * as well as the maximum number of suspend line transitions that will be
5103 * reported back to the host.
5105 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
5107 struct ec_response_host_sleep_event_v1
{
5109 /* Response fields that apply for resume messages. */
5112 * The number of sleep power signal transitions that
5113 * occurred since the suspend message. The high bit
5114 * indicates a timeout occurred.
5116 uint32_t sleep_transitions
;
5119 /* No response fields for non-resume messages. */
5123 /*****************************************************************************/
5125 #define EC_CMD_DEVICE_EVENT 0x00AA
5127 enum ec_device_event
{
5128 EC_DEVICE_EVENT_TRACKPAD
,
5129 EC_DEVICE_EVENT_DSP
,
5130 EC_DEVICE_EVENT_WIFI
,
5131 EC_DEVICE_EVENT_WLC
,
5134 enum ec_device_event_param
{
5135 /* Get and clear pending device events */
5136 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS
,
5137 /* Get device event mask */
5138 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS
,
5139 /* Set device event mask */
5140 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS
,
5143 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
5145 struct ec_params_device_event
{
5146 uint32_t event_mask
;
5150 struct ec_response_device_event
{
5151 uint32_t event_mask
;
5154 /*****************************************************************************/
5155 /* Get s0ix counter */
5156 #define EC_CMD_GET_S0IX_COUNTER 0x00AB
5158 /* Flag use to reset the counter */
5159 #define EC_S0IX_COUNTER_RESET 0x1
5161 struct ec_params_s0ix_cnt
{
5162 /* If EC_S0IX_COUNTER_RESET then reset otherwise get the counter */
5166 struct ec_response_s0ix_cnt
{
5167 /* Value of the s0ix_counter */
5168 uint32_t s0ix_counter
;
5171 /*****************************************************************************/
5172 /* Smart battery pass-through */
5174 /* Get / Set 16-bit smart battery registers - OBSOLETE */
5175 #define EC_CMD_SB_READ_WORD 0x00B0
5176 #define EC_CMD_SB_WRITE_WORD 0x00B1
5178 /* Get / Set string smart battery parameters
5179 * formatted as SMBUS "block". - OBSOLETE
5181 #define EC_CMD_SB_READ_BLOCK 0x00B2
5182 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
5184 /*****************************************************************************/
5185 /* Battery vendor parameters
5187 * Get or set vendor-specific parameters in the battery. Implementations may
5188 * differ between boards or batteries. On a set operation, the response
5189 * contains the actual value set, which may be rounded or clipped from the
5193 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
5195 enum ec_battery_vendor_param_mode
{
5196 BATTERY_VENDOR_PARAM_MODE_GET
= 0,
5197 BATTERY_VENDOR_PARAM_MODE_SET
,
5200 struct ec_params_battery_vendor_param
{
5206 struct ec_response_battery_vendor_param
{
5210 /*****************************************************************************/
5212 * Smart Battery Firmware Update Command - OBSOLETE
5214 #define EC_CMD_SB_FW_UPDATE 0x00B5
5217 * Entering Verified Boot Mode Command
5218 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
5219 * Valid Modes are: normal, developer, and recovery.
5221 * EC no longer needs to know what mode vboot has entered,
5222 * so this command is deprecated. (See chromium:1014379.)
5224 #define EC_CMD_ENTERING_MODE 0x00B6
5226 struct ec_params_entering_mode
{
5230 #define VBOOT_MODE_NORMAL 0
5231 #define VBOOT_MODE_DEVELOPER 1
5232 #define VBOOT_MODE_RECOVERY 2
5234 /*****************************************************************************/
5236 * I2C passthru protection command: Protects I2C tunnels against access on
5237 * certain addresses (board-specific).
5239 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
5241 enum ec_i2c_passthru_protect_subcmd
{
5242 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS
= 0,
5243 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE
= 1,
5244 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE_TCPCS
= 2,
5247 struct ec_params_i2c_passthru_protect
{
5249 uint8_t port
; /* I2C port number */
5252 struct ec_response_i2c_passthru_protect
{
5253 uint8_t status
; /* Status flags (0: unlocked, 1: locked) */
5256 /*****************************************************************************/
5260 * These commands are for sending and receiving message via HDMI CEC
5263 #define EC_CEC_MAX_PORTS 16
5265 #define MAX_CEC_MSG_LEN 16
5268 * Helper macros for packing/unpacking cec_events.
5269 * bits[27:0] : bitmask of events from enum mkbp_cec_event
5270 * bits[31:28]: port number
5272 #define EC_MKBP_EVENT_CEC_PACK(events, port) \
5273 (((events) & GENMASK(27, 0)) | (((port) & 0xf) << 28))
5274 #define EC_MKBP_EVENT_CEC_GET_EVENTS(event) ((event) & GENMASK(27, 0))
5275 #define EC_MKBP_EVENT_CEC_GET_PORT(event) (((event) >> 28) & 0xf)
5277 /* CEC message from the AP to be written on the CEC bus */
5278 #define EC_CMD_CEC_WRITE_MSG 0x00B8
5281 * struct ec_params_cec_write - Message to write to the CEC bus
5282 * @msg: message content to write to the CEC bus
5284 struct ec_params_cec_write
{
5285 uint8_t msg
[MAX_CEC_MSG_LEN
];
5289 * struct ec_params_cec_write_v1 - Message to write to the CEC bus
5290 * @port: CEC port to write the message on
5291 * @msg_len: length of msg in bytes
5292 * @msg: message content to write to the CEC bus
5294 struct ec_params_cec_write_v1
{
5297 uint8_t msg
[MAX_CEC_MSG_LEN
];
5300 /* CEC message read from a CEC bus reported back to the AP */
5301 #define EC_CMD_CEC_READ_MSG 0x00B9
5304 * struct ec_params_cec_read - Read a message from the CEC bus
5305 * @port: CEC port to read a message on
5307 struct ec_params_cec_read
{
5312 * struct ec_response_cec_read - Message read from the CEC bus
5313 * @msg_len: length of msg in bytes
5314 * @msg: message content read from the CEC bus
5316 struct ec_response_cec_read
{
5318 uint8_t msg
[MAX_CEC_MSG_LEN
];
5321 /* Set various CEC parameters */
5322 #define EC_CMD_CEC_SET 0x00BA
5325 * struct ec_params_cec_set - CEC parameters set
5326 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
5327 * @port: CEC port to set the parameter on
5328 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
5329 * or 1 to enable CEC functionality, in case cmd is
5330 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
5331 * address between 0 and 15 or 0xff to unregister
5333 struct ec_params_cec_set
{
5334 uint8_t cmd
: 4; /* enum cec_command */
5339 /* Read various CEC parameters */
5340 #define EC_CMD_CEC_GET 0x00BB
5343 * struct ec_params_cec_get - CEC parameters get
5344 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
5345 * @port: CEC port to get the parameter on
5347 struct ec_params_cec_get
{
5348 uint8_t cmd
: 4; /* enum cec_command */
5353 * struct ec_response_cec_get - CEC parameters get response
5354 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
5355 * disabled or 1 if CEC functionality is enabled,
5356 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
5357 * configured logical address between 0 and 15 or 0xff if unregistered
5359 struct ec_response_cec_get
{
5363 /* Get the number of CEC ports */
5364 #define EC_CMD_CEC_PORT_COUNT 0x00C1
5367 * struct ec_response_cec_port_count - CEC port count response
5368 * @port_count: number of CEC ports
5370 struct ec_response_cec_port_count
{
5374 /* CEC parameters command */
5376 /* CEC reading, writing and events enable */
5378 /* CEC logical address */
5379 CEC_CMD_LOGICAL_ADDRESS
,
5382 /* Events from CEC to AP */
5383 enum mkbp_cec_event
{
5384 /* Outgoing message was acknowledged by a follower */
5385 EC_MKBP_CEC_SEND_OK
= BIT(0),
5386 /* Outgoing message was not acknowledged */
5387 EC_MKBP_CEC_SEND_FAILED
= BIT(1),
5388 /* Incoming message can be read out by AP */
5389 EC_MKBP_CEC_HAVE_DATA
= BIT(2),
5392 /*****************************************************************************/
5394 /* Commands for audio codec. */
5395 #define EC_CMD_EC_CODEC 0x00BC
5397 enum ec_codec_subcmd
{
5398 EC_CODEC_GET_CAPABILITIES
= 0x0,
5399 EC_CODEC_GET_SHM_ADDR
= 0x1,
5400 EC_CODEC_SET_SHM_ADDR
= 0x2,
5401 EC_CODEC_SUBCMD_COUNT
,
5405 EC_CODEC_CAP_WOV_AUDIO_SHM
= 0,
5406 EC_CODEC_CAP_WOV_LANG_SHM
= 1,
5407 EC_CODEC_CAP_LAST
= 32,
5410 enum ec_codec_shm_id
{
5411 EC_CODEC_SHM_ID_WOV_AUDIO
= 0x0,
5412 EC_CODEC_SHM_ID_WOV_LANG
= 0x1,
5413 EC_CODEC_SHM_ID_LAST
,
5416 enum ec_codec_shm_type
{
5417 EC_CODEC_SHM_TYPE_EC_RAM
= 0x0,
5418 EC_CODEC_SHM_TYPE_SYSTEM_RAM
= 0x1,
5421 struct __ec_align1 ec_param_ec_codec_get_shm_addr
{
5423 uint8_t reserved
[3];
5426 struct __ec_align4 ec_param_ec_codec_set_shm_addr
{
5430 uint8_t reserved
[3];
5433 struct __ec_align4 ec_param_ec_codec
{
5434 uint8_t cmd
; /* enum ec_codec_subcmd */
5435 uint8_t reserved
[3];
5438 struct ec_param_ec_codec_get_shm_addr get_shm_addr_param
;
5439 struct ec_param_ec_codec_set_shm_addr set_shm_addr_param
;
5443 struct __ec_align4 ec_response_ec_codec_get_capabilities
{
5444 uint32_t capabilities
;
5447 struct __ec_align4 ec_response_ec_codec_get_shm_addr
{
5451 uint8_t reserved
[3];
5454 /*****************************************************************************/
5456 /* Commands for DMIC on audio codec. */
5457 #define EC_CMD_EC_CODEC_DMIC 0x00BD
5459 enum ec_codec_dmic_subcmd
{
5460 EC_CODEC_DMIC_GET_MAX_GAIN
= 0x0,
5461 EC_CODEC_DMIC_SET_GAIN_IDX
= 0x1,
5462 EC_CODEC_DMIC_GET_GAIN_IDX
= 0x2,
5463 EC_CODEC_DMIC_SUBCMD_COUNT
,
5466 enum ec_codec_dmic_channel
{
5467 EC_CODEC_DMIC_CHANNEL_0
= 0x0,
5468 EC_CODEC_DMIC_CHANNEL_1
= 0x1,
5469 EC_CODEC_DMIC_CHANNEL_2
= 0x2,
5470 EC_CODEC_DMIC_CHANNEL_3
= 0x3,
5471 EC_CODEC_DMIC_CHANNEL_4
= 0x4,
5472 EC_CODEC_DMIC_CHANNEL_5
= 0x5,
5473 EC_CODEC_DMIC_CHANNEL_6
= 0x6,
5474 EC_CODEC_DMIC_CHANNEL_7
= 0x7,
5475 EC_CODEC_DMIC_CHANNEL_COUNT
,
5478 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx
{
5479 uint8_t channel
; /* enum ec_codec_dmic_channel */
5481 uint8_t reserved
[2];
5484 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx
{
5485 uint8_t channel
; /* enum ec_codec_dmic_channel */
5486 uint8_t reserved
[3];
5489 struct __ec_align4 ec_param_ec_codec_dmic
{
5490 uint8_t cmd
; /* enum ec_codec_dmic_subcmd */
5491 uint8_t reserved
[3];
5494 struct ec_param_ec_codec_dmic_set_gain_idx set_gain_idx_param
;
5495 struct ec_param_ec_codec_dmic_get_gain_idx get_gain_idx_param
;
5499 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain
{
5503 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx
{
5507 /*****************************************************************************/
5509 /* Commands for I2S RX on audio codec. */
5511 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
5513 enum ec_codec_i2s_rx_subcmd
{
5514 EC_CODEC_I2S_RX_ENABLE
= 0x0,
5515 EC_CODEC_I2S_RX_DISABLE
= 0x1,
5516 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH
= 0x2,
5517 EC_CODEC_I2S_RX_SET_DAIFMT
= 0x3,
5518 EC_CODEC_I2S_RX_SET_BCLK
= 0x4,
5519 EC_CODEC_I2S_RX_RESET
= 0x5,
5520 EC_CODEC_I2S_RX_SUBCMD_COUNT
,
5523 enum ec_codec_i2s_rx_sample_depth
{
5524 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16
= 0x0,
5525 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24
= 0x1,
5526 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT
,
5529 enum ec_codec_i2s_rx_daifmt
{
5530 EC_CODEC_I2S_RX_DAIFMT_I2S
= 0x0,
5531 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J
= 0x1,
5532 EC_CODEC_I2S_RX_DAIFMT_LEFT_J
= 0x2,
5533 EC_CODEC_I2S_RX_DAIFMT_COUNT
,
5536 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth
{
5538 uint8_t reserved
[3];
5541 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain
{
5544 uint8_t reserved
[2];
5547 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt
{
5549 uint8_t reserved
[3];
5552 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk
{
5556 struct __ec_align4 ec_param_ec_codec_i2s_rx
{
5557 uint8_t cmd
; /* enum ec_codec_i2s_rx_subcmd */
5558 uint8_t reserved
[3];
5561 struct ec_param_ec_codec_i2s_rx_set_sample_depth
5562 set_sample_depth_param
;
5563 struct ec_param_ec_codec_i2s_rx_set_daifmt set_daifmt_param
;
5564 struct ec_param_ec_codec_i2s_rx_set_bclk set_bclk_param
;
5568 /*****************************************************************************/
5569 /* Commands for WoV on audio codec. */
5571 #define EC_CMD_EC_CODEC_WOV 0x00BF
5573 enum ec_codec_wov_subcmd
{
5574 EC_CODEC_WOV_SET_LANG
= 0x0,
5575 EC_CODEC_WOV_SET_LANG_SHM
= 0x1,
5576 EC_CODEC_WOV_GET_LANG
= 0x2,
5577 EC_CODEC_WOV_ENABLE
= 0x3,
5578 EC_CODEC_WOV_DISABLE
= 0x4,
5579 EC_CODEC_WOV_READ_AUDIO
= 0x5,
5580 EC_CODEC_WOV_READ_AUDIO_SHM
= 0x6,
5581 EC_CODEC_WOV_SUBCMD_COUNT
,
5585 * @hash is SHA256 of the whole language model.
5586 * @total_len indicates the length of whole language model.
5587 * @offset is the cursor from the beginning of the model.
5588 * @buf is the packet buffer.
5589 * @len denotes how many bytes in the buf.
5591 struct __ec_align4 ec_param_ec_codec_wov_set_lang
{
5599 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm
{
5604 struct __ec_align4 ec_param_ec_codec_wov
{
5605 uint8_t cmd
; /* enum ec_codec_wov_subcmd */
5606 uint8_t reserved
[3];
5609 struct ec_param_ec_codec_wov_set_lang set_lang_param
;
5610 struct ec_param_ec_codec_wov_set_lang_shm set_lang_shm_param
;
5614 struct __ec_align4 ec_response_ec_codec_wov_get_lang
{
5618 struct __ec_align4 ec_response_ec_codec_wov_read_audio
{
5623 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm
{
5628 /*****************************************************************************/
5629 /* Commands for PoE PSE controller */
5631 #define EC_CMD_PSE 0x00C0
5633 enum ec_pse_subcmd
{
5634 EC_PSE_STATUS
= 0x0,
5635 EC_PSE_ENABLE
= 0x1,
5636 EC_PSE_DISABLE
= 0x2,
5637 EC_PSE_SUBCMD_COUNT
,
5640 struct __ec_align1 ec_params_pse
{
5641 uint8_t cmd
; /* enum ec_pse_subcmd */
5642 uint8_t port
; /* PSE port */
5645 enum ec_pse_status
{
5646 EC_PSE_STATUS_DISABLED
= 0x0,
5647 EC_PSE_STATUS_ENABLED
= 0x1,
5648 EC_PSE_STATUS_POWERED
= 0x2,
5651 struct __ec_align1 ec_response_pse_status
{
5652 uint8_t status
; /* enum ec_pse_status */
5655 /*****************************************************************************/
5656 /* System commands */
5659 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
5660 * necessarily reboot the EC. Rename to "image" or something similar?
5662 #define EC_CMD_REBOOT_EC 0x00D2
5665 enum ec_reboot_cmd
{
5666 EC_REBOOT_CANCEL
= 0, /* Cancel a pending reboot */
5667 EC_REBOOT_JUMP_RO
= 1, /* Jump to RO without rebooting */
5668 EC_REBOOT_JUMP_RW
= 2, /* Jump to active RW without rebooting */
5669 /* (command 3 was jump to RW-B) */
5670 EC_REBOOT_COLD
= 4, /* Cold-reboot */
5671 EC_REBOOT_DISABLE_JUMP
= 5, /* Disable jump until next reboot */
5672 EC_REBOOT_HIBERNATE
= 6, /* Hibernate EC */
5674 * DEPRECATED: Hibernate EC and clears AP_IDLE flag.
5675 * Use EC_REBOOT_HIBERNATE and EC_REBOOT_FLAG_CLEAR_AP_IDLE, instead.
5677 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF
= 7,
5678 EC_REBOOT_COLD_AP_OFF
= 8, /* Cold-reboot and don't boot AP */
5679 EC_REBOOT_NO_OP
= 9, /* Do nothing but apply the flags. */
5682 /* Flags for ec_params_reboot_ec.reboot_flags */
5683 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */
5684 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */
5685 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */
5686 #define EC_REBOOT_FLAG_CLEAR_AP_IDLE BIT(3) /* Clear AP_IDLE flag */
5688 struct ec_params_reboot_ec
{
5689 uint8_t cmd
; /* enum ec_reboot_cmd */
5690 uint8_t flags
; /* See EC_REBOOT_FLAG_* */
5694 * Get information on last EC panic.
5696 * Returns variable-length platform-dependent panic information. See panic.h
5699 #define EC_CMD_GET_PANIC_INFO 0x00D3
5701 struct ec_params_get_panic_info_v1
{
5702 /* Do not modify PANIC_DATA_FLAG_OLD_HOSTCMD when reading panic info */
5703 uint8_t preserve_old_hostcmd_flag
;
5706 /*****************************************************************************/
5710 * These do not follow the normal rules for commands. See each command for
5717 * This command will work even when the EC LPC interface is busy, because the
5718 * reboot command is processed at interrupt level. Note that when the EC
5719 * reboots, the host will reboot too, so there is no response to this command.
5721 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
5723 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */
5726 * Resend last response (not supported on LPC).
5728 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
5729 * there was no previous command, or the previous command's response was too
5732 #define EC_CMD_RESEND_RESPONSE 0x00DB
5735 * This header byte on a command indicate version 0. Any header byte less
5736 * than this means that we are talking to an old EC which doesn't support
5737 * versioning. In that case, we assume version 0.
5739 * Header bytes greater than this indicate a later version. For example,
5740 * EC_CMD_VERSION0 + 1 means we are using version 1.
5742 * The old EC interface must not use commands 0xdc or higher.
5744 #define EC_CMD_VERSION0 0x00DC
5747 * Memory Dump Commands
5749 * Since the HOSTCMD response size is limited, depending on the
5750 * protocol, retrieving a memory dump is split into 3 commands.
5752 * 1. EC_CMD_MEMORY_DUMP_GET_METADATA returns the number of memory dump entries,
5753 * and the total dump size.
5754 * 2. EC_CMD_MEMORY_DUMP_GET_ENTRY_INFO returns the address and size for a given
5755 * memory dump entry index.
5756 * 3. EC_CMD_MEMORY_DUMP_READ_MEMORY returns the actual memory at a given
5757 * address. The address and size must be within the bounds of the given
5758 * memory dump entry index. Each response is limited to the max response size
5759 * of the host protocol, so this may need to be called repeatedly to retrieve
5760 * the entire memory dump entry.
5762 * Memory entries may overlap and may be out of order.
5763 * The host should check for overlaps to optimize transfer rate.
5765 #define EC_CMD_MEMORY_DUMP_GET_METADATA 0x00DD
5766 struct ec_response_memory_dump_get_metadata
{
5767 uint16_t memory_dump_entry_count
;
5768 uint32_t memory_dump_total_size
;
5771 #define EC_CMD_MEMORY_DUMP_GET_ENTRY_INFO 0x00DE
5772 struct ec_params_memory_dump_get_entry_info
{
5773 uint16_t memory_dump_entry_index
;
5776 struct ec_response_memory_dump_get_entry_info
{
5781 #define EC_CMD_MEMORY_DUMP_READ_MEMORY 0x00DF
5783 struct ec_params_memory_dump_read_memory
{
5784 uint16_t memory_dump_entry_index
;
5790 * EC_CMD_MEMORY_DUMP_READ_MEMORY response buffer is written directly into
5791 * host_cmd_handler_args.response and host_cmd_handler_args.response_size.
5794 /*****************************************************************************/
5798 * These commands are for PD MCU communication.
5801 /* EC to PD MCU exchange status command */
5802 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
5803 #define EC_VER_PD_EXCHANGE_STATUS 2
5805 enum pd_charge_state
{
5806 /* Don't change charge state */
5807 PD_CHARGE_NO_CHANGE
= 0,
5809 /* No charging allowed */
5812 /* 5V charging only */
5815 /* Charge at max voltage */
5819 /* Status of EC being sent to PD */
5820 #define EC_STATUS_HIBERNATING BIT(0)
5822 struct ec_params_pd_status
{
5826 /* battery state of charge */
5829 /* charging state (from enum pd_charge_state) */
5830 uint8_t charge_state
;
5833 /* Status of PD being sent back to EC */
5834 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */
5835 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */
5836 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
5837 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */
5838 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */
5839 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */
5840 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */
5841 #define PD_STATUS_EC_INT_ACTIVE \
5842 (PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_1 | PD_STATUS_HOST_EVENT)
5843 struct ec_response_pd_status
{
5844 /* input current limit */
5845 uint32_t curr_lim_ma
;
5850 /* active charging port */
5851 int8_t active_charge_port
;
5854 /* AP to PD MCU host event status command, cleared on read */
5855 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
5857 /* PD MCU host event status bits */
5858 #define PD_EVENT_UPDATE_DEVICE BIT(0)
5859 #define PD_EVENT_POWER_CHANGE BIT(1)
5860 #define PD_EVENT_IDENTITY_RECEIVED BIT(2)
5861 #define PD_EVENT_DATA_SWAP BIT(3)
5862 #define PD_EVENT_TYPEC BIT(4)
5863 #define PD_EVENT_PPM BIT(5)
5865 struct ec_response_host_event_status
{
5866 uint32_t status
; /* PD MCU host event status */
5870 * Set USB type-C port role and muxes
5872 * Deprecated in favor of TYPEC_STATUS and TYPEC_CONTROL commands.
5874 * TODO(b/169771803): TCPMv2: Remove EC_CMD_USB_PD_CONTROL
5876 #define EC_CMD_USB_PD_CONTROL 0x0101
5878 enum usb_pd_control_role
{
5879 USB_PD_CTRL_ROLE_NO_CHANGE
= 0,
5880 USB_PD_CTRL_ROLE_TOGGLE_ON
= 1, /* == AUTO */
5881 USB_PD_CTRL_ROLE_TOGGLE_OFF
= 2,
5882 USB_PD_CTRL_ROLE_FORCE_SINK
= 3,
5883 USB_PD_CTRL_ROLE_FORCE_SOURCE
= 4,
5884 USB_PD_CTRL_ROLE_FREEZE
= 5,
5885 USB_PD_CTRL_ROLE_COUNT
,
5888 enum usb_pd_control_mux
{
5889 USB_PD_CTRL_MUX_NO_CHANGE
= 0,
5890 USB_PD_CTRL_MUX_NONE
= 1,
5891 USB_PD_CTRL_MUX_USB
= 2,
5892 USB_PD_CTRL_MUX_DP
= 3,
5893 USB_PD_CTRL_MUX_DOCK
= 4,
5894 USB_PD_CTRL_MUX_AUTO
= 5,
5895 USB_PD_CTRL_MUX_COUNT
,
5898 enum usb_pd_control_swap
{
5899 USB_PD_CTRL_SWAP_NONE
= 0,
5900 USB_PD_CTRL_SWAP_DATA
= 1,
5901 USB_PD_CTRL_SWAP_POWER
= 2,
5902 USB_PD_CTRL_SWAP_VCONN
= 3,
5903 USB_PD_CTRL_SWAP_COUNT
,
5906 struct ec_params_usb_pd_control
{
5913 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */
5914 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */
5915 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
5917 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */
5918 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */
5919 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */
5920 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */
5921 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */
5922 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */
5923 /* Partner unconstrained power */
5924 #define PD_CTRL_RESP_ROLE_UNCONSTRAINED BIT(6)
5926 struct ec_response_usb_pd_control
{
5933 struct ec_response_usb_pd_control_v1
{
5940 /* Possible port partner connections based on CC line states */
5942 PD_CC_NONE
= 0, /* No port partner attached */
5944 /* From DFP perspective */
5945 PD_CC_UFP_NONE
= 1, /* No UFP accessory connected */
5946 PD_CC_UFP_AUDIO_ACC
= 2, /* UFP Audio accessory connected */
5947 PD_CC_UFP_DEBUG_ACC
= 3, /* UFP Debug accessory connected */
5948 PD_CC_UFP_ATTACHED
= 4, /* Plain UFP attached */
5950 /* From UFP perspective */
5951 PD_CC_DFP_ATTACHED
= 5, /* Plain DFP attached */
5952 PD_CC_DFP_DEBUG_ACC
= 6, /* DFP debug accessory connected */
5955 /* Active/Passive Cable */
5956 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
5957 /* Optical/Non-optical cable */
5958 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
5959 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
5960 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
5961 /* Active Link Uni-Direction */
5962 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
5963 /* Retimer/Redriver cable */
5964 #define USB_PD_CTRL_RETIMER_CABLE BIT(4)
5966 struct ec_response_usb_pd_control_v2
{
5971 uint8_t cc_state
; /* enum pd_cc_states representing cc state */
5972 uint8_t dp_mode
; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
5973 uint8_t reserved
; /* Reserved for future use */
5974 uint8_t control_flags
; /* USB_PD_CTRL_*flags */
5975 uint8_t cable_speed
; /* TBT_SS_* cable speed */
5976 uint8_t cable_gen
; /* TBT_GEN3_* cable rounded support */
5979 #define EC_CMD_USB_PD_PORTS 0x0102
5981 /* Maximum number of PD ports on a device, num_ports will be <= this */
5982 #define EC_USB_PD_MAX_PORTS 8
5984 struct ec_response_usb_pd_ports
{
5988 #define EC_CMD_USB_PD_POWER_INFO 0x0103
5990 #define PD_POWER_CHARGING_PORT 0xff
5991 struct ec_params_usb_pd_power_info
{
5999 USB_CHG_TYPE_PROPRIETARY
,
6000 USB_CHG_TYPE_BC12_DCP
,
6001 USB_CHG_TYPE_BC12_CDP
,
6002 USB_CHG_TYPE_BC12_SDP
,
6005 USB_CHG_TYPE_UNKNOWN
,
6006 USB_CHG_TYPE_DEDICATED
,
6008 enum usb_power_roles
{
6009 USB_PD_PORT_POWER_DISCONNECTED
,
6010 USB_PD_PORT_POWER_SOURCE
,
6011 USB_PD_PORT_POWER_SINK
,
6012 USB_PD_PORT_POWER_SINK_NOT_CHARGING
,
6015 struct usb_chg_measures
{
6016 uint16_t voltage_max
;
6017 uint16_t voltage_now
;
6018 uint16_t current_max
;
6019 uint16_t current_lim
;
6022 struct ec_response_usb_pd_power_info
{
6027 struct usb_chg_measures meas
;
6032 * This command will return the number of USB PD charge port + the number
6033 * of dedicated port present.
6034 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
6036 #define EC_CMD_CHARGE_PORT_COUNT 0x0105
6037 struct ec_response_charge_port_count
{
6042 * This command enable/disable dynamic PDO selection.
6044 #define EC_CMD_USB_PD_DPS_CONTROL 0x0106
6046 struct ec_params_usb_pd_dps_control
{
6050 /* Write USB-PD device FW */
6051 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
6053 enum usb_pd_fw_update_cmds
{
6055 USB_PD_FW_FLASH_ERASE
,
6056 USB_PD_FW_FLASH_WRITE
,
6057 USB_PD_FW_ERASE_SIG
,
6060 struct ec_params_usb_pd_fw_update
{
6065 /* Size to write in bytes */
6068 /* Followed by data to write */
6071 /* Write USB-PD Accessory RW_HASH table entry */
6072 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
6073 /* RW hash is first 20 bytes of SHA-256 of RW section */
6074 #define PD_RW_HASH_SIZE 20
6075 struct ec_params_usb_pd_rw_hash_entry
{
6077 uint8_t dev_rw_hash
[PD_RW_HASH_SIZE
];
6080 * Reserved for alignment of current_image
6081 * TODO(rspangler) but it's not aligned!
6082 * Should have been reserved[2].
6086 /* One of ec_image */
6087 uint32_t current_image
;
6090 /* Read USB-PD Accessory info */
6091 #define EC_CMD_USB_PD_DEV_INFO 0x0112
6093 struct ec_params_usb_pd_info_request
{
6097 /* Read USB-PD Device discovery info */
6098 #define EC_CMD_USB_PD_DISCOVERY 0x0113
6099 struct ec_params_usb_pd_discovery_entry
{
6100 uint16_t vid
; /* USB-IF VID */
6101 uint16_t pid
; /* USB-IF PID */
6102 uint8_t ptype
; /* product type (hub,periph,cable,ama) */
6105 /* Override default charge behavior */
6106 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
6108 /* Negative port parameters have special meaning */
6109 enum usb_pd_override_ports
{
6111 * DONT_CHARGE is for all ports. Thus it's persistent across plug-in
6114 OVERRIDE_DONT_CHARGE
= -2,
6116 /* [0, CONFIG_USB_PD_PORT_MAX_COUNT): Port# */
6119 struct ec_params_charge_port_override
{
6120 int16_t override_port
; /* Override port# */
6124 * Read (and delete) one entry of PD event log.
6125 * TODO(crbug.com/751742): Make this host command more generic to accommodate
6126 * future non-PD logs that use the same internal EC event_log.
6128 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
6130 struct ec_response_pd_log
{
6131 uint32_t timestamp
; /* relative timestamp in milliseconds */
6132 uint8_t type
; /* event type : see PD_EVENT_xx below */
6133 uint8_t size_port
; /* [7:5] port number [4:0] payload size in bytes */
6134 uint16_t data
; /* type-defined data payload */
6135 uint8_t payload
[0]; /* optional additional data payload: 0..16 bytes */
6138 /* The timestamp is the microsecond counter shifted to get about a ms. */
6139 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
6141 #define PD_LOG_SIZE_MASK 0x1f
6142 #define PD_LOG_PORT_MASK 0xe0
6143 #define PD_LOG_PORT_SHIFT 5
6144 #define PD_LOG_PORT_SIZE(port, size) \
6145 (((port) << PD_LOG_PORT_SHIFT) | ((size) & PD_LOG_SIZE_MASK))
6146 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
6147 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
6149 /* PD event log : entry types */
6151 #define PD_EVENT_MCU_BASE 0x00
6152 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE + 0)
6153 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE + 1)
6154 /* Reserved for custom board event */
6155 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE + 2)
6156 /* PD generic accessory events */
6157 #define PD_EVENT_ACC_BASE 0x20
6158 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE + 0)
6159 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE + 1)
6160 /* PD power supply events */
6161 #define PD_EVENT_PS_BASE 0x40
6162 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE + 0)
6163 /* PD video dongles events */
6164 #define PD_EVENT_VIDEO_BASE 0x60
6165 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE + 0)
6166 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE + 1)
6167 /* Returned in the "type" field, when there is no entry available */
6168 #define PD_EVENT_NO_ENTRY 0xff
6171 * PD_EVENT_MCU_CHARGE event definition :
6172 * the payload is "struct usb_chg_measures"
6173 * the data field contains the port state flags as defined below :
6175 /* Port partner is a dual role device */
6176 #define CHARGE_FLAGS_DUAL_ROLE BIT(15)
6177 /* Port is the pending override port */
6178 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
6179 /* Port is the override port */
6180 #define CHARGE_FLAGS_OVERRIDE BIT(13)
6182 #define CHARGE_FLAGS_TYPE_SHIFT 3
6183 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
6184 /* Power delivery role */
6185 #define CHARGE_FLAGS_ROLE_MASK (7 << 0)
6188 * PD_EVENT_PS_FAULT data field flags definition :
6190 #define PS_FAULT_OCP 1
6191 #define PS_FAULT_FAST_OCP 2
6192 #define PS_FAULT_OVP 3
6193 #define PS_FAULT_DISCH 4
6196 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
6198 struct mcdp_version
{
6207 struct mcdp_version irom
;
6208 struct mcdp_version fw
;
6211 /* struct mcdp_info field decoding */
6212 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
6213 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
6215 /* Get/Set USB-PD Alternate mode info */
6216 #define EC_CMD_USB_PD_GET_AMODE 0x0116
6217 struct ec_params_usb_pd_get_mode_request
{
6218 uint16_t svid_idx
; /* SVID index to get */
6219 uint8_t port
; /* port */
6222 #define VDO_MAX_SIZE 7
6223 /* Max number of VDM data objects without VDM header */
6224 #define VDO_MAX_OBJECTS (VDO_MAX_SIZE - 1)
6226 struct ec_params_usb_pd_get_mode_response
{
6227 uint16_t svid
; /* SVID */
6228 uint16_t opos
; /* Object Position */
6229 uint32_t vdo
[VDO_MAX_OBJECTS
]; /* Mode VDOs */
6232 #define EC_CMD_USB_PD_SET_AMODE 0x0117
6237 /* Not a command. Do NOT remove. */
6241 struct ec_params_usb_pd_set_mode_request
{
6242 uint32_t cmd
; /* enum pd_mode_cmd */
6243 uint16_t svid
; /* SVID to set */
6244 uint8_t opos
; /* Object Position */
6245 uint8_t port
; /* port */
6248 /* Ask the PD MCU to record a log of a requested type */
6249 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
6251 struct ec_params_pd_write_log_entry
{
6252 uint8_t type
; /* event type : see PD_EVENT_xx above */
6253 uint8_t port
; /* port#, or 0 for events unrelated to a given port */
6256 /* Control USB-PD chip */
6257 #define EC_CMD_PD_CONTROL 0x0119
6259 enum ec_pd_control_cmd
{
6260 PD_SUSPEND
= 0, /* Suspend the PD chip (EC: stop talking to PD) */
6261 PD_RESUME
, /* Resume the PD chip (EC: start talking to PD) */
6262 PD_RESET
, /* Force reset the PD chip */
6263 PD_CONTROL_DISABLE
, /* Disable further calls to this command */
6264 PD_CHIP_ON
, /* Power on the PD chip */
6267 struct ec_params_pd_control
{
6268 uint8_t chip
; /* chip id */
6272 /* Get info about USB-C SS muxes */
6273 #define EC_CMD_USB_PD_MUX_INFO 0x011A
6275 struct ec_params_usb_pd_mux_info
{
6276 uint8_t port
; /* USB-C port number */
6279 /* Flags representing mux state */
6280 #define USB_PD_MUX_NONE 0 /* Open switch */
6281 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
6282 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
6283 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
6284 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
6285 #define USB_PD_MUX_HPD_IRQ_DEASSERTED 0 /* HPD IRQ is deasserted */
6286 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
6287 #define USB_PD_MUX_HPD_LVL_DEASSERTED 0 /* HPD level is deasserted */
6288 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
6289 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
6290 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
6292 /* USB-C Dock connected */
6293 #define USB_PD_MUX_DOCK (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED)
6295 struct ec_response_usb_pd_mux_info
{
6296 uint8_t flags
; /* USB_PD_MUX_*-encoded USB mux state */
6299 #define EC_CMD_PD_CHIP_INFO 0x011B
6301 struct ec_params_pd_chip_info
{
6302 uint8_t port
; /* USB-C port number */
6304 * Fetch the live chip info or hard-coded + cached chip info
6305 * 0: hardcoded value for VID/PID, cached value for FW version
6306 * 1: live chip value for VID/PID/FW Version
6311 struct ec_response_pd_chip_info
{
6313 uint16_t product_id
;
6316 uint8_t fw_version_string
[8];
6317 uint64_t fw_version_number
;
6321 struct ec_response_pd_chip_info_v1
{
6323 uint16_t product_id
;
6326 uint8_t fw_version_string
[8];
6327 uint64_t fw_version_number
;
6330 uint8_t min_req_fw_version_string
[8];
6331 uint64_t min_req_fw_version_number
;
6335 /** Indicates the chip should NOT receive a firmware update, if set. This is
6336 * useful when multiple ports are serviced by a single chip, to avoid
6337 * performing redundant updates. The host command implementation shall ensure
6338 * only one port out of each physical chip has FW updates active.
6340 #define USB_PD_CHIP_INFO_FWUP_FLAG_NO_UPDATE BIT(0)
6342 /** Maximum length of a project name embedded in a PDC FW image. This length
6343 * does NOT include a NUL-terminator.
6345 #define USB_PD_CHIP_INFO_PROJECT_NAME_LEN 12
6346 struct ec_response_pd_chip_info_v2
{
6348 uint16_t product_id
;
6351 uint8_t fw_version_string
[8];
6352 uint64_t fw_version_number
;
6355 uint8_t min_req_fw_version_string
[8];
6356 uint64_t min_req_fw_version_number
;
6358 /** Flag to control the FW update process for this chip. */
6359 uint16_t fw_update_flags
;
6360 /** Project name string associated with the chip's FW. Add an extra
6361 * byte for a NUL-terminator.
6363 char fw_name_str
[USB_PD_CHIP_INFO_PROJECT_NAME_LEN
+ 1];
6366 /* Run RW signature verification and get status */
6367 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C
6369 struct ec_response_rwsig_check_status
{
6373 /* For controlling RWSIG task */
6374 #define EC_CMD_RWSIG_ACTION 0x011D
6377 RWSIG_ACTION_ABORT
= 0, /* Abort RWSIG and prevent jumping */
6378 RWSIG_ACTION_CONTINUE
= 1, /* Jump to RW immediately */
6381 struct ec_params_rwsig_action
{
6385 /* Run verification on a slot */
6386 #define EC_CMD_EFS_VERIFY 0x011E
6388 struct ec_params_efs_verify
{
6389 uint8_t region
; /* enum ec_flash_region */
6393 * Retrieve info from Cros Board Info store. Response is based on the data
6394 * type. Integers return a uint32. Strings return a string, using the response
6395 * size to determine how big it is.
6397 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F
6399 * Write info into Cros Board Info on EEPROM. Write fails if the board has
6400 * hardware write-protect enabled.
6402 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120
6405 CBI_TAG_BOARD_VERSION
= 0, /* uint32_t or smaller */
6406 CBI_TAG_OEM_ID
= 1, /* uint32_t or smaller */
6407 CBI_TAG_SKU_ID
= 2, /* uint32_t or smaller */
6408 CBI_TAG_DRAM_PART_NUM
= 3, /* variable length ascii, nul terminated. */
6409 CBI_TAG_OEM_NAME
= 4, /* variable length ascii, nul terminated. */
6410 CBI_TAG_MODEL_ID
= 5, /* uint32_t or smaller */
6411 CBI_TAG_FW_CONFIG
= 6, /* uint32_t bit field */
6412 CBI_TAG_PCB_SUPPLIER
= 7, /* uint32_t or smaller */
6413 /* Second Source Factory Cache */
6414 CBI_TAG_SSFC
= 8, /* uint32_t bit field */
6415 CBI_TAG_REWORK_ID
= 9, /* uint64_t or smaller */
6416 CBI_TAG_FACTORY_CALIBRATION_DATA
= 10, /* uint32_t bit field */
6419 * A uint32_t field reserved for controlling common features at runtime.
6420 * It shouldn't be used at board-level. See union ec_common_control for
6421 * the bit definitions.
6423 CBI_TAG_COMMON_CONTROL
= 11,
6425 /* struct board_batt_params */
6426 CBI_TAG_BATTERY_CONFIG
= 12,
6427 /* CBI_TAG_BATTERY_CONFIG_1 ~ 15 will use 13 ~ 27. */
6428 CBI_TAG_BATTERY_CONFIG_15
= 27,
6434 union ec_common_control
{
6436 uint32_t ucsi_enabled
: 1;
6442 * Flags to control read operation
6444 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify
6445 * write was successful without reboot.
6447 #define CBI_GET_RELOAD BIT(0)
6449 struct ec_params_get_cbi
{
6450 uint32_t tag
; /* enum cbi_data_tag */
6451 uint32_t flag
; /* CBI_GET_* */
6455 * Flags to control write behavior.
6457 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
6458 * useful when writing multiple fields in a row.
6459 * INIT: Need to be set when creating a new CBI from scratch. All fields
6460 * will be initialized to zero first.
6462 #define CBI_SET_NO_SYNC BIT(0)
6463 #define CBI_SET_INIT BIT(1)
6465 struct ec_params_set_cbi
{
6466 uint32_t tag
; /* enum cbi_data_tag */
6467 uint32_t flag
; /* CBI_SET_* */
6468 uint32_t size
; /* Data size */
6469 uint8_t data
[]; /* For string and raw data */
6473 * Retrieve binary from CrOS Board Info primary memory source.
6475 #define EC_CMD_CBI_BIN_READ 0x0504
6477 * Write binary into CrOS Board Info temporary buffer and then commit it to
6478 * permanent storage once complete. Write fails if the board has hardware
6479 * write-protect enabled.
6481 #define EC_CMD_CBI_BIN_WRITE 0x0505
6484 * CBI binary read/write flags
6485 * The default write behavior is to always append any data to the buffer.
6486 * If 'CLEAR' flag is set, buffer is cleared then data is appended.
6487 * If 'WRITE' flag is set, data is appended then buffer is written to memory.
6489 #define EC_CBI_BIN_BUFFER_CLEAR BIT(0)
6490 #define EC_CBI_BIN_BUFFER_WRITE BIT(1)
6492 struct ec_params_get_cbi_bin
{
6493 uint32_t offset
; /* Data offset */
6494 uint32_t size
; /* Data size */
6497 struct ec_params_set_cbi_bin
{
6498 uint32_t offset
; /* Data offset */
6499 uint32_t size
; /* Data size */
6500 uint8_t flags
; /* bit field for EC_CBI_BIN_COMMIT_FLAG_* */
6501 uint8_t data
[]; /* For string and raw data */
6505 * Information about resets of the AP by the EC and the EC's own uptime.
6507 #define EC_CMD_GET_UPTIME_INFO 0x0121
6509 /* EC reset causes */
6510 #define EC_RESET_FLAG_OTHER BIT(0) /* Other known reason */
6511 #define EC_RESET_FLAG_RESET_PIN BIT(1) /* Reset pin asserted */
6512 #define EC_RESET_FLAG_BROWNOUT BIT(2) /* Brownout */
6513 #define EC_RESET_FLAG_POWER_ON BIT(3) /* Power-on reset */
6514 #define EC_RESET_FLAG_WATCHDOG BIT(4) /* Watchdog timer reset */
6515 #define EC_RESET_FLAG_SOFT BIT(5) /* Soft reset trigger by core */
6516 #define EC_RESET_FLAG_HIBERNATE BIT(6) /* Wake from hibernate */
6517 #define EC_RESET_FLAG_RTC_ALARM BIT(7) /* RTC alarm wake */
6518 #define EC_RESET_FLAG_WAKE_PIN BIT(8) /* Wake pin triggered wake */
6519 #define EC_RESET_FLAG_LOW_BATTERY BIT(9) /* Low battery triggered wake */
6520 #define EC_RESET_FLAG_SYSJUMP BIT(10) /* Jumped directly to this image */
6521 #define EC_RESET_FLAG_HARD BIT(11) /* Hard reset from software */
6522 #define EC_RESET_FLAG_AP_OFF BIT(12) /* Do not power on AP */
6523 /* Some reset flags preserved from previous boot */
6524 #define EC_RESET_FLAG_PRESERVED BIT(13)
6525 #define EC_RESET_FLAG_USB_RESUME BIT(14) /* USB resume triggered wake */
6526 #define EC_RESET_FLAG_RDD BIT(15) /* USB Type-C debug cable */
6527 #define EC_RESET_FLAG_RBOX BIT(16) /* Fixed Reset Functionality */
6528 #define EC_RESET_FLAG_SECURITY BIT(17) /* Security threat */
6529 /* AP experienced a watchdog reset */
6530 #define EC_RESET_FLAG_AP_WATCHDOG BIT(18)
6531 /* Do not select RW in EFS. This enables PD in RO for Chromebox. */
6532 #define EC_RESET_FLAG_STAY_IN_RO BIT(19)
6533 #define EC_RESET_FLAG_EFS BIT(20) /* Jumped to this image by EFS */
6534 #define EC_RESET_FLAG_AP_IDLE BIT(21) /* Leave alone AP */
6535 #define EC_RESET_FLAG_INITIAL_PWR BIT(22) /* EC had power, then was reset */
6538 * Reason codes used by the AP after a shutdown to figure out why it was reset
6539 * by the EC. These are sent in EC commands. Therefore, to maintain protocol
6541 * - New entries must be inserted prior to the _COUNT field
6542 * - If an existing entry is no longer in service, it must be replaced with a
6543 * RESERVED entry instead.
6544 * - The semantic meaning of an entry should not change.
6545 * - Do not exceed 2^15 - 1 for reset reasons or 2^16 - 1 for shutdown reasons.
6547 enum chipset_shutdown_reason
{
6549 * Beginning of reset reasons.
6551 CHIPSET_RESET_BEGIN
= 0,
6552 CHIPSET_RESET_UNKNOWN
= CHIPSET_RESET_BEGIN
,
6553 /* Custom reason defined by a board.c or baseboard.c file */
6554 CHIPSET_RESET_BOARD_CUSTOM
,
6555 /* Believe that the AP has hung */
6556 CHIPSET_RESET_HANG_REBOOT
,
6557 /* Reset by EC console command */
6558 CHIPSET_RESET_CONSOLE_CMD
,
6559 /* Reset by EC host command */
6560 CHIPSET_RESET_HOST_CMD
,
6561 /* Keyboard module reset key combination */
6562 CHIPSET_RESET_KB_SYSRESET
,
6563 /* Keyboard module warm reboot */
6564 CHIPSET_RESET_KB_WARM_REBOOT
,
6565 /* Debug module warm reboot */
6566 CHIPSET_RESET_DBG_WARM_REBOOT
,
6567 /* I cannot self-terminate. You must lower me into the steel. */
6568 CHIPSET_RESET_AP_REQ
,
6569 /* Reset as side-effect of startup sequence */
6571 /* EC detected an AP watchdog event. */
6572 CHIPSET_RESET_AP_WATCHDOG
,
6574 CHIPSET_RESET_COUNT
, /* End of reset reasons. */
6577 * Beginning of shutdown reasons.
6579 CHIPSET_SHUTDOWN_BEGIN
= BIT(15),
6580 CHIPSET_SHUTDOWN_POWERFAIL
= CHIPSET_SHUTDOWN_BEGIN
,
6581 /* Forcing a shutdown as part of EC initialization */
6582 CHIPSET_SHUTDOWN_INIT
,
6583 /* Custom reason on a per-board basis. */
6584 CHIPSET_SHUTDOWN_BOARD_CUSTOM
,
6585 /* This is a reason to inhibit startup, not cause shut down. */
6586 CHIPSET_SHUTDOWN_BATTERY_INHIBIT
,
6587 /* A power_wait_signal is being asserted */
6588 CHIPSET_SHUTDOWN_WAIT
,
6589 /* Critical battery level. */
6590 CHIPSET_SHUTDOWN_BATTERY_CRIT
,
6591 /* Because you told me to. */
6592 CHIPSET_SHUTDOWN_CONSOLE_CMD
,
6593 /* Forcing a shutdown to effect entry to G3. */
6594 CHIPSET_SHUTDOWN_G3
,
6595 /* Force shutdown due to over-temperature. */
6596 CHIPSET_SHUTDOWN_THERMAL
,
6597 /* Force a chipset shutdown from the power button through EC */
6598 CHIPSET_SHUTDOWN_BUTTON
,
6600 CHIPSET_SHUTDOWN_COUNT
, /* End of shutdown reasons. */
6603 struct ec_response_uptime_info
{
6605 * Number of milliseconds since the last EC boot. Sysjump resets
6606 * typically do not restart the EC's time_since_boot epoch.
6608 * WARNING: The EC's sense of time is much less accurate than the AP's
6609 * sense of time, in both phase and frequency. This timebase is similar
6610 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
6612 uint32_t time_since_ec_boot_ms
;
6615 * Number of times the AP was reset by the EC since the last EC boot.
6616 * Note that the AP may be held in reset by the EC during the initial
6617 * boot sequence, such that the very first AP boot may count as more
6620 uint32_t ap_resets_since_ec_boot
;
6623 * The set of flags which describe the EC's most recent reset.
6624 * See EC_RESET_FLAG_* for details.
6626 uint32_t ec_reset_flags
;
6628 /* Empty log entries have both the cause and timestamp set to zero. */
6629 struct ap_reset_log_entry
{
6630 /* See enum chipset_{reset,shutdown}_reason for details. */
6631 uint16_t reset_cause
;
6633 /* Reserved for protocol growth. */
6637 * The time of the reset's assertion, in milliseconds since the
6638 * last EC boot, in the same epoch as time_since_ec_boot_ms.
6639 * Set to zero if the log entry is empty.
6641 uint32_t reset_time_ms
;
6642 } recent_ap_reset
[4];
6646 * Add entropy to the device secret (stored in the rollback region).
6648 * Depending on the chip, the operation may take a long time (e.g. to erase
6649 * flash), so the commands are asynchronous.
6651 #define EC_CMD_ADD_ENTROPY 0x0122
6653 enum add_entropy_action
{
6654 /* Add entropy to the current secret. */
6655 ADD_ENTROPY_ASYNC
= 0,
6657 * Add entropy, and also make sure that the previous secret is erased.
6658 * (this can be implemented by adding entropy multiple times until
6659 * all rolback blocks have been overwritten).
6661 ADD_ENTROPY_RESET_ASYNC
= 1,
6662 /* Read back result from the previous operation. */
6663 ADD_ENTROPY_GET_RESULT
= 2,
6666 struct ec_params_rollback_add_entropy
{
6671 * Perform a single read of a given ADC channel.
6673 #define EC_CMD_ADC_READ 0x0123
6675 struct ec_params_adc_read
{
6676 uint8_t adc_channel
;
6679 struct ec_response_adc_read
{
6684 * Read back rollback info
6686 #define EC_CMD_ROLLBACK_INFO 0x0124
6688 struct ec_response_rollback_info
{
6689 int32_t id
; /* Incrementing number to indicate which region to use. */
6690 int32_t rollback_min_version
;
6691 int32_t rw_rollback_version
;
6694 /* Issue AP reset */
6695 #define EC_CMD_AP_RESET 0x0125
6697 /*****************************************************************************/
6698 /* Locate peripheral chips
6701 * EC_RES_UNAVAILABLE: The chip type is supported but not found on system.
6702 * EC_RES_INVALID_PARAM: The chip type was unrecognized.
6703 * EC_RES_OVERFLOW: The index number exceeded the number of chip instances.
6705 #define EC_CMD_LOCATE_CHIP 0x0126
6708 EC_CHIP_TYPE_CBI_EEPROM
= 0,
6709 EC_CHIP_TYPE_TCPC
= 1,
6710 EC_CHIP_TYPE_PDC
= 2,
6712 EC_CHIP_TYPE_MAX
= 0xFF,
6716 EC_BUS_TYPE_I2C
= 0,
6717 EC_BUS_TYPE_EMBEDDED
= 1,
6719 EC_BUS_TYPE_MAX
= 0xFF,
6722 struct ec_i2c_info
{
6723 uint16_t port
; /* Physical port for device */
6724 uint16_t addr_flags
; /* 7-bit (or 10-bit) address */
6727 struct ec_params_locate_chip
{
6728 uint8_t type
; /* enum ec_chip_type */
6729 uint8_t index
; /* Specifies one instance of chip type */
6730 /* Used for type specific parameters in future */
6736 struct ec_response_locate_chip
{
6737 uint8_t bus_type
; /* enum ec_bus_type */
6738 uint8_t reserved
; /* Aligning the following union to 2 bytes */
6740 struct ec_i2c_info i2c_info
;
6747 * This command is used for validation purpose, where the AP needs to be
6748 * returned back to S0 state from G3 state without using the servo to trigger
6750 * - With command version 0:
6751 * AP reboots immediately from G3
6752 * command usage: ectool reboot_ap_on_g3 && shutdown -h now
6753 * - With command version 1:
6754 * AP reboots after the user specified delay
6755 * command usage: ectool reboot_ap_on_g3 [<delay>] && shutdown -h now
6757 #define EC_CMD_REBOOT_AP_ON_G3 0x0127
6759 struct ec_params_reboot_ap_on_g3_v1
{
6760 /* configurable delay in seconds in G3 state */
6761 uint32_t reboot_ap_at_g3_delay
;
6764 /*****************************************************************************/
6765 /* Get PD port capabilities
6767 * Returns the following static *capabilities* of the given port:
6768 * 1) Power role: source, sink, or dual. It is not anticipated that
6769 * future CrOS devices would ever be only a source, so the options are
6771 * 2) Try-power role: source, sink, or none (practically speaking, I don't
6772 * believe any CrOS device would support Try.SNK, so this would be source
6774 * 3) Data role: dfp, ufp, or dual. This will probably only be DFP or dual
6777 #define EC_CMD_GET_PD_PORT_CAPS 0x0128
6779 enum ec_pd_power_role_caps
{
6780 EC_PD_POWER_ROLE_SOURCE
= 0,
6781 EC_PD_POWER_ROLE_SINK
= 1,
6782 EC_PD_POWER_ROLE_DUAL
= 2,
6785 enum ec_pd_try_power_role_caps
{
6786 EC_PD_TRY_POWER_ROLE_NONE
= 0,
6787 EC_PD_TRY_POWER_ROLE_SINK
= 1,
6788 EC_PD_TRY_POWER_ROLE_SOURCE
= 2,
6791 enum ec_pd_data_role_caps
{
6792 EC_PD_DATA_ROLE_DFP
= 0,
6793 EC_PD_DATA_ROLE_UFP
= 1,
6794 EC_PD_DATA_ROLE_DUAL
= 2,
6797 /* From: power_manager/power_supply_properties.proto */
6798 enum ec_pd_port_location
{
6799 /* The location of the port is unknown, or there's only one port. */
6800 EC_PD_PORT_LOCATION_UNKNOWN
= 0,
6803 * Various positions on the device. The first word describes the side of
6804 * the device where the port is located while the second clarifies the
6805 * position. For example, LEFT_BACK means the farthest-back port on the
6806 * left side, while BACK_LEFT means the leftmost port on the back of the
6809 EC_PD_PORT_LOCATION_LEFT
= 1,
6810 EC_PD_PORT_LOCATION_RIGHT
= 2,
6811 EC_PD_PORT_LOCATION_BACK
= 3,
6812 EC_PD_PORT_LOCATION_FRONT
= 4,
6813 EC_PD_PORT_LOCATION_LEFT_FRONT
= 5,
6814 EC_PD_PORT_LOCATION_LEFT_BACK
= 6,
6815 EC_PD_PORT_LOCATION_RIGHT_FRONT
= 7,
6816 EC_PD_PORT_LOCATION_RIGHT_BACK
= 8,
6817 EC_PD_PORT_LOCATION_BACK_LEFT
= 9,
6818 EC_PD_PORT_LOCATION_BACK_RIGHT
= 10,
6821 struct ec_params_get_pd_port_caps
{
6822 uint8_t port
; /* Which port to interrogate */
6825 struct ec_response_get_pd_port_caps
{
6826 uint8_t pd_power_role_cap
; /* enum ec_pd_power_role_caps */
6827 uint8_t pd_try_power_role_cap
; /* enum ec_pd_try_power_role_caps */
6828 uint8_t pd_data_role_cap
; /* enum ec_pd_data_role_caps */
6829 uint8_t pd_port_location
; /* enum ec_pd_port_location */
6832 /*****************************************************************************/
6834 * Button press simulation
6836 * This command is used to simulate a button press.
6837 * Supported commands are vup(volume up) vdown(volume down) & rec(recovery)
6838 * Time duration for which button needs to be pressed is an optional parameter.
6840 * NOTE: This is only available on unlocked devices for testing purposes only.
6842 #define EC_CMD_BUTTON 0x0129
6844 struct ec_params_button
{
6845 /* Button mask aligned to enum keyboard_button_type */
6848 /* Duration in milliseconds button needs to be pressed */
6852 enum keyboard_button_type
{
6853 KEYBOARD_BUTTON_POWER
= 0,
6854 KEYBOARD_BUTTON_VOLUME_DOWN
= 1,
6855 KEYBOARD_BUTTON_VOLUME_UP
= 2,
6856 KEYBOARD_BUTTON_RECOVERY
= 3,
6857 KEYBOARD_BUTTON_CAPSENSE_1
= 4,
6858 KEYBOARD_BUTTON_CAPSENSE_2
= 5,
6859 KEYBOARD_BUTTON_CAPSENSE_3
= 6,
6860 KEYBOARD_BUTTON_CAPSENSE_4
= 7,
6861 KEYBOARD_BUTTON_CAPSENSE_5
= 8,
6862 KEYBOARD_BUTTON_CAPSENSE_6
= 9,
6863 KEYBOARD_BUTTON_CAPSENSE_7
= 10,
6864 KEYBOARD_BUTTON_CAPSENSE_8
= 11,
6866 KEYBOARD_BUTTON_COUNT
,
6869 /*****************************************************************************/
6871 * "Get the Keyboard Config". An EC implementing this command is expected to be
6872 * vivaldi capable, i.e. can send action codes for the top row keys.
6873 * Additionally, capability to send function codes for the same keys is
6874 * optional and acceptable.
6876 * Note: If the top row can generate both function and action codes by
6877 * using a dedicated Fn key, it does not matter whether the key sends
6878 * "function" or "action" codes by default. In both cases, the response
6879 * for this command will look the same.
6881 #define EC_CMD_GET_KEYBD_CONFIG 0x012A
6883 /* Possible values for the top row keys */
6891 TK_BRIGHTNESS_DOWN
= 6,
6892 TK_BRIGHTNESS_UP
= 7,
6897 TK_PRIVACY_SCRN_TOGGLE
= 12,
6898 TK_KBD_BKLIGHT_DOWN
= 13,
6899 TK_KBD_BKLIGHT_UP
= 14,
6903 TK_KBD_BKLIGHT_TOGGLE
= 18,
6907 TK_ACCESSIBILITY
= 22,
6908 TK_DONOTDISTURB
= 23,
6914 * Max & Min number of top row keys, excluding Esc and Screenlock keys.
6915 * If this needs to change, please create a new version of the command.
6917 #define MAX_TOP_ROW_KEYS 15
6918 #define MIN_TOP_ROW_KEYS 10
6921 * Is the keyboard capable of sending function keys *in addition to*
6922 * action keys. This is possible for e.g. if the keyboard has a
6925 #define KEYBD_CAP_FUNCTION_KEYS BIT(0)
6927 * Whether the keyboard has a dedicated numeric keyboard.
6929 #define KEYBD_CAP_NUMERIC_KEYPAD BIT(1)
6931 * Whether the keyboard has a screenlock key.
6933 #define KEYBD_CAP_SCRNLOCK_KEY BIT(2)
6936 * Whether the keyboard has an assistant key.
6938 #define KEYBD_CAP_ASSISTANT_KEY BIT(3)
6940 struct ec_response_keybd_config
{
6942 * Number of top row keys, excluding Esc and Screenlock.
6943 * If this is 0, all Vivaldi keyboard code is disabled.
6944 * (i.e. does not expose any tables to the kernel).
6946 uint8_t num_top_row_keys
;
6949 * The action keys in the top row, in order from left to right.
6950 * The values are filled from enum action_key. Esc and Screenlock
6951 * keys are not considered part of top row keys.
6953 uint8_t action_keys
[MAX_TOP_ROW_KEYS
];
6955 /* Capability flags */
6956 uint8_t capabilities
;
6961 * Configure smart discharge
6963 #define EC_CMD_SMART_DISCHARGE 0x012B
6965 #define EC_SMART_DISCHARGE_FLAGS_SET BIT(0)
6967 /* Discharge rates when the system is in cutoff or hibernation. */
6968 struct discharge_rate
{
6969 uint16_t cutoff
; /* Discharge rate (uA) in cutoff */
6970 uint16_t hibern
; /* Discharge rate (uA) in hibernation */
6973 struct smart_discharge_zone
{
6974 /* When the capacity (mAh) goes below this, EC cuts off the battery. */
6976 /* When the capacity (mAh) is below this, EC stays up. */
6980 struct ec_params_smart_discharge
{
6981 uint8_t flags
; /* EC_SMART_DISCHARGE_FLAGS_* */
6983 * Desired hours for the battery to survive before reaching 0%. Set to
6984 * zero to disable smart discharging. That is, the system hibernates as
6985 * soon as the G3 idle timer expires.
6987 uint16_t hours_to_zero
;
6988 /* Set both to zero to keep the current rates. */
6989 struct discharge_rate drate
;
6992 struct ec_response_smart_discharge
{
6993 uint16_t hours_to_zero
;
6994 struct discharge_rate drate
;
6995 struct smart_discharge_zone dzone
;
6998 /*****************************************************************************/
6999 /* Voltage regulator controls */
7002 * Get basic info of voltage regulator for given index.
7004 * Returns the regulator name and supported voltage list in mV.
7006 #define EC_CMD_REGULATOR_GET_INFO 0x012C
7008 /* Maximum length of regulator name */
7009 #define EC_REGULATOR_NAME_MAX_LEN 16
7011 /* Maximum length of the supported voltage list. */
7012 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
7014 struct ec_params_regulator_get_info
{
7018 struct ec_response_regulator_get_info
{
7019 char name
[EC_REGULATOR_NAME_MAX_LEN
];
7020 uint16_t num_voltages
;
7021 uint16_t voltages_mv
[EC_REGULATOR_VOLTAGE_MAX_COUNT
];
7025 * Configure the regulator as enabled / disabled.
7027 #define EC_CMD_REGULATOR_ENABLE 0x012D
7029 struct ec_params_regulator_enable
{
7035 * Query if the regulator is enabled.
7037 * Returns 1 if the regulator is enabled, 0 if not.
7039 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
7041 struct ec_params_regulator_is_enabled
{
7045 struct ec_response_regulator_is_enabled
{
7050 * Set voltage for the voltage regulator within the range specified.
7052 * The driver should select the voltage in range closest to min_mv.
7054 * Also note that this might be called before the regulator is enabled, and the
7055 * setting should be in effect after the regulator is enabled.
7057 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
7059 struct ec_params_regulator_set_voltage
{
7066 * Get the currently configured voltage for the voltage regulator.
7068 * Note that this might be called before the regulator is enabled, and this
7069 * should return the configured output voltage if the regulator is enabled.
7071 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
7073 struct ec_params_regulator_get_voltage
{
7077 struct ec_response_regulator_get_voltage
{
7078 uint32_t voltage_mv
;
7082 * Gather all discovery information for the given port and partner type.
7084 * Note that if discovery has not yet completed, only the currently completed
7085 * responses will be filled in. If the discovery data structures are changed
7086 * in the process of the command running, BUSY will be returned.
7088 * VDO field sizes are set to the maximum possible number of VDOs a VDM may
7089 * contain, while the number of SVIDs here is selected to fit within the PROTO2
7090 * maximum parameter size.
7092 #define EC_CMD_TYPEC_DISCOVERY 0x0131
7094 enum typec_partner_type
{
7095 TYPEC_PARTNER_SOP
= 0,
7096 TYPEC_PARTNER_SOP_PRIME
= 1,
7097 TYPEC_PARTNER_SOP_PRIME_PRIME
= 2,
7100 struct ec_params_typec_discovery
{
7102 uint8_t partner_type
; /* enum typec_partner_type */
7105 struct svid_mode_info
{
7107 uint16_t mode_count
; /* Number of modes partner sent */
7108 uint32_t mode_vdo
[VDO_MAX_OBJECTS
];
7111 struct ec_response_typec_discovery
{
7112 uint8_t identity_count
; /* Number of identity VDOs partner sent */
7113 uint8_t svid_count
; /* Number of SVIDs partner sent */
7115 uint32_t discovery_vdo
[VDO_MAX_OBJECTS
];
7116 struct svid_mode_info svids
[0];
7119 /* USB Type-C commands for AP-controlled device policy. */
7120 #define EC_CMD_TYPEC_CONTROL 0x0132
7122 enum typec_control_command
{
7123 TYPEC_CONTROL_COMMAND_EXIT_MODES
,
7124 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS
,
7125 TYPEC_CONTROL_COMMAND_ENTER_MODE
,
7126 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY
,
7127 TYPEC_CONTROL_COMMAND_USB_MUX_SET
,
7128 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE
,
7129 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ
,
7132 /* Modes (USB or alternate) that a type-C port may enter. */
7139 /* Replies the AP may specify to the TBT EnterMode command as a UFP */
7140 enum typec_tbt_ufp_reply
{
7141 TYPEC_TBT_UFP_REPLY_NAK
,
7142 TYPEC_TBT_UFP_REPLY_ACK
,
7145 #define TYPEC_USB_MUX_SET_ALL_CHIPS 0xFF
7147 struct typec_usb_mux_set
{
7148 /* Index of the mux to set in the chain */
7151 /* USB_PD_MUX_*-encoded USB mux state to set */
7155 struct typec_vdm_req
{
7156 /* VDM data, including VDM header */
7157 uint32_t vdm_data
[VDO_MAX_SIZE
];
7158 /* Number of 32-bit fields filled in */
7159 uint8_t vdm_data_objects
;
7160 /* Partner to address - see enum typec_partner_type */
7161 uint8_t partner_type
;
7164 struct ec_params_typec_control
{
7166 uint8_t command
; /* enum typec_control_command */
7170 * This section will be interpreted based on |command|. Define a
7171 * placeholder structure to avoid having to increase the size and bump
7172 * the command version when adding new sub-commands.
7175 /* Used for CLEAR_EVENTS */
7176 uint32_t clear_events_mask
;
7177 /* Used for ENTER_MODE - enum typec_mode */
7178 uint8_t mode_to_enter
;
7179 /* Used for TBT_UFP_REPLY - enum typec_tbt_ufp_reply */
7180 uint8_t tbt_ufp_reply
;
7181 /* Used for USB_MUX_SET */
7182 struct typec_usb_mux_set mux_params
;
7183 /* Used for BIST_SHARE_MODE */
7184 uint8_t bist_share_mode
;
7185 /* Used for VMD_REQ */
7186 struct typec_vdm_req vdm_req_params
;
7187 uint8_t placeholder
[128];
7192 * Gather all status information for a port.
7194 * Note: this covers many of the return fields from the deprecated
7195 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
7196 * discovery data. The "enum pd_cc_states" is defined with the deprecated
7197 * EC_CMD_USB_PD_CONTROL command.
7199 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
7201 #define EC_CMD_TYPEC_STATUS 0x0133
7206 * Note this is also used for PD header creation, and values align to those in
7207 * the Power Delivery Specification Revision 3.0 (See
7208 * 6.2.1.1.4 Port Power Role).
7210 enum pd_power_role
{
7218 * Note this is also used for PD header creation, and the first two values
7219 * align to those in the Power Delivery Specification Revision 3.0 (See
7220 * 6.2.1.1.6 Port Data Role).
7225 PD_ROLE_DISCONNECTED
= 2,
7228 enum pd_vconn_role
{
7229 PD_ROLE_VCONN_OFF
= 0,
7230 PD_ROLE_VCONN_SRC
= 1,
7234 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
7235 * regardless of whether a debug accessory is connected.
7237 enum tcpc_cc_polarity
{
7239 * _CCx: is used to indicate the polarity while not connected to
7240 * a Debug Accessory. Only one CC line will assert a resistor and
7241 * the other will be open.
7247 * _CCx_DTS is used to indicate the polarity while connected to a
7248 * SRC Debug Accessory. Assert resistors on both lines.
7250 POLARITY_CC1_DTS
= 2,
7251 POLARITY_CC2_DTS
= 3,
7254 * The current TCPC code relies on these specific POLARITY values.
7255 * Adding in a check to verify if the list grows for any reason
7256 * that this will give a hint that other places need to be
7262 #define MODE_DP_PIN_A BIT(0)
7263 #define MODE_DP_PIN_B BIT(1)
7264 #define MODE_DP_PIN_C BIT(2)
7265 #define MODE_DP_PIN_D BIT(3)
7266 #define MODE_DP_PIN_E BIT(4)
7267 #define MODE_DP_PIN_F BIT(5)
7268 #define MODE_DP_PIN_ALL GENMASK(5, 0)
7270 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
7271 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
7272 #define PD_STATUS_EVENT_HARD_RESET BIT(2)
7273 #define PD_STATUS_EVENT_DISCONNECTED BIT(3)
7274 #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4)
7275 #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5)
7276 #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6)
7277 #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7)
7278 #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8)
7279 #define PD_STATUS_EVENT_COUNT 9
7282 * Encode and decode for BCD revision response
7284 * Note: the major revision set is written assuming that the value given is the
7285 * Specification Revision from the PD header, which currently only maps to PD
7286 * 1.0-3.0 with the major revision being one greater than the binary value.
7288 #define PD_STATUS_REV_SET_MAJOR(r) ((r + 1) << 12)
7289 #define PD_STATUS_REV_GET_MAJOR(r) ((r >> 12) & 0xF)
7290 #define PD_STATUS_REV_GET_MINOR(r) ((r >> 8) & 0xF)
7293 * Encode revision from partner RMDO
7295 * Unlike the specification revision given in the PD header, specification and
7296 * version information returned in the revision message data object (RMDO) is
7299 #define PD_STATUS_RMDO_REV_SET_MAJOR(r) (r << 12)
7300 #define PD_STATUS_RMDO_REV_SET_MINOR(r) (r << 8)
7301 #define PD_STATUS_RMDO_VER_SET_MAJOR(r) (r << 4)
7302 #define PD_STATUS_RMDO_VER_SET_MINOR(r) (r)
7305 * Decode helpers for Source and Sink Capability PDOs
7307 * Note: The Power Delivery Specification should be considered the ultimate
7308 * source of truth on the decoding of these PDOs
7310 #define PDO_TYPE_FIXED (0 << 30)
7311 #define PDO_TYPE_BATTERY (1 << 30)
7312 #define PDO_TYPE_VARIABLE (2 << 30)
7313 #define PDO_TYPE_AUGMENTED (3 << 30)
7314 #define PDO_TYPE_MASK (3 << 30)
7317 * From Table 6-9 and Table 6-14 PD Rev 3.0 Ver 2.0
7319 * <31:30> : Fixed Supply
7320 * <29> : Dual-Role Power
7321 * <28> : SNK/SRC dependent
7322 * <27> : Unconstrained Power
7323 * <26> : USB Communications Capable
7324 * <25> : Dual-Role Data
7325 * <24:20> : SNK/SRC dependent
7326 * <19:10> : Voltage in 50mV Units
7327 * <9:0> : Maximum Current in 10mA units
7329 #define PDO_FIXED_DUAL_ROLE BIT(29)
7330 #define PDO_FIXED_UNCONSTRAINED BIT(27)
7331 #define PDO_FIXED_COMM_CAP BIT(26)
7332 #define PDO_FIXED_DATA_SWAP BIT(25)
7333 #define PDO_FIXED_FRS_CURR_MASK GENMASK(24, 23) /* Sink Cap only */
7334 #define PDO_FIXED_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
7335 #define PDO_FIXED_CURRENT(p) ((p & 0x3FF) * 10)
7338 * From Table 6-12 and Table 6-16 PD Rev 3.0 Ver 2.0
7341 * <29:20> : Maximum Voltage in 50mV units
7342 * <19:10> : Minimum Voltage in 50mV units
7343 * <9:0> : Maximum Allowable Power in 250mW units
7345 #define PDO_BATT_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)
7346 #define PDO_BATT_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
7347 #define PDO_BATT_MAX_POWER(p) ((p & 0x3FF) * 250)
7350 * From Table 6-11 and Table 6-15 PD Rev 3.0 Ver 2.0
7352 * <31:30> : Variable Supply (non-Battery)
7353 * <29:20> : Maximum Voltage in 50mV units
7354 * <19:10> : Minimum Voltage in 50mV units
7355 * <9:0> : Operational Current in 10mA units
7357 #define PDO_VAR_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)
7358 #define PDO_VAR_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
7359 #define PDO_VAR_MAX_CURRENT(p) ((p & 0x3FF) * 10)
7362 * From Table 6-13 and Table 6-17 PD Rev 3.0 Ver 2.0
7364 * Note this type is reserved in PD 2.0, and only one type of APDO is
7365 * supported as of the cited version.
7367 * <31:30> : Augmented Power Data Object
7368 * <29:28> : Programmable Power Supply
7369 * <27> : PPS Power Limited
7370 * <26:25> : Reserved
7371 * <24:17> : Maximum Voltage in 100mV increments
7373 * <15:8> : Minimum Voltage in 100mV increments
7375 * <6:0> : Maximum Current in 50mA increments
7377 #define PDO_AUG_MAX_VOLTAGE(p) ((p >> 17 & 0xFF) * 100)
7378 #define PDO_AUG_MIN_VOLTAGE(p) ((p >> 8 & 0xFF) * 100)
7379 #define PDO_AUG_MAX_CURRENT(p) ((p & 0x7F) * 50)
7381 struct ec_params_typec_status
{
7386 * ec_response_typec_status is deprecated. Use ec_response_typec_status_v1.
7387 * If you need to support old ECs who speak only v0, use
7388 * ec_response_typec_status_v0 instead. They're binary-compatible.
7390 struct ec_response_typec_status
/* DEPRECATED */ {
7391 uint8_t pd_enabled
; /* PD communication enabled - bool */
7392 uint8_t dev_connected
; /* Device connected - bool */
7393 uint8_t sop_connected
; /* Device is SOP PD capable - bool */
7394 uint8_t source_cap_count
; /* Number of Source Cap PDOs */
7396 uint8_t power_role
; /* enum pd_power_role */
7397 uint8_t data_role
; /* enum pd_data_role */
7398 uint8_t vconn_role
; /* enum pd_vconn_role */
7399 uint8_t sink_cap_count
; /* Number of Sink Cap PDOs */
7401 uint8_t polarity
; /* enum tcpc_cc_polarity */
7402 uint8_t cc_state
; /* enum pd_cc_states */
7403 uint8_t dp_pin
; /* DP pin mode (MODE_DP_IN_[A-E]) */
7404 uint8_t mux_state
; /* USB_PD_MUX* - encoded mux state */
7406 char tc_state
[32]; /* TC state name */
7408 uint32_t events
; /* PD_STATUS_EVENT bitmask */
7411 * BCD PD revisions for partners
7413 * The format has the PD major revision in the upper nibble, and the PD
7414 * minor revision in the next nibble. The following two nibbles hold the
7415 * major and minor specification version. If a partner does not support
7416 * the Revision message, only the major revision will be given.
7417 * ex. PD Revision 3.2 Version 1.9 would map to 0x3219
7419 * PD revision/version will be 0 if no PD device is connected.
7421 uint16_t sop_revision
;
7422 uint16_t sop_prime_revision
;
7424 uint32_t source_cap_pdos
[7]; /* Max 7 PDOs can be present */
7426 uint32_t sink_cap_pdos
[7]; /* Max 7 PDOs can be present */
7429 struct cros_ec_typec_status
{
7430 uint8_t pd_enabled
; /* PD communication enabled - bool */
7431 uint8_t dev_connected
; /* Device connected - bool */
7432 uint8_t sop_connected
; /* Device is SOP PD capable - bool */
7433 uint8_t source_cap_count
; /* Number of Source Cap PDOs */
7435 uint8_t power_role
; /* enum pd_power_role */
7436 uint8_t data_role
; /* enum pd_data_role */
7437 uint8_t vconn_role
; /* enum pd_vconn_role */
7438 uint8_t sink_cap_count
; /* Number of Sink Cap PDOs */
7440 uint8_t polarity
; /* enum tcpc_cc_polarity */
7441 uint8_t cc_state
; /* enum pd_cc_states */
7442 uint8_t dp_pin
; /* DP pin mode (MODE_DP_IN_[A-E]) */
7443 uint8_t mux_state
; /* USB_PD_MUX* - encoded mux state */
7445 char tc_state
[32]; /* TC state name */
7447 uint32_t events
; /* PD_STATUS_EVENT bitmask */
7450 * BCD PD revisions for partners
7452 * The format has the PD major revision in the upper nibble, and the PD
7453 * minor revision in the next nibble. The following two nibbles hold the
7454 * major and minor specification version. If a partner does not support
7455 * the Revision message, only the major revision will be given.
7456 * ex. PD Revision 3.2 Version 1.9 would map to 0x3219
7458 * PD revision/version will be 0 if no PD device is connected.
7460 uint16_t sop_revision
;
7461 uint16_t sop_prime_revision
;
7464 struct ec_response_typec_status_v0
{
7465 struct cros_ec_typec_status typec_status
;
7466 uint32_t source_cap_pdos
[7]; /* Max 7 PDOs can be present */
7467 uint32_t sink_cap_pdos
[7]; /* Max 7 PDOs can be present */
7470 struct ec_response_typec_status_v1
{
7471 struct cros_ec_typec_status typec_status
;
7472 uint32_t source_cap_pdos
[11]; /* Max 11 PDOs can be present */
7473 uint32_t sink_cap_pdos
[11]; /* Max 11 PDOs can be present */
7477 * Get the number of peripheral charge ports
7479 #define EC_CMD_PCHG_COUNT 0x0134
7481 #define EC_PCHG_MAX_PORTS 8
7483 struct ec_response_pchg_count
{
7488 * Get the status of a peripheral charge port
7490 #define EC_CMD_PCHG 0x0135
7493 struct ec_params_pchg
{
7497 struct ec_params_pchg_v3
{
7499 /* Below are new in v3. */
7503 /* Errors acked by the host (thus to be cleared) */
7508 struct ec_response_pchg
{
7509 uint32_t error
; /* enum pchg_error */
7510 uint8_t state
; /* enum pchg_state state */
7511 uint8_t battery_percentage
;
7514 /* Fields added in version 1 */
7515 uint32_t fw_version
;
7516 uint32_t dropped_event_count
;
7520 struct ec_response_pchg_v2
{
7521 uint32_t error
; /* enum pchg_error */
7522 uint8_t state
; /* enum pchg_state state */
7523 uint8_t battery_percentage
;
7526 /* Fields added in version 1 */
7527 uint32_t fw_version
;
7528 uint32_t dropped_event_count
;
7529 /* Fields added in version 2 */
7530 uint32_t dropped_host_event_count
;
7534 /* Charger is reset and not initialized. */
7535 PCHG_STATE_RESET
= 0,
7536 /* Charger is initialized or disabled. */
7537 PCHG_STATE_INITIALIZED
,
7538 /* Charger is enabled and ready to detect a device. */
7540 /* Device is in proximity. */
7541 PCHG_STATE_DETECTED
,
7542 /* Device is being charged. */
7543 PCHG_STATE_CHARGING
,
7544 /* Device is fully charged. It implies DETECTED (& not charging). */
7546 /* In download (a.k.a. firmware update) mode */
7547 PCHG_STATE_DOWNLOAD
,
7548 /* In download mode. Ready for receiving data. */
7549 PCHG_STATE_DOWNLOADING
,
7550 /* Device is ready for data communication. */
7551 PCHG_STATE_CONNECTED
,
7552 /* Charger is in Built-In Self Test mode. */
7554 /* Put no more entry below */
7558 /* clang-format off */
7559 #define EC_PCHG_STATE_TEXT \
7561 [PCHG_STATE_RESET] = "RESET", \
7562 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \
7563 [PCHG_STATE_ENABLED] = "ENABLED", \
7564 [PCHG_STATE_DETECTED] = "DETECTED", \
7565 [PCHG_STATE_CHARGING] = "CHARGING", \
7566 [PCHG_STATE_FULL] = "FULL", \
7567 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \
7568 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \
7569 [PCHG_STATE_CONNECTED] = "CONNECTED", \
7570 [PCHG_STATE_BIST] = "BIST", \
7572 /* clang-format on */
7575 * Update firmware of peripheral chip
7577 #define EC_CMD_PCHG_UPDATE 0x0136
7579 /* Port number is encoded in bit[28:31]. */
7580 #define EC_MKBP_PCHG_PORT_SHIFT 28
7581 /* Utility macros for converting MKBP event <-> port number. */
7582 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
7583 #define EC_MKBP_PCHG_PORT_TO_EVENT(p) ((p) << EC_MKBP_PCHG_PORT_SHIFT)
7584 /* Utility macro for extracting event bits. */
7585 #define EC_MKBP_PCHG_EVENT_MASK(e) \
7586 ((e) & GENMASK(EC_MKBP_PCHG_PORT_SHIFT - 1, 0))
7588 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0)
7589 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1)
7590 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2)
7591 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3)
7592 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4)
7594 enum ec_pchg_update_cmd
{
7595 /* Reset chip to normal mode. */
7596 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL
= 0,
7597 /* Reset and put a chip in update (a.k.a. download) mode. */
7598 EC_PCHG_UPDATE_CMD_OPEN
,
7599 /* Write a block of data containing FW image. */
7600 EC_PCHG_UPDATE_CMD_WRITE
,
7601 /* Close update session. */
7602 EC_PCHG_UPDATE_CMD_CLOSE
,
7603 /* Reset chip (without mode change). */
7604 EC_PCHG_UPDATE_CMD_RESET
,
7605 /* Enable pass-through mode. */
7606 EC_PCHG_UPDATE_CMD_ENABLE_PASSTHRU
,
7607 /* End of commands */
7608 EC_PCHG_UPDATE_CMD_COUNT
,
7611 struct ec_params_pchg_update
{
7612 /* PCHG port number */
7614 /* enum ec_pchg_update_cmd */
7619 /* Version of new firmware */
7621 /* CRC32 of new firmware */
7623 /* Address in chip memory where <data> is written to */
7625 /* Size of <data> */
7627 /* Partial data of new firmware */
7631 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT
<
7632 BIT(sizeof(((struct ec_params_pchg_update
*)0)->cmd
) * 8));
7634 struct ec_response_pchg_update
{
7636 uint32_t block_size
;
7639 #define EC_CMD_DISPLAY_SOC 0x0137
7641 struct ec_response_display_soc
{
7642 /* Display charge in 10ths of a % (1000=100.0%) */
7643 int16_t display_soc
;
7644 /* Full factor in 10ths of a % (1000=100.0%) */
7645 int16_t full_factor
;
7646 /* Shutdown SoC in 10ths of a % (1000=100.0%) */
7647 int16_t shutdown_soc
;
7650 #define EC_CMD_SET_BASE_STATE 0x0138
7652 struct ec_params_set_base_state
{
7653 uint8_t cmd
; /* enum ec_set_base_state_cmd */
7656 enum ec_set_base_state_cmd
{
7657 EC_SET_BASE_STATE_DETACH
= 0,
7658 EC_SET_BASE_STATE_ATTACH
,
7659 EC_SET_BASE_STATE_RESET
,
7662 #define EC_CMD_I2C_CONTROL 0x0139
7664 /* Subcommands for I2C control */
7666 enum ec_i2c_control_command
{
7667 EC_I2C_CONTROL_GET_SPEED
,
7668 EC_I2C_CONTROL_SET_SPEED
,
7671 #define EC_I2C_CONTROL_SPEED_UNKNOWN 0
7673 struct ec_params_i2c_control
{
7674 uint8_t port
; /* I2C port number */
7675 uint8_t cmd
; /* enum ec_i2c_control_command */
7681 struct ec_response_i2c_control
{
7687 #define EC_CMD_RGBKBD_SET_COLOR 0x013A
7688 #define EC_CMD_RGBKBD 0x013B
7690 #define EC_RGBKBD_MAX_KEY_COUNT 128
7691 #define EC_RGBKBD_MAX_RGB_COLOR 0xFFFFFF
7692 #define EC_RGBKBD_MAX_SCALE 0xFF
7695 /* RGB keyboard is reset and not initialized. */
7696 RGBKBD_STATE_RESET
= 0,
7697 /* RGB keyboard is initialized but not enabled. */
7698 RGBKBD_STATE_INITIALIZED
,
7699 /* RGB keyboard is disabled. */
7700 RGBKBD_STATE_DISABLED
,
7701 /* RGB keyboard is enabled and ready to receive a command. */
7702 RGBKBD_STATE_ENABLED
,
7704 /* Put no more entry below */
7708 enum ec_rgbkbd_subcmd
{
7709 EC_RGBKBD_SUBCMD_CLEAR
= 1,
7710 EC_RGBKBD_SUBCMD_DEMO
= 2,
7711 EC_RGBKBD_SUBCMD_SET_SCALE
= 3,
7712 EC_RGBKBD_SUBCMD_GET_CONFIG
= 4,
7713 EC_RGBKBD_SUBCMD_COUNT
7716 enum ec_rgbkbd_demo
{
7717 EC_RGBKBD_DEMO_OFF
= 0,
7718 EC_RGBKBD_DEMO_FLOW
= 1,
7719 EC_RGBKBD_DEMO_DOT
= 2,
7720 EC_RGBKBD_DEMO_COUNT
,
7723 BUILD_ASSERT(EC_RGBKBD_DEMO_COUNT
<= 255);
7725 enum ec_rgbkbd_type
{
7726 EC_RGBKBD_TYPE_UNKNOWN
= 0,
7727 EC_RGBKBD_TYPE_PER_KEY
= 1, /* e.g. Vell */
7728 EC_RGBKBD_TYPE_FOUR_ZONES_40_LEDS
= 2, /* e.g. Taniks */
7729 EC_RGBKBD_TYPE_FOUR_ZONES_12_LEDS
= 3, /* e.g. Osiris */
7730 EC_RGBKBD_TYPE_FOUR_ZONES_4_LEDS
= 4, /* e.g. Mithrax */
7731 EC_RGBKBD_TYPE_COUNT
,
7734 struct ec_rgbkbd_set_scale
{
7739 struct ec_params_rgbkbd
{
7740 uint8_t subcmd
; /* Sub-command (enum ec_rgbkbd_subcmd) */
7742 struct rgb_s color
; /* EC_RGBKBD_SUBCMD_CLEAR */
7743 uint8_t demo
; /* EC_RGBKBD_SUBCMD_DEMO */
7744 struct ec_rgbkbd_set_scale set_scale
;
7748 struct ec_response_rgbkbd
{
7750 * RGBKBD type supported by the device.
7753 uint8_t rgbkbd_type
; /* enum ec_rgbkbd_type */
7756 struct ec_params_rgbkbd_set_color
{
7757 /* Specifies the starting key ID whose color is being changed. */
7759 /* Specifies # of elements in <color>. */
7761 /* RGB color data array of length up to MAX_KEY_COUNT. */
7762 struct rgb_s color
[];
7766 * Gather the response to the most recent VDM REQ from the AP, as well
7767 * as popping the oldest VDM:Attention from the DPM queue
7769 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C
7771 struct ec_params_typec_vdm_response
{
7775 struct ec_response_typec_vdm_response
{
7776 /* Number of 32-bit fields filled in */
7777 uint8_t vdm_data_objects
;
7778 /* Partner to address - see enum typec_partner_type */
7779 uint8_t partner_type
;
7780 /* enum ec_status describing VDM response */
7781 uint16_t vdm_response_err
;
7782 /* VDM data, including VDM header */
7783 uint32_t vdm_response
[VDO_MAX_SIZE
];
7784 /* Number of 32-bit Attention fields filled in */
7785 uint8_t vdm_attention_objects
;
7786 /* Number of remaining messages to consume */
7787 uint8_t vdm_attention_left
;
7790 /* VDM:Attention contents */
7791 uint32_t vdm_attention
[2];
7795 * Get an active battery config from the EC.
7797 #define EC_CMD_BATTERY_CONFIG 0x013D
7799 /* Version of struct batt_conf_header and its internals. */
7800 #define EC_BATTERY_CONFIG_STRUCT_VERSION 0x00
7802 /* Number of writes needed to invoke battery cutoff command */
7803 #define SHIP_MODE_WRITES 2
7805 struct ship_mode_info
{
7808 uint16_t reg_data
[SHIP_MODE_WRITES
];
7809 } __packed
__aligned(2);
7811 struct sleep_mode_info
{
7815 } __packed
__aligned(2);
7821 uint16_t disconnect_val
;
7822 uint16_t cfet_mask
; /* CHG FET status mask */
7823 uint16_t cfet_off_val
;
7824 } __packed
__aligned(2);
7826 enum fuel_gauge_flags
{
7828 * Write Block Support. If enabled, we use a i2c write block command
7829 * instead of a 16-bit write. The effective difference is the i2c
7830 * transaction will prefix the length (2).
7832 FUEL_GAUGE_FLAG_WRITE_BLOCK
= BIT(0),
7833 /* Sleep command support. fuel_gauge_info.sleep_mode must be defined. */
7834 FUEL_GAUGE_FLAG_SLEEP_MODE
= BIT(1),
7836 * Manufacturer access command support. If enabled, FET status is read
7837 * from the OperationStatus (0x54) register using the
7838 * ManufacturerBlockAccess (0x44).
7840 FUEL_GAUGE_FLAG_MFGACC
= BIT(2),
7842 * SMB block protocol support in manufacturer access command. If
7843 * enabled, FET status is read from the OperationStatus (0x54) register
7844 * using the ManufacturerBlockAccess (0x44).
7846 FUEL_GAUGE_FLAG_MFGACC_SMB_BLOCK
= BIT(3),
7849 struct fuel_gauge_info
{
7851 uint32_t board_flags
;
7852 struct ship_mode_info ship_mode
;
7853 struct sleep_mode_info sleep_mode
;
7854 struct fet_info fet
;
7855 } __packed
__aligned(4);
7857 /* Battery constants */
7858 struct battery_info
{
7859 /* Operation voltage in mV */
7860 uint16_t voltage_max
;
7861 uint16_t voltage_normal
;
7862 uint16_t voltage_min
;
7863 /* (TODO(chromium:756700): add desired_charging_current */
7865 * Pre-charge to fast charge threshold in mV,
7866 * default to voltage_min if not specified.
7867 * This option is only available on isl923x and rt946x.
7869 uint16_t precharge_voltage
;
7870 /* Pre-charge current in mA */
7871 uint16_t precharge_current
;
7872 /* Working temperature ranges in degrees C */
7873 int8_t start_charging_min_c
;
7874 int8_t start_charging_max_c
;
7875 int8_t charging_min_c
;
7876 int8_t charging_max_c
;
7877 int8_t discharging_min_c
;
7878 int8_t discharging_max_c
;
7879 /* Used only if CONFIG_BATTERY_VENDOR_PARAM is defined. */
7880 uint8_t vendor_param_start
;
7882 } __packed
__aligned(2);
7885 * The 'config' of a battery.
7887 struct board_batt_params
{
7888 struct fuel_gauge_info fuel_gauge
;
7889 struct battery_info batt_info
;
7890 } __packed
__aligned(4);
7893 * The SBS defines a string object as a block of chars, 32 byte maximum, where
7894 * the first byte indicates the number of chars in the block (excluding the
7897 * Thus, the actual string length (i.e. the value strlen returns) is limited to
7898 * 31 (=SBS_MAX_STR_SIZE).
7900 * SBS_MAX_STR_OBJ_SIZE can be used as the size of a buffer for an SBS string
7901 * object but also as a buffer for a c-lang string because the null terminating
7902 * char also takes one byte.
7904 #define SBS_MAX_STR_SIZE 31
7905 #define SBS_MAX_STR_OBJ_SIZE (SBS_MAX_STR_SIZE + 1)
7908 * Header describing a battery config stored in CBI. Only struct_version has
7909 * size and position independent of struct_version. The rest varies as
7910 * struct_version changes.
7918 * | manuf_name | | manuf_name_size
7922 * | | | device_name_size
7927 * | | | cbi data size
7928 * | | | - (header_size+manuf_name_size+device_name_size)
7933 * - manuf_name and device_name are not null-terminated.
7934 * - The config isn't aligned. It should be copied to struct board_batt_params
7935 * before its contents are accessed.
7937 struct batt_conf_header
{
7938 /* Version independent field. It's always here as a uint8_t. */
7939 uint8_t struct_version
;
7940 /* Version 0 members */
7941 uint8_t manuf_name_size
;
7942 uint8_t device_name_size
;
7944 /* manuf_name, device_name, board_batt_params follow after this. */
7947 #define BATT_CONF_MAX_SIZE \
7948 (sizeof(struct batt_conf_header) + SBS_MAX_STR_OBJ_SIZE * 2 + \
7949 sizeof(struct board_batt_params))
7952 * Record the current AP firmware state. This is used to help testing, such as
7953 * with FAFT (Fully-Automated Firmware Test), which likes to know which firmware
7954 * screen is currently displayed.
7957 #define EC_CMD_AP_FW_STATE 0x013E
7959 struct ec_params_ap_fw_state
{
7961 * Value which indicates the state. This is not decoded by the EC, so
7962 * its meaning is entirely outside this code base.
7968 * UCSI OPM-PPM commands
7970 * These commands are used for communication between OPM and PPM.
7971 * Only UCSI3.0 is tested.
7974 #define EC_CMD_UCSI_PPM_SET 0x0140
7976 /* The data size is stored in the host command protocol header. */
7977 struct ec_params_ucsi_ppm_set
{
7982 #define EC_CMD_UCSI_PPM_GET 0x0141
7984 /* For 'GET' sub-commands, data will be returned as a raw payload. */
7985 struct ec_params_ucsi_ppm_get
{
7990 #define EC_CMD_SET_ALARM_SLP_S0_DBG 0x0142
7992 /* RTC params and response structures */
7993 struct ec_params_set_alarm_slp_s0_dbg
{
7997 /*****************************************************************************/
7998 /* The command range 0x200-0x2FF is reserved for Rotor. */
8000 /*****************************************************************************/
8002 * Reserve a range of host commands for the CR51 firmware.
8004 #define EC_CMD_CR51_BASE 0x0300
8005 #define EC_CMD_CR51_LAST 0x03FF
8007 /*****************************************************************************/
8008 /* Fingerprint MCU commands: range 0x0400-0x040x */
8011 * Fingerprint SPI sensor passthru command
8013 * This command was used for prototyping and it's now deprecated.
8015 #define EC_CMD_FP_PASSTHRU 0x0400
8017 #define EC_FP_FLAG_NOT_COMPLETE 0x1
8019 struct ec_params_fp_passthru
{
8020 uint16_t len
; /* Number of bytes to write then read */
8021 uint16_t flags
; /* EC_FP_FLAG_xxx */
8022 uint8_t data
[]; /* Data to send */
8025 /* Configure the Fingerprint MCU behavior */
8026 #define EC_CMD_FP_MODE 0x0402
8028 /* Put the sensor in its lowest power mode */
8029 #define FP_MODE_DEEPSLEEP BIT(0)
8030 /* Wait to see a finger on the sensor */
8031 #define FP_MODE_FINGER_DOWN BIT(1)
8032 /* Poll until the finger has left the sensor */
8033 #define FP_MODE_FINGER_UP BIT(2)
8034 /* Capture the current finger image */
8035 #define FP_MODE_CAPTURE BIT(3)
8036 /* Finger enrollment session on-going */
8037 #define FP_MODE_ENROLL_SESSION BIT(4)
8038 /* Enroll the current finger image */
8039 #define FP_MODE_ENROLL_IMAGE BIT(5)
8040 /* Try to match the current finger image */
8041 #define FP_MODE_MATCH BIT(6)
8042 /* Reset and re-initialize the sensor. */
8043 #define FP_MODE_RESET_SENSOR BIT(7)
8044 /* Sensor maintenance for dead pixels. */
8045 #define FP_MODE_SENSOR_MAINTENANCE BIT(8)
8046 /* special value: don't change anything just read back current mode */
8047 #define FP_MODE_DONT_CHANGE BIT(31)
8049 #define FP_VALID_MODES \
8050 (FP_MODE_DEEPSLEEP | FP_MODE_FINGER_DOWN | FP_MODE_FINGER_UP | \
8051 FP_MODE_CAPTURE | FP_MODE_ENROLL_SESSION | FP_MODE_ENROLL_IMAGE | \
8052 FP_MODE_MATCH | FP_MODE_RESET_SENSOR | FP_MODE_SENSOR_MAINTENANCE | \
8053 FP_MODE_DONT_CHANGE)
8055 /* Capture types defined in bits [30..28] */
8056 #define FP_MODE_CAPTURE_TYPE_SHIFT 28
8057 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
8059 * enum fp_capture_type - Specifies the "mode" when capturing images.
8061 * @FP_CAPTURE_VENDOR_FORMAT: Capture 1-3 images and choose the best quality
8062 * image (produces 'frame_size' bytes)
8063 * @FP_CAPTURE_SIMPLE_IMAGE: Simple raw image capture (produces width x height x
8065 * @FP_CAPTURE_PATTERN0: Self test pattern (e.g. checkerboard)
8066 * @FP_CAPTURE_PATTERN1: Self test pattern (e.g. inverted checkerboard)
8067 * @FP_CAPTURE_QUALITY_TEST: Capture for Quality test with fixed contrast
8068 * @FP_CAPTURE_RESET_TEST: Capture for pixel reset value test
8069 * @FP_CAPTURE_TYPE_MAX: End of enum
8071 * @note This enum must remain ordered, if you add new values you must ensure
8072 * that FP_CAPTURE_TYPE_MAX is still the last one.
8074 enum fp_capture_type
{
8075 FP_CAPTURE_VENDOR_FORMAT
= 0,
8076 FP_CAPTURE_SIMPLE_IMAGE
= 1,
8077 FP_CAPTURE_PATTERN0
= 2,
8078 FP_CAPTURE_PATTERN1
= 3,
8079 FP_CAPTURE_QUALITY_TEST
= 4,
8080 FP_CAPTURE_RESET_TEST
= 5,
8081 FP_CAPTURE_TYPE_MAX
,
8083 /* Extracts the capture type from the sensor 'mode' word */
8084 #define FP_CAPTURE_TYPE(mode) \
8085 (((mode) & FP_MODE_CAPTURE_TYPE_MASK) >> FP_MODE_CAPTURE_TYPE_SHIFT)
8087 struct ec_params_fp_mode
{
8088 uint32_t mode
; /* as defined by FP_MODE_ constants */
8091 struct ec_response_fp_mode
{
8092 uint32_t mode
; /* as defined by FP_MODE_ constants */
8095 /* Retrieve Fingerprint sensor information */
8096 #define EC_CMD_FP_INFO 0x0403
8098 /* Number of dead pixels detected on the last maintenance */
8099 #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
8100 /* Unknown number of dead pixels detected on the last maintenance */
8101 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
8102 /* No interrupt from the sensor */
8103 #define FP_ERROR_NO_IRQ BIT(12)
8104 /* SPI communication error */
8105 #define FP_ERROR_SPI_COMM BIT(13)
8106 /* Invalid sensor Hardware ID */
8107 #define FP_ERROR_BAD_HWID BIT(14)
8108 /* Sensor initialization failed */
8109 #define FP_ERROR_INIT_FAIL BIT(15)
8111 struct ec_response_fp_info_v0
{
8112 /* Sensor identification */
8114 uint32_t product_id
;
8117 /* Image frame characteristics */
8118 uint32_t frame_size
;
8119 uint32_t pixel_format
; /* using V4L2_PIX_FMT_ */
8123 uint16_t errors
; /* see FP_ERROR_ flags above */
8126 struct ec_response_fp_info
{
8127 /* Sensor identification */
8129 uint32_t product_id
;
8132 /* Image frame characteristics */
8133 uint32_t frame_size
;
8134 uint32_t pixel_format
; /* using V4L2_PIX_FMT_ */
8138 uint16_t errors
; /* see FP_ERROR_ flags above */
8139 /* Template/finger current information */
8140 uint32_t template_size
; /* max template size in bytes */
8141 uint16_t template_max
; /* maximum number of fingers/templates */
8142 uint16_t template_valid
; /* number of valid fingers/templates */
8143 uint32_t template_dirty
; /* bitmap of templates with MCU side changes */
8144 uint32_t template_version
; /* version of the template format */
8147 /* Get the last captured finger frame or a template content */
8148 #define EC_CMD_FP_FRAME 0x0404
8150 /* constants defining the 'offset' field which also contains the frame index */
8151 #define FP_FRAME_INDEX_SHIFT 28
8152 /* Frame buffer where the captured image is stored */
8153 #define FP_FRAME_INDEX_RAW_IMAGE 0
8154 /* First frame buffer holding a template */
8155 #define FP_FRAME_INDEX_TEMPLATE 1
8156 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
8157 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
8159 /* Version of the format of the encrypted templates. */
8160 #define FP_TEMPLATE_FORMAT_VERSION 4
8162 /* Constants for encryption parameters */
8163 #define FP_CONTEXT_NONCE_BYTES 12
8164 #define FP_CONTEXT_USERID_BYTES 32
8165 #define FP_CONTEXT_USERID_WORDS (FP_CONTEXT_USERID_BYTES / sizeof(uint32_t))
8166 #define FP_CONTEXT_TAG_BYTES 16
8167 #define FP_CONTEXT_ENCRYPTION_SALT_BYTES 16
8168 #define FP_CONTEXT_TPM_BYTES 32
8170 /* Constants for positive match parameters. */
8171 #define FP_POSITIVE_MATCH_SALT_BYTES 16
8173 struct ec_fp_template_encryption_metadata
{
8175 * Version of the structure format (N=3).
8177 uint16_t struct_version
;
8178 /* Reserved bytes, set to 0. */
8181 * The salt is *only* ever used for key derivation. The nonce is unique,
8182 * a different one is used for every message.
8184 uint8_t nonce
[FP_CONTEXT_NONCE_BYTES
];
8185 uint8_t encryption_salt
[FP_CONTEXT_ENCRYPTION_SALT_BYTES
];
8186 uint8_t tag
[FP_CONTEXT_TAG_BYTES
];
8189 struct ec_params_fp_frame
{
8191 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
8192 * in the high nibble, and the real offset within the frame in
8193 * FP_FRAME_OFFSET_MASK.
8199 /* Load a template into the MCU */
8200 #define EC_CMD_FP_TEMPLATE 0x0405
8202 /* Flag in the 'size' field indicating that the full template has been sent */
8203 #define FP_TEMPLATE_COMMIT 0x80000000
8205 struct ec_params_fp_template
{
8211 /* Clear the current fingerprint user context and set a new one */
8212 #define EC_CMD_FP_CONTEXT 0x0406
8214 struct ec_params_fp_context
{
8215 uint32_t userid
[FP_CONTEXT_USERID_WORDS
];
8218 enum fp_context_action
{
8219 FP_CONTEXT_ASYNC
= 0,
8220 FP_CONTEXT_GET_RESULT
= 1,
8223 /* Version 1 of the command is "asynchronous". */
8224 struct ec_params_fp_context_v1
{
8225 uint8_t action
; /**< enum fp_context_action */
8226 uint8_t reserved
[3]; /**< padding for alignment */
8227 uint32_t userid
[FP_CONTEXT_USERID_WORDS
];
8230 #define EC_CMD_FP_STATS 0x0407
8232 #define FPSTATS_CAPTURE_INV BIT(0)
8233 #define FPSTATS_MATCHING_INV BIT(1)
8235 struct ec_response_fp_stats
{
8236 uint32_t capture_time_us
;
8237 uint32_t matching_time_us
;
8238 uint32_t overall_time_us
;
8243 uint8_t timestamps_invalid
;
8244 int8_t template_matched
;
8247 #define EC_CMD_FP_SEED 0x0408
8248 struct ec_params_fp_seed
{
8250 * Version of the structure format (N=3).
8252 uint16_t struct_version
;
8253 /* Reserved bytes, set to 0. */
8255 /* Seed from the TPM. */
8256 uint8_t seed
[FP_CONTEXT_TPM_BYTES
];
8259 #define EC_CMD_FP_ENC_STATUS 0x0409
8261 /* FP TPM seed has been set or not */
8262 #define FP_ENC_STATUS_SEED_SET BIT(0)
8263 /* FP using nonce context or not */
8264 #define FP_CONTEXT_STATUS_NONCE_CONTEXT_SET BIT(1)
8265 /* FP match had been processed or not */
8266 #define FP_CONTEXT_STATUS_MATCH_PROCESSED_SET BIT(2)
8267 /* FP auth_nonce had been set or not*/
8268 #define FP_CONTEXT_AUTH_NONCE_SET BIT(3)
8269 /* FP user_id had been set or not*/
8270 #define FP_CONTEXT_USER_ID_SET BIT(4)
8271 /* FP templates are unlocked for nonce context or not */
8272 #define FP_CONTEXT_TEMPLATE_UNLOCKED_SET BIT(5)
8274 struct ec_response_fp_encryption_status
{
8275 /* Used bits in encryption engine status */
8276 uint32_t valid_flags
;
8277 /* Encryption engine status */
8281 #define EC_CMD_FP_READ_MATCH_SECRET 0x040A
8282 struct ec_params_fp_read_match_secret
{
8286 /* The positive match secret has the length of the SHA256 digest. */
8287 #define FP_POSITIVE_MATCH_SECRET_BYTES 32
8288 struct ec_response_fp_read_match_secret
{
8289 uint8_t positive_match_secret
[FP_POSITIVE_MATCH_SECRET_BYTES
];
8292 #define FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN 32
8294 struct fp_elliptic_curve_public_key
{
8295 uint8_t x
[FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN
];
8296 uint8_t y
[FP_ELLIPTIC_CURVE_PUBLIC_KEY_POINT_LEN
];
8299 #define FP_AES_KEY_ENC_METADATA_VERSION 1
8300 #define FP_AES_KEY_NONCE_BYTES 12
8301 #define FP_AES_KEY_ENCRYPTION_SALT_BYTES 16
8302 #define FP_AES_KEY_TAG_BYTES 16
8304 struct fp_auth_command_encryption_metadata
{
8305 /* Version of the structure format */
8306 uint16_t struct_version
;
8307 /* Reserved bytes, set to 0. */
8310 * The salt is *only* ever used for key derivation. The nonce is unique,
8311 * a different one is used for every message.
8313 uint8_t nonce
[FP_AES_KEY_NONCE_BYTES
];
8314 uint8_t encryption_salt
[FP_AES_KEY_ENCRYPTION_SALT_BYTES
];
8315 uint8_t tag
[FP_AES_KEY_TAG_BYTES
];
8318 #define FP_ELLIPTIC_CURVE_PRIVATE_KEY_LEN 32
8319 #define FP_ELLIPTIC_CURVE_PUBLIC_KEY_IV_LEN 16
8321 struct fp_encrypted_private_key
{
8322 struct fp_auth_command_encryption_metadata info
;
8323 uint8_t data
[FP_ELLIPTIC_CURVE_PRIVATE_KEY_LEN
];
8326 #define EC_CMD_FP_ESTABLISH_PAIRING_KEY_KEYGEN 0x0410
8328 struct ec_response_fp_establish_pairing_key_keygen
{
8329 struct fp_elliptic_curve_public_key pubkey
;
8330 struct fp_encrypted_private_key encrypted_private_key
;
8333 #define FP_PAIRING_KEY_LEN 32
8335 struct ec_fp_encrypted_pairing_key
{
8336 struct fp_auth_command_encryption_metadata info
;
8337 uint8_t data
[FP_PAIRING_KEY_LEN
];
8340 #define EC_CMD_FP_ESTABLISH_PAIRING_KEY_WRAP 0x0411
8342 struct ec_params_fp_establish_pairing_key_wrap
{
8343 struct fp_elliptic_curve_public_key peers_pubkey
;
8344 struct fp_encrypted_private_key encrypted_private_key
;
8347 struct ec_response_fp_establish_pairing_key_wrap
{
8348 struct ec_fp_encrypted_pairing_key encrypted_pairing_key
;
8351 #define EC_CMD_FP_LOAD_PAIRING_KEY 0x0412
8353 typedef struct ec_response_fp_establish_pairing_key_wrap
8354 ec_params_fp_load_pairing_key
;
8356 #define FP_CK_AUTH_NONCE_LEN 32
8358 #define EC_CMD_FP_GENERATE_NONCE 0x0413
8359 struct ec_response_fp_generate_nonce
{
8360 uint8_t nonce
[FP_CK_AUTH_NONCE_LEN
];
8363 #define FP_CONTEXT_USERID_LEN 32
8364 #define FP_CONTEXT_USERID_IV_LEN 16
8365 #define FP_CONTEXT_KEY_LEN 32
8367 #define EC_CMD_FP_NONCE_CONTEXT 0x0414
8368 struct ec_params_fp_nonce_context
{
8369 uint8_t gsc_nonce
[FP_CK_AUTH_NONCE_LEN
];
8370 uint8_t enc_user_id
[FP_CONTEXT_USERID_LEN
];
8371 uint8_t enc_user_id_iv
[FP_CONTEXT_USERID_IV_LEN
];
8374 #define FP_ELLIPTIC_CURVE_PUBLIC_KEY_IV_LEN 16
8376 #define EC_CMD_FP_READ_MATCH_SECRET_WITH_PUBKEY 0x0415
8378 struct ec_params_fp_read_match_secret_with_pubkey
{
8381 struct fp_elliptic_curve_public_key pubkey
;
8384 struct ec_response_fp_read_match_secret_with_pubkey
{
8385 struct fp_elliptic_curve_public_key pubkey
;
8386 uint8_t iv
[FP_ELLIPTIC_CURVE_PUBLIC_KEY_IV_LEN
];
8387 uint8_t enc_secret
[FP_POSITIVE_MATCH_SECRET_BYTES
];
8390 /* Unlock the fpsensor template with the current nonce context */
8391 #define EC_CMD_FP_UNLOCK_TEMPLATE 0x0417
8393 struct ec_params_fp_unlock_template
{
8398 * Migrate a legacy FP template (here, legacy refers to being generated in a
8399 * raw user_id context instead of a nonce context) by wiping its match secret
8400 * salt and treating it as a newly-enrolled template.
8401 * The legacy FP template needs to be uploaded by FP_TEMPLATE command first
8402 * without committing, then this command will commit it.
8404 #define EC_CMD_FP_MIGRATE_TEMPLATE_TO_NONCE_CONTEXT 0x0418
8406 struct ec_params_fp_migrate_template_to_nonce_context
{
8407 /* The context userid used to encrypt this template when it was created.
8409 uint32_t userid
[FP_CONTEXT_USERID_WORDS
];
8412 /*****************************************************************************/
8413 /* Touchpad MCU commands: range 0x0500-0x05FF */
8415 /* Perform touchpad self test */
8416 #define EC_CMD_TP_SELF_TEST 0x0500
8418 /* Get number of frame types, and the size of each type */
8419 #define EC_CMD_TP_FRAME_INFO 0x0501
8421 struct ec_response_tp_frame_info
{
8423 uint32_t frame_sizes
[0];
8426 /* Create a snapshot of current frame readings */
8427 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
8429 /* Read the frame */
8430 #define EC_CMD_TP_FRAME_GET 0x0503
8432 struct ec_params_tp_frame_get
{
8433 uint32_t frame_index
;
8438 /*****************************************************************************/
8439 /* EC-EC communication commands: range 0x0600-0x06FF */
8441 #define EC_COMM_TEXT_MAX 8
8444 * Get battery static information, i.e. information that never changes, or
8445 * very infrequently.
8447 #define EC_CMD_BATTERY_GET_STATIC 0x0600
8450 * struct ec_params_battery_static_info - Battery static info parameters
8451 * @index: Battery index.
8453 struct ec_params_battery_static_info
{
8458 * struct ec_response_battery_static_info - Battery static info response
8459 * @design_capacity: Battery Design Capacity (mAh)
8460 * @design_voltage: Battery Design Voltage (mV)
8461 * @manufacturer: Battery Manufacturer String
8462 * @model: Battery Model Number String
8463 * @serial: Battery Serial Number String
8464 * @type: Battery Type String
8465 * @cycle_count: Battery Cycle Count
8467 struct ec_response_battery_static_info
{
8468 uint16_t design_capacity
;
8469 uint16_t design_voltage
;
8470 char manufacturer
[EC_COMM_TEXT_MAX
];
8471 char model
[EC_COMM_TEXT_MAX
];
8472 char serial
[EC_COMM_TEXT_MAX
];
8473 char type
[EC_COMM_TEXT_MAX
];
8474 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */
8475 uint32_t cycle_count
;
8479 * struct ec_response_battery_static_info_v1 - hostcmd v1 battery static info
8480 * Equivalent to struct ec_response_battery_static_info, but with longer
8482 * @design_capacity: battery design capacity (in mAh)
8483 * @design_voltage: battery design voltage (in mV)
8484 * @cycle_count: battery cycle count
8485 * @manufacturer_ext: battery manufacturer string
8486 * @model_ext: battery model string
8487 * @serial_ext: battery serial number string
8488 * @type_ext: battery type string
8490 struct ec_response_battery_static_info_v1
{
8491 uint16_t design_capacity
;
8492 uint16_t design_voltage
;
8493 uint32_t cycle_count
;
8494 char manufacturer_ext
[12];
8496 char serial_ext
[12];
8501 * struct ec_response_battery_static_info_v2 - hostcmd v2 battery static info
8503 * Equivalent to struct ec_response_battery_static_info, but with strings
8504 * further lengthened (relative to v1) to accommodate the maximum string length
8505 * permitted by the Smart Battery Data Specification revision 1.1 and fields
8506 * renamed to better match that specification.
8508 * @design_capacity: battery design capacity (in mAh)
8509 * @design_voltage: battery design voltage (in mV)
8510 * @cycle_count: battery cycle count
8511 * @manufacturer: battery manufacturer string
8512 * @device_name: battery model string
8513 * @serial: battery serial number string
8514 * @chemistry: battery type string
8516 struct ec_response_battery_static_info_v2
{
8517 uint16_t design_capacity
;
8518 uint16_t design_voltage
;
8519 uint32_t cycle_count
;
8520 char manufacturer
[SBS_MAX_STR_OBJ_SIZE
];
8521 char device_name
[SBS_MAX_STR_OBJ_SIZE
];
8522 char serial
[SBS_MAX_STR_OBJ_SIZE
];
8523 char chemistry
[SBS_MAX_STR_OBJ_SIZE
];
8527 * Get battery dynamic information, i.e. information that is likely to change
8528 * every time it is read.
8530 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
8533 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
8534 * @index: Battery index.
8536 struct ec_params_battery_dynamic_info
{
8541 * struct ec_response_battery_dynamic_info - Battery dynamic info response
8542 * @actual_voltage: Battery voltage (mV)
8543 * @actual_current: Battery current (mA); negative=discharging
8544 * @remaining_capacity: Remaining capacity (mAh)
8545 * @full_capacity: Capacity (mAh, might change occasionally)
8546 * @flags: Flags, see EC_BATT_FLAG_*
8547 * @desired_voltage: Charging voltage desired by battery (mV)
8548 * @desired_current: Charging current desired by battery (mA)
8550 struct ec_response_battery_dynamic_info
{
8551 int16_t actual_voltage
;
8552 int16_t actual_current
;
8553 int16_t remaining_capacity
;
8554 int16_t full_capacity
;
8556 int16_t desired_voltage
;
8557 int16_t desired_current
;
8561 * Control charger chip. Used to control charger chip on the peripheral.
8563 #define EC_CMD_CHARGER_CONTROL 0x0602
8566 * struct ec_params_charger_control - Charger control parameters
8567 * @max_current: Charger current (mA). Positive to allow base to draw up to
8568 * max_current and (possibly) charge battery, negative to request current
8570 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
8572 * @allow_charging: Allow base battery charging (only makes sense if
8575 struct ec_params_charger_control
{
8576 int16_t max_current
;
8577 uint16_t otg_voltage
;
8578 uint8_t allow_charging
;
8581 /* Get ACK from the USB-C SS muxes */
8582 #define EC_CMD_USB_PD_MUX_ACK 0x0603
8584 struct ec_params_usb_pd_mux_ack
{
8585 uint8_t port
; /* USB-C port number */
8589 #define EC_CMD_GET_BOOT_TIME 0x0604
8591 enum boot_time_param
{
8601 struct ec_response_get_boot_time
{
8602 uint64_t timestamp
[RESET_CNT
];
8606 /*****************************************************************************/
8608 * Reserve a range of host commands for board-specific, experimental, or
8609 * special purpose features. These can be (re)used without updating this file.
8611 * CAUTION: Don't go nuts with this. Shipping products should document ALL
8612 * their EC commands for easier development, testing, debugging, and support.
8614 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
8615 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
8617 * In your experimental code, you may want to do something like this:
8619 * #define EC_CMD_MAGIC_FOO 0x0000
8620 * #define EC_CMD_MAGIC_BAR 0x0001
8621 * #define EC_CMD_MAGIC_HEY 0x0002
8623 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
8626 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
8629 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
8632 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
8633 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
8636 * Given the private host command offset, calculate the true private host
8639 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
8640 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
8642 /*****************************************************************************/
8646 * Some platforms have sub-processors chained to each other. For example.
8648 * AP <--> EC <--> PD MCU
8650 * The top 2 bits of the command number are used to indicate which device the
8651 * command is intended for. Device 0 is always the device receiving the
8652 * command; other device mapping is board-specific.
8654 * When a device receives a command to be passed to a sub-processor, it passes
8655 * it on with the device number set back to 0. This allows the sub-processor
8656 * to remain blissfully unaware of whether the command originated on the next
8657 * device up the chain, or was passed through from the AP.
8659 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
8660 * AP sends command 0x4002 to the EC
8661 * EC sends command 0x0002 to the PD MCU
8662 * EC forwards PD MCU response back to the AP
8665 /* Offset and max command number for sub-device n */
8666 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
8667 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
8669 /*****************************************************************************/
8671 * Deprecated constants. These constants have been renamed for clarity. The
8672 * meaning and size has not changed. Programs that use the old names should
8673 * switch to the new names soon, as the old names may not be carried forward
8676 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
8677 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
8678 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
8680 #endif /* !__ACPI__ */
8686 #endif /* __CROS_EC_EC_COMMANDS_H */