src/include/cpu/x86/cr.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef CPU_X86_CR_H
   4 #define CPU_X86_CR_H
   5
   6 #if !defined(__ASSEMBLER__)
   7
   8 #include <stdint.h>
   9
  10 #define COMPILER_BARRIER "memory"
  11
  12 #if ENV_X86_64
  13 #define CRx_TYPE uint64_t
  14 #define CRx_IN   "q"
  15 #define CRx_RET  "=q"
  16 #else
  17 #define CRx_TYPE uint32_t
  18 #define CRx_IN   "r"
  19 #define CRx_RET  "=r"
  20 #endif
  21 static __always_inline CRx_TYPE read_cr0(void)
  22 {
  23         CRx_TYPE value;
  24         __asm__ __volatile__ (
  25                 "mov %%cr0, %0"
  26                 : CRx_RET(value)
  27                 :
  28                 : COMPILER_BARRIER
  29         );
  30         return value;
  31 }
  32
  33 static __always_inline void write_cr0(CRx_TYPE data)
  34 {
  35         __asm__ __volatile__ (
  36                 "mov %0, %%cr0"
  37                 :
  38                 : CRx_IN(data)
  39                 : COMPILER_BARRIER
  40         );
  41 }
  42
  43 static __always_inline CRx_TYPE read_cr2(void)
  44 {
  45         CRx_TYPE value;
  46         __asm__ __volatile__ (
  47                 "mov %%cr2, %0"
  48                 : CRx_RET(value)
  49                 :
  50                 : COMPILER_BARRIER
  51         );
  52         return value;
  53 }
  54
  55 static __always_inline CRx_TYPE read_cr3(void)
  56 {
  57         CRx_TYPE value;
  58         __asm__ __volatile__ (
  59                 "mov %%cr3, %0"
  60                 : CRx_RET(value)
  61                 :
  62                 : COMPILER_BARRIER
  63         );
  64         return value;
  65 }
  66
  67 static __always_inline void write_cr3(CRx_TYPE data)
  68 {
  69         __asm__ __volatile__ (
  70                 "mov %0, %%cr3"
  71                 :
  72                 : CRx_IN(data)
  73                 : COMPILER_BARRIER
  74         );
  75 }
  76 static __always_inline CRx_TYPE read_cr4(void)
  77 {
  78         CRx_TYPE value;
  79         __asm__ __volatile__ (
  80                 "mov %%cr4, %0"
  81                 : CRx_RET(value)
  82                 :
  83                 : COMPILER_BARRIER
  84         );
  85         return value;
  86 }
  87
  88 static __always_inline void write_cr4(CRx_TYPE data)
  89 {
  90         __asm__ __volatile__ (
  91                 "mov %0, %%cr4"
  92                 :
  93                 : CRx_IN(data)
  94                 : COMPILER_BARRIER
  95         );
  96 }
  97
  98 #endif /* !defined(__ASSEMBLER__) */
  99
 100 /* CR0 flags */
 101 #define CR0_PE          (1 <<  0)
 102 #define CR0_MP          (1 <<  1)
 103 #define CR0_EM          (1 <<  2)
 104 #define CR0_TS          (1 <<  3)
 105 #define CR0_ET          (1 <<  4)
 106 #define CR0_NE          (1 <<  5)
 107 #define CR0_WP          (1 << 16)
 108 #define CR0_AM          (1 << 18)
 109 #define CR0_NW          (1 << 29)
 110 #define CR0_CD          (1 << 30)
 111 #define CR0_PG          (1 << 31)
 112
 113 /* CR4 flags */
 114 #define CR4_VME         (1 <<  0)
 115 #define CR4_PVI         (1 <<  1)
 116 #define CR4_TSD         (1 <<  2)
 117 #define CR4_DE          (1 <<  3)
 118 #define CR4_PSE         (1 <<  4)
 119 #define CR4_PAE         (1 <<  5)
 120 #define CR4_MCE         (1 <<  6)
 121 #define CR4_PGE         (1 <<  7)
 122 #define CR4_PCE         (1 <<  8)
 123 #define CR4_OSFXSR      (1 <<  9)
 124 #define CR4_OSXMMEXCPT  (1 << 10)
 125 #define CR4_VMXE        (1 << 13)
 126 #define CR4_SMXE        (1 << 14)
 127 #define CR4_FSGSBASE    (1 << 16)
 128 #define CR4_PCIDE       (1 << 17)
 129 #define CR4_OSXSAVE     (1 << 18)
 130 #define CR4_SMEP        (1 << 20)
 131
 132 #endif /* CPU_X86_CR_H */