1 /* SPDX-License-Identifier: GPL-2.0-only */
6 /* GPIO pins used by coreboot should be initialized in bootblock */
8 static const struct soc_amd_gpio gpio_set_stage_reset
[] = {
9 PAD_NF(GPIO_113
, I2C2_SCL
, PULL_NONE
),
10 PAD_NF(GPIO_114
, I2C2_SDA
, PULL_NONE
),
11 PAD_NF(GPIO_19
, I2C3_SCL
, PULL_NONE
),
12 PAD_NF(GPIO_20
, I2C3_SDA
, PULL_NONE
),
15 void mainboard_program_early_gpios(void)
17 gpio_configure_pads(gpio_set_stage_reset
, ARRAY_SIZE(gpio_set_stage_reset
));