util/docker/doc.coreboot.org: Allow git to work in envs owned by root
[coreboot2.git] / src / mainboard / compulab / intense_pc / early_init.c
blob44d105f99a22285418924551f82b0dd2ccd45ebb
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <stdint.h>
5 #include <arch/io.h>
6 #include <superio/smsc/sio1007/sio1007.h>
8 #define SIO_PORT 0x164e
10 void bootblock_mainboard_early_init(void)
12 const u16 port = SIO_PORT;
13 const u16 runtime_port = 0x180;
15 /* Enable COM1 if requested */
16 if (CONFIG(DRIVERS_UART_8250IO))
17 sio1007_enable_uart_at(port);
19 /* Turn on configuration mode. */
20 outb(0x55, port);
22 /* Set the GPIO direction, polarity, and type. */
23 sio1007_setreg(port, 0x31, 1 << 0, 1 << 0);
24 sio1007_setreg(port, 0x32, 0 << 0, 1 << 0);
25 sio1007_setreg(port, 0x33, 0 << 0, 1 << 0);
27 /* Set the base address for the runtime register block. */
28 sio1007_setreg(port, 0x30, runtime_port >> 4, 0xff);
29 sio1007_setreg(port, 0x21, runtime_port >> 12, 0xff);
31 /* Turn on address decoding for it. */
32 sio1007_setreg(port, 0x3a, 1 << 1, 1 << 1);
34 /* Set the value of GPIO 10 by changing GP1, bit 0. */
35 u8 byte;
36 byte = inb(runtime_port + 0xc);
37 byte |= (1 << 0);
38 outb(byte, runtime_port + 0xc);
40 /* Turn off address decoding for it. */
41 sio1007_setreg(port, 0x3a, 0 << 1, 1 << 1);
43 /* Turn off configuration mode. */
44 outb(0xaa, port);