1 /* SPDX-License-Identifier: GPL-2.0-only */
5 #include <arch/romstage.h>
6 #include <console/console.h>
7 #include <cpu/x86/smm.h>
11 #define CMOS_ADDR_PORT 0x70
12 #define CMOS_DATA_PORT 0x71
14 #define HIGH_RAM_ADDR 0x35
15 #define LOW_RAM_ADDR 0x34
17 #define HIGH_HIGHRAM_ADDR 0x5d
18 #define MID_HIGHRAM_ADDR 0x5c
19 #define LOW_HIGHRAM_ADDR 0x5b
21 unsigned long qemu_get_high_memory_size(void)
24 outb(HIGH_HIGHRAM_ADDR
, CMOS_ADDR_PORT
);
25 high
= ((unsigned long)inb(CMOS_DATA_PORT
)) << 22;
26 outb(MID_HIGHRAM_ADDR
, CMOS_ADDR_PORT
);
27 high
|= ((unsigned long)inb(CMOS_DATA_PORT
)) << 14;
28 outb(LOW_HIGHRAM_ADDR
, CMOS_ADDR_PORT
);
29 high
|= ((unsigned long)inb(CMOS_DATA_PORT
)) << 6;
33 unsigned long qemu_get_memory_size(void)
36 outb(HIGH_RAM_ADDR
, CMOS_ADDR_PORT
);
37 tomk
= ((unsigned long)inb(CMOS_DATA_PORT
)) << 14;
38 outb(LOW_RAM_ADDR
, CMOS_ADDR_PORT
);
39 tomk
|= ((unsigned long)inb(CMOS_DATA_PORT
)) << 6;
44 uintptr_t cbmem_top_chipset(void)
50 printk(BIOS_WARNING
, "QEMU: Falling back to RAM info in CMOS\n");
51 top
= (uintptr_t)qemu_get_memory_size() * 1024;
54 if (CONFIG(BOARD_EMULATION_QEMU_X86_Q35
)) {
56 smm_region(&top
, &smm_size
);
62 /* Nothing to do, MTRRs are no-op on QEMU. */
63 void fill_postcar_frame(struct postcar_frame
*pcf
)