src/mainboard/google/brya/dsdt.asl

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <acpi/acpi.h>
   4 #include <variant/ec.h>
   5
   6 DefinitionBlock(
   7         "dsdt.aml",
   8         "DSDT",
   9         ACPI_DSDT_REV_2,
  10         OEM_ID,
  11         ACPI_TABLE_CREATOR,
  12         0x20110725
  13 )
  14 {
  15         #include <acpi/dsdt_top.asl>
  16         #include <soc/intel/common/acpi/platform.asl>
  17         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
  18         #include <cpu/intel/common/acpi/cpu.asl>
  19
  20         Scope (\_SB) {
  21 #if CONFIG(HAVE_WWAN_POWER_SEQUENCE)
  22                 #include "wwan_power.asl"
  23 #endif
  24                 Device (PCI0)
  25                 {
  26                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
  27                         #include <soc/intel/alderlake/acpi/southbridge.asl>
  28                         #include <soc/intel/alderlake/acpi/tcss.asl>
  29                         #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
  30                 }
  31         }
  32
  33         /* Chipset specific sleep states */
  34         #include <southbridge/intel/common/acpi/sleepstates.asl>
  35
  36         /* ChromeOS Embedded Controller */
  37         Scope (\_SB.PCI0.LPCB)
  38         {
  39                 /* ACPI code for EC SuperIO functions */
  40                 #include <ec/google/chromeec/acpi/superio.asl>
  41                 /* ACPI code for EC functions */
  42                 #include <ec/google/chromeec/acpi/ec.asl>
  43         }
  44
  45 #if CONFIG(INCLUDE_NVIDIA_GPU_ASL)
  46         #include "acpi/gpu_top.asl"
  47 #endif
  48 }