src/mainboard/google/brya/variants/uldren/gpio.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <baseboard/gpio.h>
   4 #include <baseboard/variants.h>
   5 #include <commonlib/helpers.h>
   6 #include <soc/gpio.h>
   7
   8 /* Pad configuration in ramstage */
   9 static const struct pad_config override_gpio_table[] = {
  10         /* A8  : WWAN_RF_DISABLE_ODL */
  11         PAD_CFG_GPO(GPP_A8, 1, DEEP),
  12         /* A20 : DDSP_HPD2 ==> NC */
  13         PAD_NC(GPP_A20, NONE),
  14         /* B5  : I2C2_SDA ==> NC */
  15         PAD_NC(GPP_B5, NONE),
  16         /* B6  : I2C2_SCL ==> NC */
  17         PAD_NC(GPP_B6, NONE),
  18         /* B15 : HP_RST_ODL */
  19         PAD_CFG_GPO(GPP_B15, 1, DEEP),
  20         /* C1  : SMBDA==> TCHSCR_RST_L */
  21         PAD_CFG_GPO(GPP_C1, 1, DEEP),
  22         /* D6  : SRCCLKREQ1# ==> WWAN_EN */
  23         PAD_CFG_GPO(GPP_D6, 1, PWROK),
  24         /* D7  : SRCCLKREQ2# ==> NC */
  25         PAD_NC(GPP_D7, NONE),
  26         /* D8  : SRCCLKREQ3# ==> NC */
  27         PAD_NC(GPP_D8, NONE),
  28         /* D15 : ISH_UART0_RTS# ==> NC */
  29         PAD_NC(GPP_D15, NONE),
  30         /* D16 : ISH_UART0_CTS# ==> NC */
  31         PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
  32         /* D19 : I2S_MCLK1_OUT ==> NC */
  33         PAD_NC(GPP_D19, NONE),
  34         /* E20 : DDP2_CTRLCLK ==> NC */
  35         PAD_NC(GPP_E20, NONE),
  36         /* E21 : DDP2_CTRLDATA ==> NC */
  37         PAD_NC(GPP_E21, NONE),
  38         /* F12 : WWAN_RST_L */
  39         PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
  40         /* F13 : SOC_PEN_DETECT_R_ODL ==> NC*/
  41         PAD_NC(GPP_F13, NONE),
  42         /* F15 : SOC_PEN_DETECT_ODL ==> NC*/
  43         PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
  44         /* F18 : EC_IN_RW_OD ==> NC */
  45         PAD_NC(GPP_F18, NONE),
  46         /* H3 : WLAN_PCIE_WAKE_ODL ==> NC */
  47         PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
  48         /* H12 : UART0_RTS# ==> NC */
  49         PAD_NC(GPP_H12, NONE),
  50         /* H13 : UART0_CTS# ==> NC */
  51         PAD_NC(GPP_H13, NONE),
  52         /* H20 : WLAN_PERST_L ==> NC */
  53         PAD_NC(GPP_H20, NONE),
  54         /* H22 : IMGCLKOUT3 ==> NC */
  55         PAD_NC(GPP_H22, NONE),
  56 };
  57
  58 /* Early pad configuration in bootblock */
  59 static const struct pad_config early_gpio_table[] = {
  60         /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
  61         PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
  62         /* B15 : HP_RST_ODL */
  63         PAD_CFG_GPO(GPP_B15, 0, DEEP),
  64         /* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
  65         PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
  66         /* F12 : GSXDOUT ==> WWAN_RST_L */
  67         PAD_CFG_GPO(GPP_F12, 0, DEEP),
  68         /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
  69         PAD_CFG_GPI(GPP_F18, NONE, DEEP),
  70         /* H4  : I2C0_SDA ==> SOC_I2C_GSC_SDA */
  71         PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
  72         /* H5  : I2C0_SCL ==> SOC_I2C_GSC_SCL */
  73         PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
  74         /* H10 : UART0_RXD ==> UART_SOC_RX_DBG_TX */
  75         PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
  76         /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
  77         PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
  78 };
  79
  80 static const struct pad_config romstage_gpio_table[] = {
  81         /* Enable touchscreen, hold in reset */
  82         /* C0  : SMBCLK ==> EN_PP3300_TCHSCR_X */
  83         PAD_CFG_GPO(GPP_C0, 1, DEEP),
  84         /* C1  : SMBDATA ==> TCHSCR_RST_L */
  85         PAD_CFG_GPO(GPP_C1, 0, DEEP),
  86 };
  87
  88 const struct pad_config *variant_gpio_override_table(size_t *num)
  89 {
  90         *num = ARRAY_SIZE(override_gpio_table);
  91         return override_gpio_table;
  92 }
  93
  94 const struct pad_config *variant_early_gpio_table(size_t *num)
  95 {
  96         *num = ARRAY_SIZE(early_gpio_table);
  97         return early_gpio_table;
  98 }
  99
 100 const struct pad_config *variant_romstage_gpio_table(size_t *num)
 101 {
 102         *num = ARRAY_SIZE(romstage_gpio_table);
 103         return romstage_gpio_table;
 104 }