src/mainboard/google/butterfly/early_init.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <stdint.h>
   4 #include <northbridge/intel/sandybridge/raminit.h>
   5 #include <southbridge/intel/bd82x6x/pch.h>
   6
   7 void mainboard_late_rcba_config(void)
   8 {
   9         /*
  10          *             GFX    INTA -> PIRQA (MSI)
  11          * D28IP_P1IP  WLAN   INTA -> PIRQB
  12          * D28IP_P2IP  ETH0   INTB -> PIRQF
  13          * D28IP_P3IP  SDCARD INTC -> PIRQD
  14          * D29IP_E1P   EHCI1  INTA -> PIRQD
  15          * D26IP_E2P   EHCI2  INTA -> PIRQF
  16          * D31IP_SIP   SATA   INTA -> PIRQB (MSI)
  17          * D31IP_SMIP  SMBUS  INTB -> PIRQH
  18          * D31IP_TTIP  THRT   INTC -> PIRQA
  19          * D27IP_ZIP   HDA    INTA -> PIRQA (MSI)
  20          *
  21          * Trackpad interrupt is edge triggered and cannot be shared.
  22          * TRACKPAD                -> PIRQG
  23
  24          */
  25
  26         /* Device interrupt pin register (board specific) */
  27         RCBA32(D31IP) = (INTC << D31IP_TTIP) | (NOINT << D31IP_SIP2) |
  28                         (INTB << D31IP_SMIP) | (INTA << D31IP_SIP);
  29         RCBA32(D29IP) = (INTA << D29IP_E1P);
  30         RCBA32(D28IP) = (INTA << D28IP_P1IP) | (INTB << D28IP_P2IP) |
  31                         (INTC << D28IP_P3IP);
  32         RCBA32(D27IP) = (INTA << D27IP_ZIP);
  33         RCBA32(D26IP) = (INTA << D26IP_E2P);
  34         RCBA32(D25IP) = (NOINT << D25IP_LIP);
  35         RCBA32(D22IP) = (NOINT << D22IP_MEI1IP);
  36
  37         /* Device interrupt route registers */
  38         DIR_ROUTE(D31IR, PIRQB, PIRQH, PIRQA, PIRQC);
  39         DIR_ROUTE(D29IR, PIRQD, PIRQE, PIRQF, PIRQG);
  40         DIR_ROUTE(D28IR, PIRQB, PIRQF, PIRQD, PIRQE);
  41         DIR_ROUTE(D27IR, PIRQA, PIRQH, PIRQA, PIRQB);
  42         DIR_ROUTE(D26IR, PIRQF, PIRQE, PIRQG, PIRQH);
  43         DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD);
  44         DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
  45 }
  46
  47 void mainboard_fill_pei_data(struct pei_data *pei_data)
  48 {
  49         /* TODO: Confirm if nortbridge_fill_pei_data() gets .system_type right (should be 0) */
  50 }