soc/mediatek/mt8196: Initialize SSPM
[coreboot2.git] / src / mainboard / google / dedede / variants / dibbi / overridetree.cb
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1 chip soc/intel/jasperlake
3 # Intel Common SoC Config
4 #+-------------------+---------------------------+
5 #| Field | Value |
6 #+-------------------+---------------------------+
7 #| GSPI0 | cr50 TPM. Early init is |
8 #| | required to set up a BAR |
9 #| | for TPM communication |
10 #| | before memory is up |
11 #| I2C4 | Audio |
12 #+-------------------+---------------------------+
13 register "common_soc_config" = "{
14 .gspi[0] = {
15 .speed_mhz = 1,
16 .early_init = 1,
18 .i2c[4] = {
19 .speed_config[0] = {
20 .speed = I2C_SPEED_FAST,
21 .scl_lcnt = 190,
22 .scl_hcnt = 100,
23 .sda_hold = 40,
28 # Power limit config
29 register "power_limits_config[JSL_N4500_6W_CORE]" = "{
30 .tdp_pl1_override = 6,
31 .tdp_pl2_override = 20,
32 .tdp_pl4 = 60,
35 register "power_limits_config[JSL_N5100_6W_CORE]" = "{
36 .tdp_pl1_override = 6,
37 .tdp_pl2_override = 20,
38 .tdp_pl4 = 60,
41 # Root Port 3 (index 2) for LAN
42 # External PCIe port 7 is mapped to PCIe Root Port 3
43 register "PcieClkSrcUsage[4]" = "2"
45 # Root Port 7 (index 6) for WLAN
46 # External PCIe port 3 is mapped to PCIe Root Port 7
47 register "PcieClkSrcUsage[3]" = "6"
49 # Audio related configurations
50 register "PchHdaAudioLinkDmicEnable[0]" = "0"
51 register "PchHdaAudioLinkDmicEnable[1]" = "0"
53 # Disable SD card
54 register "sdcard_cd_gpio" = "0"
55 register "SdCardPowerEnableActiveHigh" = "0"
57 # Disable eDP on port A
58 register "DdiPortAConfig" = "0"
60 # Enable HPD and DDC for DDI port A
61 register "DdiPortAHpd" = "1"
62 register "DdiPortADdc" = "1"
64 # USB Port Configuration
65 register "usb2_ports[0]" = "{
66 .enable = 1,
67 .ocpin = OC_SKIP,
68 .tx_bias = USB2_BIAS_0MV,
69 .tx_emp_enable = USB2_PRE_EMP_ON,
70 .pre_emp_bias = USB2_BIAS_11P25MV,
71 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
72 }" # Type-C Port 0
73 register "usb2_ports[1]" = "{
74 .enable = 1,
75 .ocpin = OC1,
76 .tx_bias = USB2_BIAS_0MV,
77 .tx_emp_enable = USB2_PRE_EMP_ON,
78 .pre_emp_bias = USB2_BIAS_11P25MV,
79 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
80 }" # Type-A Port A0
81 register "usb2_ports[2]" = "{
82 .enable = 1,
83 .ocpin = OC2,
84 .tx_bias = USB2_BIAS_0MV,
85 .tx_emp_enable = USB2_PRE_EMP_ON,
86 .pre_emp_bias = USB2_BIAS_11P25MV,
87 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
88 }" # Type-A Port A1
89 register "usb2_ports[3]" = "{
90 .enable = 1,
91 .ocpin = OC3,
92 .tx_bias = USB2_BIAS_0MV,
93 .tx_emp_enable = USB2_PRE_EMP_ON,
94 .pre_emp_bias = USB2_BIAS_11P25MV,
95 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
96 }" # Type-A Port A2
97 register "usb2_ports[4]" = "{
98 .enable = 1,
99 .ocpin = OC0,
100 .tx_bias = USB2_BIAS_0MV,
101 .tx_emp_enable = USB2_PRE_EMP_ON,
102 .pre_emp_bias = USB2_BIAS_11P25MV,
103 .pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
104 }" # Type-A Port A3
105 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303
107 register "usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3/2 Type-C Port C1
108 register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2
109 register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A3
111 device domain 0 on
112 device pci 04.0 on
113 chip drivers/intel/dptf
114 ## Passive Policy
115 register "policies.passive" = "{
116 [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
117 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
118 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 75, 15000),
119 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 55, 15000)
122 ## Critical Policy
123 register "policies.critical" = "{
124 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
125 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
126 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN),
127 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 80, SHUTDOWN)
130 register "controls.power_limits" = "{
131 .pl1 = {
132 .min_power = 3000,
133 .max_power = 6000,
134 .time_window_min = 1 * MSECS_PER_SEC,
135 .time_window_max = 1 * MSECS_PER_SEC,
136 .granularity = 100,
138 .pl2 = {
139 .min_power = 20000,
140 .max_power = 20000,
141 .time_window_min = 1 * MSECS_PER_SEC,
142 .time_window_max = 1 * MSECS_PER_SEC,
143 .granularity = 1000,
147 register "options.tsr[0].desc" = ""Memory""
148 register "options.tsr[1].desc" = ""Power""
149 register "options.tsr[2].desc" = ""Chassis""
151 ## Charger Performance Control (Control, mA)
152 register "controls.charger_perf" = "{
153 [0] = { 255, 3000 },
154 [1] = { 24, 1500 },
155 [2] = { 16, 1000 },
156 [3] = { 8, 500 }
159 device generic 0 on end
161 end # SA Thermal device
162 device pci 14.0 on
163 chip drivers/usb/acpi
164 device usb 0.0 on
165 chip drivers/usb/acpi
166 register "desc" = ""USB2 Type-C Port C0""
167 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
168 register "group" = "ACPI_PLD_GROUP(1, 1)"
169 device usb 2.0 on end
171 chip drivers/usb/acpi
172 register "desc" = ""USB2 Type-A Port A0""
173 register "type" = "UPC_TYPE_A"
174 register "group" = "ACPI_PLD_GROUP(1, 2)"
175 device usb 2.1 on end
177 chip drivers/usb/acpi
178 register "desc" = ""USB2 Type-A Port A1""
179 register "type" = "UPC_TYPE_A"
180 register "group" = "ACPI_PLD_GROUP(1, 3)"
181 device usb 2.2 on end
183 chip drivers/usb/acpi
184 register "desc" = ""USB2 Type-A Port A2""
185 register "type" = "UPC_TYPE_A"
186 register "group" = "ACPI_PLD_GROUP(1, 4)"
187 device usb 2.3 on end
189 chip drivers/usb/acpi
190 register "desc" = ""USB2 Type-A Port A3""
191 register "type" = "UPC_TYPE_A"
192 register "group" = "ACPI_PLD_GROUP(1, 5)"
193 device usb 2.4 on end
195 chip drivers/usb/acpi
196 register "desc" = ""USB3 Type-C Port C0""
197 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
198 register "group" = "ACPI_PLD_GROUP(1, 1)"
199 device usb 3.0 on end
201 chip drivers/usb/acpi
202 device usb 3.1 off end
204 chip drivers/usb/acpi
205 register "desc" = ""USB3 Type-A Port A0""
206 register "type" = "UPC_TYPE_USB3_A"
207 register "group" = "ACPI_PLD_GROUP(1, 2)"
208 device usb 3.2 on end
210 chip drivers/usb/acpi
211 register "desc" = ""USB3 Type-A Port A1""
212 register "type" = "UPC_TYPE_USB3_A"
213 register "group" = "ACPI_PLD_GROUP(1, 3)"
214 device usb 3.3 on end
216 chip drivers/usb/acpi
217 register "desc" = ""USB3 Type-A Port A3""
218 register "type" = "UPC_TYPE_USB3_A"
219 register "group" = "ACPI_PLD_GROUP(1, 5)"
220 device usb 3.4 on end
222 chip drivers/usb/acpi
223 register "desc" = ""USB3 Type-A Port A2""
224 register "type" = "UPC_TYPE_USB3_A"
225 register "group" = "ACPI_PLD_GROUP(1, 4)"
226 device usb 3.5 on end
230 end # USB xHCI
231 device pci 15.0 off end # I2C 0
232 device pci 15.1 off end # I2C 1
233 device pci 15.2 off end # I2C 2
234 device pci 15.3 off end # I2C 3
235 device pci 19.0 on
236 chip drivers/i2c/generic
237 register "hid" = ""RTL5682""
238 register "name" = ""RT58""
239 register "desc" = ""Realtek RT5682""
240 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)"
241 register "property_count" = "1"
242 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
243 register "property_list[0].name" = ""realtek,jd-src""
244 register "property_list[0].integer" = "1"
245 device i2c 1a on end
247 end # I2C 4
248 device pci 1c.2 on
249 chip drivers/net
250 register "customized_leds" = "0x05af"
251 register "wake" = "GPE0_DW0_03" # GPP_B3
252 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
253 register "device_index" = "0"
254 device pci 00.0 on end
256 end # PCI Express Root Port 3 - RTL8111H LAN
257 device pci 1c.6 on
258 chip drivers/wifi/generic
259 register "wake" = "GPE0_DW2_03"
260 device pci 00.0 on end
262 end # PCI Express Root Port 7 - WLAN
263 device pci 1c.7 off end # PCI Express Root Port 8
264 device pci 1f.3 on end # Intel HDA