mb/google/fatcat: Suppress unnecessary extra space in device trees
[coreboot2.git] / src / mainboard / google / hatch / dsdt.asl
blob489ea2fa59fc2a0761302930452f04074276e7c7
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <variant/ec.h>
5 #include <variant/gpio.h>
7 DefinitionBlock(
8         "dsdt.aml",
9         "DSDT",
10         ACPI_DSDT_REV_2,
11         OEM_ID,
12         ACPI_TABLE_CREATOR,
13         0x20110725
16         #include <acpi/dsdt_top.asl>
17         #include <soc/intel/common/block/acpi/acpi/platform.asl>
18         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
19         #include <cpu/intel/common/acpi/cpu.asl>
21         Scope (\_SB) {
22                 Device (PCI0)
23                 {
24                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
25                         #include <soc/intel/cannonlake/acpi/southbridge.asl>
26                         #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
27                 }
28         }
30         #include <southbridge/intel/common/acpi/sleepstates.asl>
32         /* ChromeOS Embedded Controller */
33         Scope (\_SB.PCI0.LPCB)
34         {
35                 /* ACPI code for EC SuperIO functions */
36                 #include <ec/google/chromeec/acpi/superio.asl>
37                 /* ACPI code for EC functions */
38                 #include <ec/google/chromeec/acpi/ec.asl>
39         }
41         /* Dynamic Platform Thermal Framework */
42         Scope (\_SB)
43         {
44                 /* Per board variant specific definitions. */
45                 #include <variant/acpi/dptf.asl>
46                 /* Include common dptf ASL files */
47                 #include <soc/intel/common/acpi/dptf/dptf.asl>
48         }