src/mainboard/google/octopus/smihandler.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <baseboard/variants.h>
   4 #include <cpu/x86/smm.h>
   5 #include <delay.h>
   6 #include <ec/google/chromeec/ec.h>
   7 #include <ec/google/chromeec/smm.h>
   8 #include <elog.h>
   9 #include <gpio.h>
  10 #include <intelblocks/smihandler.h>
  11 #include <soc/pm.h>
  12 #include <variant/ec.h>
  13 #include <variant/gpio.h>
  14
  15 struct gpio_with_delay {
  16         gpio_t gpio;
  17         unsigned int delay_msecs;
  18 };
  19
  20 void mainboard_smi_gpi_handler(const struct gpi_status *sts)
  21 {
  22         if (gpi_status_get(sts, EC_SMI_GPI))
  23                 chromeec_smi_process_events();
  24 }
  25
  26 void mainboard_smi_sleep(u8 slp_typ)
  27 {
  28         const struct pad_config *pads;
  29         size_t num;
  30
  31         pads = variant_sleep_gpio_table(&num, slp_typ);
  32         gpio_configure_pads(pads, num);
  33
  34         variant_smi_sleep(slp_typ);
  35
  36         chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
  37                                 MAINBOARD_EC_S5_WAKE_EVENTS);
  38 }
  39
  40 int mainboard_smi_apmc(u8 apmc)
  41 {
  42         chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
  43                                 MAINBOARD_EC_SMI_EVENTS);
  44         return 0;
  45 }
  46
  47 void mainboard_smi_espi_handler(void)
  48 {
  49         chromeec_smi_process_events();
  50 }
  51
  52 void elog_gsmi_cb_mainboard_log_wake_source(void)
  53 {
  54         google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS |
  55                                         MAINBOARD_EC_S0IX_WAKE_EVENTS);
  56 }
  57
  58 void __weak variant_smi_sleep(u8 slp_typ)
  59 {
  60         /* Leave for the variant to implement if necessary. */
  61 }
  62
  63 void power_off_lte_module(void)
  64 {
  65         const struct gpio_with_delay lte_power_off_gpios[] = {
  66                 {
  67                         GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
  68                         30,
  69                 },
  70                 {
  71                         GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
  72                         100
  73                 },
  74                 {
  75                         GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
  76                         0
  77                 }
  78         };
  79
  80         for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) {
  81                 gpio_output(lte_power_off_gpios[i].gpio, 0);
  82                 mdelay(lte_power_off_gpios[i].delay_msecs);
  83         }
  84 }