src/mainboard/google/reef/variants/sand/devicetree.cb

   1 chip soc/intel/apollolake
   2
   3         register "pcie_rp_clkreq_pin[0]" = "0"    # wifi/bt
   4         # Disable unused clkreq of PCIe root ports
   5         register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"
   6         register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
   7         register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
   8         register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
   9         register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
  10
  11         # GPIO for PERST_0
  12         # If the Board has PERST_0 signal, assign the GPIO
  13         # If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
  14         register "prt0_gpio" = "GPIO_122"
  15
  16         # EMMC TX DATA Delay 1
  17         # Refer to EDS-Vol2-22.3.
  18         # [14:8] steps of delay for HS400, each 125ps.
  19         # [6:0] steps of delay for SDR104/HS200, each 125ps.
  20         register "emmc_tx_data_cntl1" = "0x0C16"
  21
  22         # EMMC TX DATA Delay 2
  23         # Refer to EDS-Vol2-22.3.
  24         # [30:24] steps of delay for SDR50, each 125ps.
  25         # [22:16] steps of delay for DDR50, each 125ps.
  26         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  27         # [6:0] steps of delay for SDR12, each 125ps.
  28         register "emmc_tx_data_cntl2" = "0x28162828"
  29
  30         # EMMC RX CMD/DATA Delay 1
  31         # Refer to EDS-Vol2-22.3.
  32         # [30:24] steps of delay for SDR50, each 125ps.
  33         # [22:16] steps of delay for DDR50, each 125ps.
  34         # [14:8] steps of delay for SDR25/HS50, each 125ps.
  35         # [6:0] steps of delay for SDR12, each 125ps.
  36         register "emmc_rx_cmd_data_cntl1" = "0x00181717"
  37
  38         # EMMC RX CMD/DATA Delay 2
  39         # Refer to EDS-Vol2-22.3.
  40         # [17:16] stands for Rx Clock before Output Buffer
  41         # [14:8] steps of delay for Auto Tuning Mode, each 125ps.
  42         # [6:0] steps of delay for HS200, each 125ps.
  43         register "emmc_rx_cmd_data_cntl2" = "0x10008"
  44
  45         # Enable DPTF
  46         register "dptf_enable" = "1"
  47
  48         # PL1 override 12 W: the energy calculation is wrong with the
  49         # current VR solution. Experiments show that SoC TDP max (6W) can
  50         # be reached when RAPL PL1 is set to 12W.
  51         # Set RAPL PL2 to 15W.
  52         register "power_limits_config" = "{
  53                 .tdp_pl1_override = 12,
  54                 .tdp_pl2_override = 15,
  55         }"
  56
  57         # Enable Audio Clock and Power gating
  58         register "hdaudio_clk_gate_enable" = "1"
  59         register "hdaudio_pwr_gate_enable" = "1"
  60         register "hdaudio_bios_config_lockdown" = "1"
  61
  62         # Enable lpss s0ix
  63         register "lpss_s0ix_enable" = "true"
  64
  65         # GPE configuration
  66         # Note that GPE events called out in ASL code rely on this
  67         # route, i.e., if this route changes then the affected GPE
  68         # offset bits also need to be changed. This sets the PMC register
  69         # GPE_CFG fields.
  70         register "gpe0_dw1" = "PMC_GPE_N_31_0"
  71         register "gpe0_dw2" = "PMC_GPE_N_63_32"
  72         register "gpe0_dw3" = "PMC_GPE_SW_31_0"
  73
  74         # Intel Common SoC Config
  75         #+-------------------+---------------------------+
  76         #| Field             |  Value                    |
  77         #+-------------------+---------------------------+
  78         #| I2C0              | Audio                     |
  79         #| I2C2              | TPM                       |
  80         #| I2C3              | Touchscreen               |
  81         #| I2C4              | Trackpad                  |
  82         #| I2C5              | Digitizer                 |
  83         #+-------------------+---------------------------+
  84         register "common_soc_config" = "{
  85                 .i2c[0] = {
  86                         .speed = I2C_SPEED_FAST,
  87                         .rise_time_ns = 104,
  88                         .fall_time_ns = 52,
  89                 },
  90                 .i2c[2] = {
  91                         .early_init = 1,
  92                         .speed = I2C_SPEED_FAST,
  93                         .rise_time_ns = 57,
  94                         .fall_time_ns = 28,
  95                 },
  96                 .i2c[3] = {
  97                         .speed = I2C_SPEED_FAST,
  98                         .rise_time_ns = 76,
  99                         .fall_time_ns = 164,
 100                 },
 101                 .i2c[4] = {
 102                         .speed = I2C_SPEED_FAST,
 103                         .rise_time_ns = 114,
 104                         .fall_time_ns = 164,
 105                 },
 106                 .i2c[5] = {
 107                         .speed = I2C_SPEED_FAST,
 108                         .rise_time_ns = 152,
 109                         .fall_time_ns = 30,
 110                 },
 111         }"
 112
 113         # Minimum SLP S3 assertion width 28ms.
 114         register "slp_s3_assertion_width_usecs" = "28000"
 115
 116         device domain 0 on
 117                 device pci 00.0 on  end # - Host Bridge
 118                 device pci 00.1 on  end # - DPTF
 119                 device pci 00.2 off end # - NPK
 120                 device pci 02.0 on      # - Gen
 121                         register "gfx" = "GMA_DEFAULT_PANEL(0)"
 122                 end
 123                 device pci 03.0 off end # - Iunit
 124                 device pci 0d.0 on  end # - P2SB
 125                 device pci 0d.1 on  end # - PMC
 126                 device pci 0d.2 on  end # - SPI
 127                 device pci 0d.3 on  end # - Shared SRAM
 128                 device pci 0e.0 on      # - Audio
 129                         chip drivers/generic/max98357a
 130                                 register "hid" = ""MX98357A""
 131                                 register "sdmode_gpio" =  "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
 132                                 register "sdmode_delay" = "5"
 133                                 device generic 0 on end
 134                         end
 135                 end
 136                 device pci 0f.0 on  end # - CSE
 137                 device pci 11.0 off end # - ISH
 138                 device pci 12.0 off end # - SATA
 139                 device pci 13.0 off end # - Root Port 2 - PCIe-A 0
 140                 device pci 13.1 off end # - Root Port 3 - PCIe-A 1
 141                 device pci 13.2 off end # - Root Port 4 - PCIe-A 2
 142                 device pci 13.3 off end # - Root Port 5 - PCIe-A 3
 143                 device pci 14.0 on
 144                         chip drivers/wifi/generic
 145                                 register "wake" = "GPE0_DW3_00"
 146                                 device pci 00.0 on end
 147                         end
 148                 end     # - Root Port 0 - PCIe-B 0 - Wifi
 149                 device pci 14.1 off end # - Root Port 1 - PCIe-B 1
 150                 device pci 15.0 on  end # - XHCI
 151                 device pci 15.1 off end # - XDCI
 152                 device pci 16.0 on      # - I2C 0
 153                         chip drivers/i2c/da7219
 154                                 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_116_IRQ)"
 155                                 register "btn_cfg" = "50"
 156                                 register "mic_det_thr" = "200"
 157                                 register "jack_ins_deb" = "20"
 158                                 register "jack_det_rate" = ""32ms_64ms""
 159                                 register "jack_rem_deb" = "1"
 160                                 register "a_d_btn_thr" = "0xa"
 161                                 register "d_b_btn_thr" = "0x16"
 162                                 register "b_c_btn_thr" = "0x21"
 163                                 register "c_mic_btn_thr" = "0x3e"
 164                                 register "btn_avg" = "4"
 165                                 register "adc_1bit_rpt" = "1"
 166                                 register "micbias_lvl" = "2600"
 167                                 register "mic_amp_in_sel" = ""diff""
 168                                 device i2c 1a on end
 169                         end
 170                 end
 171                 device pci 16.1 on  end # - I2C 1
 172                 device pci 16.2 on
 173                         chip drivers/i2c/tpm
 174                                 register "hid" = ""GOOG0005""
 175                                 register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_28_IRQ)"
 176                                 device i2c 50 on end
 177                         end
 178                 end     # - I2C 2
 179                 device pci 16.3 on
 180                         chip drivers/i2c/generic
 181                                 register "hid" = ""RAYD0001""
 182                                 register "desc" = ""Raydium Touchscreen""
 183                                 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_21_IRQ)"
 184                                 register "detect" = "1"
 185                                 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)"
 186                                 register "reset_delay_ms" = "20"
 187                                 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
 188                                 register "enable_delay_ms" = "1"
 189                                 register "has_power_resource" = "1"
 190                                 device i2c 39 on end
 191                         end
 192                 end     # - I2C 3
 193                 device pci 17.0 on
 194                         chip drivers/i2c/generic
 195                                 register "hid" = ""ELAN0000""
 196                                 register "desc" = ""ELAN Touchpad""
 197                                 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_18_IRQ)"
 198                                 register "wake" = "GPE0_DW1_15"
 199                                 register "detect" = "1"
 200                                 device i2c 15 on end
 201                         end
 202                 end # - I2C 4
 203                 device pci 17.1 on
 204                         chip drivers/i2c/hid
 205                                 register "generic.hid" = ""WCOM50C1""
 206                                 register "generic.desc" = ""WCOM Digitizer""
 207                                 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_13_IRQ)"
 208                                 register "hid_desc_reg_offset" = "0x1"
 209                                 device i2c 0x9 on end
 210                         end
 211                 end     # - I2C 5
 212                 device pci 17.2 off end # - I2C 6
 213                 device pci 17.3 off end # - I2C 7
 214                 device pci 18.0 on  end # - UART 0
 215                 device pci 18.1 on  end # - UART 1
 216                 device pci 18.2 on  end # - UART 2
 217                 device pci 18.3 off end # - UART 3
 218                 device pci 19.0 on  end # - SPI 0
 219                 device pci 19.1 off end # - SPI 1
 220                 device pci 19.2 off end # - SPI 2
 221                 device pci 1a.0 on  end # - PWM
 222                 device pci 1b.0 on  end # - SDCARD
 223                 device pci 1c.0 on  end # - eMMC
 224                 device pci 1e.0 off end # - SDIO
 225                 device pci 1f.0 on      # - LPC
 226                         chip ec/google/chromeec
 227                                 device pnp 0c09.0 on end
 228                         end
 229                 end
 230                 device pci 1f.1 on  end # - SMBUS
 231         end
 232 end