libpayload: configs: Add new config.featuretest to broaden CI
[coreboot2.git] / src / mainboard / google / skyrim / variants / winterhold / overridetree.cb
blob490b415a7644bdd43edaad10be7ef5540ba43359
1 # SPDX-License-Identifier: GPL-2.0-or-later
2 fw_config
3 field FP 0
4 option FP_ABSENT 0
5 option FP_PRESENT 1
6 end
7 end
9 chip soc/amd/mendocino
11 # Set DPTC multi-profile common parameters
13 # Refer the spec "FT6 Infrastructure Roadmap"#57316
14 # Set system_configuration to 3 for 15W. Spec lists 4 for 15W,
15 # however, setting to 3 will avoid an additional communication
16 # with the SMU and save boot time.
17 register "system_configuration" = "3"
18 register "thermctl_limit_degreeC" = "97"
20 register "stt_control" = "1"
21 register "stt_pcb_sensor_count" = "2"
22 register "stt_alpha_apu" = "0x6666"
23 register "stt_error_coeff" = "0x38"
24 register "stt_error_rate_coefficient" = "0xB44"
26 # These registers are defined in AMD DevHub document #57316.
27 # Normal
28 register "vrm_current_limit_mA" = "28000"
29 register "vrm_maximum_current_limit_mA" = "50000"
30 register "vrm_soc_current_limit_mA" = "10000"
31 # Throttle (e.g., Low/No Battery)
32 register "vrm_current_limit_throttle_mA" = "20000"
33 register "vrm_maximum_current_limit_throttle_mA" = "20000"
34 register "vrm_soc_current_limit_throttle_mA" = "10000"
36 # Set Dynamic DPTC thermal profile Table A (Default)
37 register "fast_ppt_limit_mW" = "30000"
38 register "slow_ppt_limit_mW" = "25000"
39 register "slow_ppt_time_constant_s" = "5"
41 register "stt_min_limit" = "15000"
42 register "stt_m1" = "0xAE"
43 register "stt_m2" = "0xB8F"
44 register "stt_c_apu" = "0xC13B"
45 register "stt_skin_temp_apu" = "0x3000"
47 # Set Dynamic DPTC thermal profile confiuration. Table B
48 register "fast_ppt_limit_mW_B" = "15000"
49 register "slow_ppt_limit_mW_B" = "15000"
50 register "slow_ppt_time_constant_s_B" = "5"
52 register "stt_min_limit_B" = "10500"
53 register "stt_m1_B" = "0xAE"
54 register "stt_m2_B" = "0xB8F"
55 register "stt_c_apu_B" = "0xC13B"
56 register "stt_skin_temp_apu_B" = "0x3000"
58 # Set Dynamic DPTC thermal profile confiuration. Table C
59 register "fast_ppt_limit_mW_C" = "30000"
60 register "slow_ppt_limit_mW_C" = "25000"
61 register "slow_ppt_time_constant_s_C" = "5"
63 register "stt_min_limit_C" = "15000"
64 register "stt_m1_C" = "0x129"
65 register "stt_m2_C" = "0xAF6"
66 register "stt_c_apu_C" = "0xC3D2"
67 register "stt_skin_temp_apu_C" = "0x3000"
69 # Set Dynamic DPTC thermal profile confiuration. Table D
70 register "fast_ppt_limit_mW_D" = "15000"
71 register "slow_ppt_limit_mW_D" = "15000"
72 register "slow_ppt_time_constant_s_D" = "5"
74 register "stt_min_limit_D" = "10500"
75 register "stt_m1_D" = "0x129"
76 register "stt_m2_D" = "0xAF6"
77 register "stt_c_apu_D" = "0xC3D2"
78 register "stt_skin_temp_apu_D" = "0x3000"
80 # Set Dynamic DPTC thermal profile confiuration. Table E
81 register "fast_ppt_limit_mW_E" = "24000"
82 register "slow_ppt_limit_mW_E" = "20000"
83 register "slow_ppt_time_constant_s_E" = "5"
85 register "stt_min_limit_E" = "12000"
86 register "stt_m1_E" = "0xAE"
87 register "stt_m2_E" = "0xB8F"
88 register "stt_c_apu_E" = "0xC13B"
89 register "stt_skin_temp_apu_E" = "0x2F00"
92 # Set Dynamic DPTC thermal profile confiuration. Table F
93 register "fast_ppt_limit_mW_F" = "12000"
94 register "slow_ppt_limit_mW_F" = "12000"
95 register "slow_ppt_time_constant_s_F" = "5"
97 register "stt_min_limit_F" = "8000"
98 register "stt_m1_F" = "0xAE"
99 register "stt_m2_F" = "0xB8F"
100 register "stt_c_apu_F" = "0xC13B"
101 register "stt_skin_temp_apu_F" = "0x2F00"
103 register "i2c[0]" = "{
104 .speed = I2C_SPEED_FAST,
105 .speed_config[0] = {
106 .speed = I2C_SPEED_FAST,
107 .scl_hcnt = 107,
108 .scl_lcnt = 230,
109 .sda_hold = 100
113 device domain 0 on
115 register "dxio_tx_vboost_enable" = "1"
117 # The unit is set to one per ms
118 register "edp_panel_t8_ms" = "112"
119 register "edp_panel_t9_ms" = "8"
121 device ref gpp_bridge_1 on
122 # Required so the NVMe gets placed into D3 when entering S0i3.
123 chip drivers/pcie/rtd3/device
124 register "name" = ""NVME""
125 device pci 00.0 on end
127 end # eMMC
128 device ref gpp_bridge_2 on
129 # Required so the NVMe gets placed into D3 when entering S0i3.
130 chip drivers/pcie/rtd3/device
131 register "name" = ""NVME""
132 device pci 00.0 on end
134 end # NVMe
136 device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
137 device ref xhci_1 on # XHCI1 controller
138 chip drivers/usb/acpi
139 device ref xhci_1_root_hub on # XHCI1 root hub
140 chip drivers/usb/acpi
141 register "desc" = ""USB3 Type-A Port A0 (MLB)""
142 register "type" = "UPC_TYPE_USB3_A"
143 register "use_custom_pld" = "true"
144 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
145 device ref usb3_port3 on end # USB 3.1 port3
147 chip drivers/usb/acpi
148 register "desc" = ""USB2 Type-A Port A0 (MLB)""
149 register "type" = "UPC_TYPE_USB3_A"
150 register "use_custom_pld" = "true"
151 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
152 device ref usb2_port3 on end # USB 2 port3
154 end # XHCI1 root hub
156 end # XHCI1 controller
157 end # Internal GPP Bridge 0 to Bus A
158 end # domain
160 device ref i2c_0 on
161 chip drivers/i2c/generic
162 register "hid" = ""ELAN0000""
163 register "desc" = ""ELAN Touchpad""
164 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)"
165 register "wake" = "GEVENT_20"
166 register "detect" = "1"
167 device i2c 15 on end
169 chip drivers/i2c/hid
170 register "generic.hid" = ""GXTP7863""
171 register "generic.desc" = ""Goodix Touchpad""
172 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)"
173 register "generic.wake" = "GEVENT_20"
174 register "generic.detect" = "1"
175 register "hid_desc_reg_offset" = "0x20"
176 device i2c 2c on end
178 end # I2C0
179 device ref i2c_1 on
180 chip drivers/i2c/hid
181 register "generic.hid" = ""ELAN900C""
182 register "generic.desc" = ""ELAN Touchscreen""
183 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_29)"
184 register "generic.detect" = "1"
185 register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)"
186 register "generic.enable_delay_ms" = "10"
187 register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)"
188 register "generic.reset_off_delay_ms" = "1"
189 register "generic.reset_delay_ms" = "10"
190 register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
191 register "generic.stop_delay_ms" = "150"
192 register "generic.stop_off_delay_ms" = "1"
193 register "generic.has_power_resource" = "1"
194 register "hid_desc_reg_offset" = "0x01"
195 device i2c 10 on end
197 chip drivers/i2c/generic
198 register "hid" = ""MLFS0000""
199 register "desc" = ""Melfas Touchscreen""
200 register "detect" = "1"
201 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_29)"
202 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_131)"
203 register "enable_delay_ms" = "1"
204 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_136)"
205 register "reset_delay_ms" = "20"
206 register "reset_off_delay_ms" = "2"
207 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
208 register "stop_off_delay_ms" = "2"
209 register "has_power_resource" = "1"
210 device i2c 34 on end
212 end # I2C1
213 device ref i2c_2 on
214 chip drivers/i2c/generic
215 register "hid" = ""RTL5682""
216 register "name" = ""RT58""
217 register "desc" = ""Realtek RT5682""
218 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)"
219 register "property_count" = "1"
220 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
221 register "property_list[0].name" = ""realtek,jd-src""
222 register "property_list[0].integer" = "1"
223 device i2c 1a on end
225 chip drivers/i2c/generic
226 register "hid" = ""10EC1019""
227 register "desc" = ""Realtek SPK AMP R""
228 register "uid" = "1"
229 device i2c 29 on end
231 chip drivers/i2c/generic
232 register "hid" = ""10EC1019""
233 register "desc" = ""Realtek SPK AMP L""
234 register "uid" = "2"
235 register "probed" = "1"
236 device i2c 2a on end
238 end # I2C2
240 device ref uart_1 on
241 chip drivers/uart/acpi
242 register "name" = ""CRFP""
243 register "desc" = ""Fingerprint Reader""
244 register "hid" = "ACPI_DT_NAMESPACE_HID"
245 register "compat_string" = ""google,cros-ec-uart""
246 register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_24)"
247 register "wake" = "GEVENT_15"
248 register "uart" = "ACPI_UART_RAW_DEVICE(3000000, 64)"
249 register "has_power_resource" = "1"
250 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_12)"
251 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_4)"
252 register "enable_delay_ms" = "3"
253 device generic 0 alias fpmcu on
254 probe FP FP_PRESENT
257 end # UART1
259 end # chip soc/amd/mendocino