soc/intel/xeon_sp: Allow OS to control LTR and AER
[coreboot2.git] / src / mainboard / google / slippy / variants / wolf / Makefile.mk
blobcd38d980518f18d11e3ab6f8a6e765c7ee0fd3a1
1 ## SPDX-License-Identifier: GPL-2.0-only
3 # Order of names in SPD_SOURCES is important!
4 SPD_SOURCES = Micron_4KTF25664HZ # 0: 4GB / CH0 + CH1
5 SPD_SOURCES += Hynix_HMT425S6AFR6A # 1: 4GB / CH0 + CH1
6 SPD_SOURCES += Samsung_K4B4G1646B # 2: 4GB / CH0 + CH1
7 SPD_SOURCES += Micron_4KTF25664HZ # 3: 2GB / CH0
8 SPD_SOURCES += Hynix_HMT425S6AFR6A # 4: 2GB / CH0
9 SPD_SOURCES += Samsung_K4B4G1646B # 4: 2GB / CH0
11 LIB_SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex)