soc/intel/xeon_sp: Allow OS to control LTR and AER
[coreboot2.git] / src / mainboard / google / stout / mainboard.c
blobe1ea7c265fc2a44ca6d203e9768b049498da5d26
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <device/device.h>
4 #include <device/pci_ops.h>
5 #include <drivers/intel/gma/int15.h>
6 #include <acpi/acpi.h>
7 #include <southbridge/intel/bd82x6x/pch.h>
8 #include <ec/quanta/it8518/ec.h>
10 #include "ec.h"
11 #include "onboard.h"
13 void mainboard_suspend_resume(void)
15 /* Stout EC needs to be put back in ACPI mode */
16 ec_write_cmd(EC_CMD_NOTIFY_ACPI_ENTER);
19 static void mainboard_init(struct device *dev)
21 struct device *ethernet_dev = NULL;
23 /* Initialize the Embedded Controller */
24 stout_ec_init();
27 * Battery life time - LAN PCIe should enter ASPM L1 to save
28 * power when LAN connection is idle.
29 * enable CLKREQ: LAN pci config space 0x81h=01
31 ethernet_dev = dev_find_device(STOUT_NIC_VENDOR_ID,
32 STOUT_NIC_DEVICE_ID, dev);
34 if (ethernet_dev != NULL)
35 pci_write_config8(ethernet_dev, 0x81, 0x01);
38 static void mainboard_enable(struct device *dev)
40 dev->ops->init = mainboard_init;
41 install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
44 struct chip_operations mainboard_ops = {
45 .enable_dev = mainboard_enable,