soc/intel/xeon_sp: Allow OS to control LTR and AER
[coreboot2.git] / src / mainboard / google / trogdor / Makefile.mk
blob16afd03234fc3b36e19d406d5cfb446e8c0afdfa
1 ## SPDX-License-Identifier: GPL-2.0-only
3 bootblock-y += boardid.c
4 bootblock-y += chromeos.c
5 bootblock-y += bootblock.c
7 ifneq ($(CONFIG_BOARD_GOOGLE_BUBS),y)
8 verstage-y += reset.c
9 endif
10 verstage-y += boardid.c
11 verstage-y += chromeos.c
13 romstage-y += romstage.c
14 romstage-y += boardid.c
15 romstage-y += chromeos.c
16 ifneq ($(CONFIG_BOARD_GOOGLE_BUBS),y)
17 romstage-y += reset.c
18 endif
20 ramstage-y += mainboard.c
21 ifneq ($(CONFIG_BOARD_GOOGLE_BUBS),y)
22 ramstage-y += reset.c
23 endif
24 ramstage-y += chromeos.c
25 ramstage-y += boardid.c