soc/mediatek/mt8196: Initialize SSPM
[coreboot2.git] / src / mainboard / intel / emeraldlake2 / devicetree.cb
blobe547ff111f0907b696abc25b3562d86433b50b96
1 chip northbridge/intel/sandybridge
2 # IGD Displays
3 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
5 # Enable DisplayPort 1 Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
8 # Enable DisplayPort 0 Hotplug with 6ms pulse
9 register "gpu_dp_c_hotplug" = "0x06"
11 # Enable DVI Hotplug with 6ms pulse
12 register "gpu_dp_b_hotplug" = "0x06"
14 register "max_mem_clock_mhz" = "800"
15 register "spd_addresses" = "{0x50, 0, 0x52, 0}"
17 chip cpu/intel/model_206ax
18 device cpu_cluster 0 on end
20 register "acpi_c1" = "CPU_ACPI_C3"
21 register "acpi_c2" = "CPU_ACPI_C6"
22 end
24 device domain 0 on
25 device ref host_bridge on end # host bridge
26 device ref igd on end # vga controller
28 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
29 # GPI routing
30 # 0 No effect (default)
31 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
32 # 2 SCI (if corresponding GPIO_EN bit is also set)
33 register "gpi1_routing" = "1"
34 register "gpi14_routing" = "2"
35 register "alt_gp_smi_en" = "0x0002"
36 register "gpe0_en" = "0x4000"
38 register "sata_port_map" = "0x3f"
40 register "gen1_dec" = "0x00fc1601"
41 # runtime_port registers
42 register "gen2_dec" = "0x000c0181"
43 # SuperIO range is 0x700-0x73f
44 register "gen3_dec" = "0x003c0701"
45 register "usb_port_config" = "{
46 { 1, 0, 0 }, /* P0: Front port (OC0) */
47 { 1, 0, 1 }, /* P1: Back port (OC1) */
48 { 1, 0, -1 }, /* P2: MINIPCIE1 (no OC) */
49 { 1, 0, -1 }, /* P3: MMC (no OC) */
50 { 1, 0, 2 }, /* P4: Front port (OC2) */
51 { 0, 0, -1 }, /* P5: Empty */
52 { 0, 0, -1 }, /* P6: Empty */
53 { 0, 0, -1 }, /* P7: Empty */
54 { 1, 0, 4 }, /* P8: Back port (OC4) */
55 { 1, 0, -1 }, /* P9: MINIPCIE3 (no OC) */
56 { 1, 0, -1 }, /* P10: BLUETOOTH (no OC) */
57 { 0, 0, -1 }, /* P11: Empty */
58 { 1, 0, 6 }, /* P12: Back port (OC6) */
59 { 1, 0, 5 }, /* P13: Back port (OC5) */
62 device ref mei1 on end # Management Engine Interface 1
63 device ref mei2 off end # Management Engine Interface 2
64 device ref me_ide_r off end # Management Engine IDE-R
65 device ref me_kt off end # Management Engine KT
66 device ref gbe off end # Intel Gigabit Ethernet
67 device ref ehci2 on end # USB2 EHCI #2
68 device ref hda on end # High Definition Audio
69 device ref pcie_rp1 on end # PCIe Port #1 (WLAN)
70 device ref pcie_rp2 off end # PCIe Port #2
71 device ref pcie_rp3 on end # PCIe Port #3 (Debug)
72 device ref pcie_rp4 on end # PCIe Port #4 (LAN)
73 device ref pcie_rp5 off end # PCIe Port #5
74 device ref pcie_rp6 off end # PCIe Port #6
75 device ref pcie_rp7 off end # PCIe Port #7
76 device ref pcie_rp8 off end # PCIe Port #8
77 device ref ehci1 on end # USB2 EHCI #1
78 device ref pci_bridge off end # PCI bridge
79 device ref lpc on end # LPC bridge
80 device ref sata1 on end # SATA Controller 1
81 device ref smbus on end # SMBus
82 device ref sata2 off end # SATA Controller 2
83 device ref thermal on end # Thermal
84 end
85 end
86 end