ec/google/chromeec: Define ACPI_NOTIFY_CROS_EC_MKBP constant
[coreboot2.git] / src / mainboard / lenovo / x220 / variants / x1 / overridetree.cb
blobcb1d125359543f1dd4cd535d015a7f85eceb49fa
1 chip northbridge/intel/sandybridge
3 register "gpu_dp_b_hotplug" = "0x04"
4 register "gpu_dp_c_hotplug" = "0x04"
5 register "gpu_dp_d_hotplug" = "0x04"
6 register "gpu_panel_power_cycle_delay" = "3"
7 register "gpu_panel_power_up_delay" = "250" # T1+T2: 25ms
8 register "gpu_panel_power_down_delay" = "250" # T5+T6: 35ms
9 register "gpu_panel_power_backlight_on_delay" = "2500" # T3: 250ms
10 register "gpu_panel_power_backlight_off_delay" = "2500" # T4: 250ms
12 register "gpu_cpu_backlight" = "0x1312"
13 register "gpu_pch_backlight" = "0x13121312"
15 device domain 0 on
16 subsystemid 0x17aa 0x21e8 inherit
18 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
19 register "usb_port_config" = "{
20 { 1, 1, 0 },
21 { 1, 1, 1 },
22 { 1, 1, 3 },
23 { 1, 0, 3 },
24 { 1, 0, 3 },
25 { 1, 1, 3 },
26 { 0, 0, 3 },
27 { 0, 0, 3 },
28 { 1, 1, 4 },
29 { 1, 1, 5 },
30 { 1, 0, 7 },
31 { 1, 1, 7 },
32 { 1, 1, 7 },
33 { 1, 0, 7 }
35 # Enable SATA ports 0 (HDD bay) & 2 (msata) & 3 (esatap)
36 register "sata_port_map" = "0x1d"
37 # X1 does not have ExpressCard slot
38 register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
40 device ref pcie_rp1 off end
41 device ref pcie_rp3 off end
42 device ref pcie_rp4 off end
43 device ref lpc on
44 chip ec/lenovo/h8
45 device pnp ff.2 on end # dummy
46 register "config2" = "0xe0"
47 register "config3" = "0xc0"
49 register "beepmask0" = "0xfe"
50 register "beepmask1" = "0x96"
52 register "event5_enable" = "0x3c"
53 register "evente_enable" = "0x3d"
54 end
55 end
56 end
57 end
58 end