1 chip northbridge
/intel
/sandybridge
3 register
"gpu_dp_b_hotplug" = "0x04"
4 register
"gpu_dp_c_hotplug" = "0x04"
5 register
"gpu_dp_d_hotplug" = "0x04"
6 register
"gpu_panel_power_cycle_delay" = "3"
7 register
"gpu_panel_power_up_delay" = "250" # T1
+T2
: 25ms
8 register
"gpu_panel_power_down_delay" = "250" # T5
+T6
: 35ms
9 register
"gpu_panel_power_backlight_on_delay" = "2500" # T3
: 250ms
10 register
"gpu_panel_power_backlight_off_delay" = "2500" # T4
: 250ms
12 register
"gpu_cpu_backlight" = "0x1312"
13 register
"gpu_pch_backlight" = "0x13121312"
16 subsystemid
0x17aa 0x21e8 inherit
18 chip southbridge
/intel
/bd82x6x # Intel Series
6 Cougar Point PCH
19 register
"usb_port_config" = "{
35 # Enable SATA ports
0 (HDD bay
) & 2 (msata
) & 3 (esatap
)
36 register
"sata_port_map" = "0x1d"
37 # X1 does
not have ExpressCard slot
38 register
"pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
40 device ref pcie_rp1 off
end
41 device ref pcie_rp3 off
end
42 device ref pcie_rp4 off
end
45 device pnp ff
.2 on
end # dummy
46 register
"config2" = "0xe0"
47 register
"config3" = "0xc0"
49 register
"beepmask0" = "0xfe"
50 register
"beepmask1" = "0x96"
52 register
"event5_enable" = "0x3c"
53 register
"evente_enable" = "0x3d"