mb/google/nissa: Create pujjogatwin variant
[coreboot2.git] / src / mainboard / portwell / m107 / irqroute.h
blobda3f83c32a84b6a15d766e3388895a42dc379a41
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/irq.h>
4 #include <soc/pci_devs.h>
5 #include <soc/pm.h>
7 /*
8 * IR02h GFX INT(A) - PIRQ A
9 * IR0Bh PUNIT INT(A) - PIRQ F
10 * IR10h EMMC INT(ABCD) - PIRQ DEFG
11 * IR11h SDIO INT(A) - PIRQ B
12 * IR12h SD INT(A) - PIRQ C
13 * IR13h SATA INT(A) - PIRQ D
14 * IR14h XHCI INT(A) - PIRQ E
15 * IR15h LP Audio INT(A) - PIRQ F
16 * IR17h MMC INT(A) - PIRQ F
17 * IR18h SIO INT(ABCD) - PIRQ BADC
18 * IR1Ah TXE INT(A) - PIRQ F
19 * IR1Bh HD Audio INT(A) - PIRQ G
20 * IR1Ch PCIe INT(ABCD) - PIRQ EFGH
21 * IR1Dh EHCI INT(A) - PIRQ D
22 * IR1Eh SIO INT(ABCD) - PIRQ BDEF
23 * IR1Fh LPC INT(ABCD) - PIRQ HGBC
25 #define PCI_DEV_PIRQ_ROUTES \
26 PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \
27 PCI_DEV_PIRQ_ROUTE(PUNIT_DEV, F, F, F, F), \
28 PCI_DEV_PIRQ_ROUTE(MMC_DEV, D, E, F, G), \
29 PCI_DEV_PIRQ_ROUTE(SD_DEV, C, A, A, A), \
30 PCI_DEV_PIRQ_ROUTE(SATA_DEV, D, A, A, A), \
31 PCI_DEV_PIRQ_ROUTE(XHCI_DEV, E, A, A, A), \
32 PCI_DEV_PIRQ_ROUTE(LPE_DEV, F, A, A, A), \
33 PCI_DEV_PIRQ_ROUTE(SIO1_DEV, B, A, D, C), \
34 PCI_DEV_PIRQ_ROUTE(TXE_DEV, F, A, A, A), \
35 PCI_DEV_PIRQ_ROUTE(HDA_DEV, G, A, A, A), \
36 PCI_DEV_PIRQ_ROUTE(PCIE_DEV, E, F, G, H), \
37 PCI_DEV_PIRQ_ROUTE(SIO2_DEV, B, D, E, F), \
38 PCI_DEV_PIRQ_ROUTE(PCU_DEV, H, G, B, C)
41 * Route each PIRQ[A-H] to a PIC IRQ[0-15]
42 * Reserved: 0, 1, 2, 8, 13
43 * PS2 keyboard: 12
44 * ACPI/SCI: 9
45 * Floppy: 6
47 #define PIRQ_PIC_ROUTES \
48 PIRQ_PIC(A, 11), \
49 PIRQ_PIC(B, 5), \
50 PIRQ_PIC(C, 5), \
51 PIRQ_PIC(D, 11), \
52 PIRQ_PIC(E, 11), \
53 PIRQ_PIC(F, 5), \
54 PIRQ_PIC(G, 11), \
55 PIRQ_PIC(H, 11)