cbfs: Remove remnants of ext-win-*
[coreboot2.git] / src / mainboard / prodrive / atlas / cfr.c
blobf5700e2ba08c2767ca8b28bedb521e02d71f750e
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <boot/coreboot_tables.h>
4 #include <commonlib/coreboot_tables.h>
5 #include <drivers/option/cfr_frontend.h>
6 #include <intelblocks/pmclib.h>
7 #include <inttypes.h>
8 #include <soc/pm.h>
9 #include <stdio.h>
10 #include <string.h>
11 #include <types.h>
13 #include "vpd.h"
15 static void update_rt_perf(const struct sm_object *obj, struct sm_object *new)
17 const bool rt_perf = get_emi_eeprom_vpd()->profile == ATLAS_PROF_REALTIME_PERFORMANCE;
19 if (!rt_perf)
20 return;
22 if (obj->kind == SM_OBJ_BOOL) {
23 new->sm_bool.flags = CFR_OPTFLAG_SUPPRESS;
24 new->sm_bool.default_value = false;
25 } else if (obj->kind == SM_OBJ_ENUM) {
26 new->sm_enum.flags = CFR_OPTFLAG_SUPPRESS;
27 new->sm_enum.default_value = 0;
31 static void update_bad_profile(const struct sm_object *obj, struct sm_object *new)
33 const bool pf_ok = get_emi_eeprom_vpd()->profile != 0;
35 if (!pf_ok)
36 return;
37 new->sm_comment.flags |= CFR_OPTFLAG_SUPPRESS;
40 static void update_serial(const struct sm_object *obj, struct sm_object *new)
42 new->sm_varchar.default_value = get_emi_eeprom_vpd()->serial_number;
45 static void update_part_number(const struct sm_object *obj, struct sm_object *new)
47 new->sm_varchar.default_value = get_emi_eeprom_vpd()->part_number;
50 static void update_profile(const struct sm_object *obj, struct sm_object *new)
52 new->sm_number.default_value = get_emi_eeprom_vpd()->profile;
55 /* TODO: Suppress option if carrier board is known to not have a RTC battery */
56 static const struct sm_enum_value pwr_after_g3_values[] = {
57 { "Power off (S5)", MAINBOARD_POWER_STATE_OFF },
58 { "Power on (S0)", MAINBOARD_POWER_STATE_ON },
59 /* No support for previous/last power state */
60 SM_ENUM_VALUE_END,
63 static const struct sm_object power_on_after_fail = SM_DECLARE_ENUM({
64 .opt_name = "power_on_after_fail",
65 .ui_name = "Restore AC Power Loss",
66 .ui_helptext = "Specify what to do when power is re-applied "
67 "after a power loss. This option has no effect "
68 "on systems without a RTC battery.",
69 .default_value = CONFIG_MAINBOARD_POWER_FAILURE_STATE,
70 .values = pwr_after_g3_values,
71 });
73 static const struct sm_enum_value primary_display_values[] = {
74 { "Intel iGPU", 0 },
75 { "CPU PEG dGPU", 1 },
76 { "PCH PCIe dGPU", 2 },
77 { "Auto", 3 },
78 SM_ENUM_VALUE_END,
81 static const struct sm_object primary_display = SM_DECLARE_ENUM({
82 .opt_name = "primary_display",
83 .ui_name = "Primary display device",
84 .ui_helptext = "Specify which display device to use as primary.",
85 .default_value = CONFIG(ONBOARD_VGA_IS_PRIMARY) ? 0 : 3,
86 .values = primary_display_values,
87 });
89 static const struct sm_enum_value pkg_c_state_limit_values[] = {
90 { "C0/C1", 0 },
91 { "C2", 1 },
92 { "C3", 2 },
93 { "C6", 3 },
94 { "C7", 4 },
95 { "C7S", 5 },
96 { "C8", 6 },
97 { "C9", 7 },
98 { "C10", 8 },
99 { "Default", 254 },
100 { "Auto", 255 },
101 SM_ENUM_VALUE_END,
104 static const struct sm_object turbo_mode = SM_DECLARE_BOOL({
105 .opt_name = "turbo_mode",
106 .ui_name = "Turbo Boost",
107 /* No help text */
108 .default_value = true,
111 static const struct sm_object vmx = SM_DECLARE_BOOL({
112 .opt_name = "vmx",
113 .ui_name = "Intel Virtualization Technology (VT-x)",
114 /* No help text */
115 .default_value = false,
118 static const struct sm_object vtd = SM_DECLARE_BOOL({
119 .opt_name = "vtd",
120 .ui_name = "Intel Virtualization Technology for Directed I/O (VT-d)",
121 /* No help text */
122 .default_value = false,
125 static const struct sm_object ibecc = SM_DECLARE_BOOL({
126 .opt_name = "ibecc",
127 .ui_name = "In-Band ECC",
128 .ui_helptext = "Specify whether In-Band error checking and "
129 "correction is to be enabled. Enabling this "
130 "option will reduce the amount of available "
131 "RAM because some memory is needed to store "
132 "ECC codes.",
133 .default_value = false,
136 static const struct sm_object serial_number = SM_DECLARE_VARCHAR({
137 .flags = CFR_OPTFLAG_READONLY | CFR_OPTFLAG_VOLATILE,
138 .opt_name = "serial_number",
139 .ui_name = "Serial Number",
140 }, WITH_CALLBACK(update_serial));
142 static const struct sm_object part_number = SM_DECLARE_VARCHAR({
143 .flags = CFR_OPTFLAG_READONLY | CFR_OPTFLAG_VOLATILE,
144 .opt_name = "part_number",
145 .ui_name = "Part Number",
146 }, WITH_CALLBACK(update_part_number));
148 static const struct sm_object bad_profile = SM_DECLARE_COMMENT({
149 .flags = CFR_OPTFLAG_READONLY,
150 .ui_name = "WARNING: Profile code is invalid",
151 }, WITH_CALLBACK(update_bad_profile));
153 static const struct sm_object profile = SM_DECLARE_NUMBER({
154 .flags = CFR_OPTFLAG_READONLY | CFR_OPTFLAG_VOLATILE,
155 .opt_name = "profile",
156 .ui_name = "Profile code",
157 .ui_helptext = "The profile code obtained from the EEPROM",
158 }, WITH_CALLBACK(update_profile));
160 static const struct sm_object energy_eff_turbo = SM_DECLARE_BOOL({
161 .flags = 0,
162 .opt_name = "energy_eff_turbo",
163 .ui_name = "Energy Efficient Turbo",
164 /* No help text */
165 .default_value = false,
166 }, WITH_CALLBACK(update_rt_perf));
168 static const struct sm_object pkg_c_state_limit = SM_DECLARE_ENUM({
169 .flags = 0,
170 .opt_name = "pkg_c_state_limit",
171 .ui_name = "Package C-state limit",
172 .ui_helptext = "", /* TODO: write something */
173 .default_value = 255,
174 .values = pkg_c_state_limit_values,
175 }, WITH_CALLBACK(update_rt_perf));
177 #define NUM_PCIE_SSC_SETTINGS 21
178 static struct sm_enum_value pch_pm_pcie_pll_ssc_values[] = {
179 [NUM_PCIE_SSC_SETTINGS] = { "Auto", 0xff },
180 SM_ENUM_VALUE_END,
183 static void update_pll_ssc_values(const struct sm_object *obj, struct sm_object *new)
185 for (size_t i = 0; i < NUM_PCIE_SSC_SETTINGS; i++) {
186 char buffer[16];
187 snprintf(buffer, sizeof(buffer), "%u.%u%%", i / 10, i % 10);
188 pch_pm_pcie_pll_ssc_values[i].ui_name = strdup(buffer);
189 pch_pm_pcie_pll_ssc_values[i].value = i;
193 static const struct sm_object pch_pcie_pll_ssc = SM_DECLARE_ENUM({
194 .opt_name = "pch_pcie_pll_ssc",
195 .ui_name = "PCH PCIe PLL Spread Spectrum Clocking",
196 /* No help text */
197 .default_value = 0xff,
198 .values = pch_pm_pcie_pll_ssc_values,
199 }, WITH_CALLBACK(update_pll_ssc_values));
201 static const struct sm_object c_states = SM_DECLARE_BOOL({
202 .flags = 0,
203 .opt_name = "c_states",
204 .ui_name = "CPU power states (C-states)",
205 .ui_helptext = "Specify whether C-states are supported.",
206 .default_value = true,
207 }, WITH_CALLBACK(update_rt_perf));
209 static const struct sm_object hyper_threading = SM_DECLARE_BOOL({
210 .flags = 0,
211 .opt_name = "hyper_threading",
212 .ui_name = "Hyper-Threading Technology",
213 /* No help text */
214 .default_value = true,
215 }, WITH_CALLBACK(update_rt_perf));
217 static struct sm_obj_form cpu = {
218 .ui_name = "CPU",
219 .obj_list = (const struct sm_object *[]) {
220 &c_states,
221 &hyper_threading,
222 &turbo_mode,
223 &energy_eff_turbo,
224 &vmx,
225 &vtd,
226 NULL
230 static struct sm_obj_form main = {
231 .ui_name = "Main",
232 .obj_list = (const struct sm_object *[]) {
233 &serial_number,
234 &part_number,
235 &bad_profile,
236 &profile,
237 &power_on_after_fail,
238 &primary_display,
239 &pkg_c_state_limit,
240 &pch_pcie_pll_ssc,
241 &ibecc,
242 NULL
246 static struct sm_obj_form *sm_root[] = {
247 &main,
248 &cpu,
249 NULL
253 * TODO: Writing this by hand is extremely tedious. Introducing a DSL
254 * (Domain-Specific Language) to describe options which is translated
255 * into code at build time may be the way to go. Maybe expand SCONFIG
256 * so that these can be devicetree options?
258 void lb_board(struct lb_header *header)
260 char *current = (char *)lb_new_record(header);
261 struct lb_cfr *cfr_root = (struct lb_cfr *)current;
263 cfr_write_setup_menu(cfr_root, sm_root);