device/pci_ids: Add Panther Lake Intel Touch Controller PCI IDs
[coreboot2.git] / src / mainboard / prodrive / atlas / early_gpio.c
blob70f28961aa7492cc8db85cd53fe3985d094b7c43
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/gpio.h>
5 #include "gpio.h"
7 /* Early pad configuration in bootblock */
8 static const struct pad_config early_gpio_table[] = {
9 /* SMB_CLK */
10 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
11 /* SMB_DATA */
12 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
14 /* EC_SMI_N */
15 PAD_CFG_GPI(GPP_E7, NONE, DEEP),
17 /* PCH HSID */
18 PAD_CFG_GPI(GPP_A8, NONE, DEEP),
19 PAD_CFG_GPI(GPP_F19, NONE, DEEP),
20 PAD_CFG_GPI(GPP_H19, NONE, DEEP),
21 PAD_CFG_GPI(GPP_H23, NONE, DEEP),
23 /* UART0 RX */
24 PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
25 /* UART0 TX */
26 PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
27 /* UART1 RX */
28 PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
29 /* UART1 TX */
30 PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
32 PAD_CFG_GPO(GPP_E8, 1, PLTRST), /* PERST_CB_RESET_N */
35 void configure_early_gpio_pads(void)
37 gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));