1 /* SPDX-License-Identifier: GPL-2.0-only */
8 /* Pad configuration was generated automatically using intelp2m utility */
9 static const struct pad_config gpio_table
[] = {
10 /* ------- GPIO Community 0 ------- */
11 /* ------- GPIO Group GPP_A ------- */
14 PAD_CFG_NF(GPP_A0
, NONE
, DEEP
, NF1
),
16 PAD_CFG_NF(GPP_A1
, NATIVE
, DEEP
, NF1
),
18 PAD_CFG_NF(GPP_A2
, NATIVE
, DEEP
, NF1
),
20 PAD_CFG_NF(GPP_A3
, NATIVE
, DEEP
, NF1
),
22 PAD_CFG_NF(GPP_A4
, NATIVE
, DEEP
, NF1
),
23 /* GPP_A5 - LFRAME# */
24 PAD_CFG_NF(GPP_A5
, NONE
, DEEP
, NF1
),
26 PAD_CFG_NF(GPP_A6
, NONE
, DEEP
, NF1
),
28 PAD_CFG_NF(GPP_A7
, NONE
, DEEP
, NF1
),
29 /* GPP_A8 - CLKRUN# */
30 PAD_CFG_NF(GPP_A8
, NONE
, PLTRST
, NF1
),
31 /* GPP_A9 - CLKOUT_LPC0 */
32 PAD_CFG_NF(GPP_A9
, DN_20K
, DEEP
, NF1
),
33 /* GPP_A10 - CLKOUT_LPC1 */
34 PAD_CFG_NF(GPP_A10
, DN_20K
, DEEP
, NF1
),
36 PAD_CFG_NF(GPP_A11
, UP_20K
, DEEP
, NF1
),
38 PAD_NC(GPP_A12
, NONE
),
40 PAD_NC(GPP_A13
, NONE
),
42 PAD_NC(GPP_A14
, NONE
),
44 PAD_NC(GPP_A15
, NONE
),
46 PAD_NC(GPP_A16
, NONE
),
48 PAD_NC(GPP_A17
, NONE
),
50 PAD_NC(GPP_A18
, NONE
),
52 PAD_NC(GPP_A19
, NONE
),
54 PAD_NC(GPP_A20
, NONE
),
56 PAD_NC(GPP_A21
, NONE
),
58 PAD_NC(GPP_A22
, NONE
),
60 PAD_NC(GPP_A23
, NONE
),
62 /* ------- GPIO Group GPP_B ------- */
64 /* GPP_B0 - CORE_VID0 */
66 /* GPP_B1 - CORE_VID1 */
85 PAD_NC(GPP_B10
, NONE
),
86 /* GPP_B11 - EXT_PWR_GATE# */
87 PAD_NC(GPP_B11
, NONE
),
88 /* GPP_B12 - SLP_S0# */
89 PAD_CFG_NF(GPP_B12
, NONE
, DEEP
, NF1
),
90 /* GPP_B13 - PLTRST# */
91 PAD_CFG_NF(GPP_B13
, NONE
, DEEP
, NF1
),
93 PAD_CFG_NF(GPP_B14
, DN_20K
, PLTRST
, NF1
),
95 PAD_NC(GPP_B15
, NONE
),
97 PAD_NC(GPP_B16
, NONE
),
99 PAD_NC(GPP_B17
, NONE
),
101 PAD_NC(GPP_B18
, NONE
),
103 PAD_NC(GPP_B19
, NONE
),
105 PAD_NC(GPP_B20
, NONE
),
107 PAD_NC(GPP_B21
, NONE
),
109 PAD_NC(GPP_B22
, NONE
),
111 PAD_NC(GPP_B23
, NONE
),
113 /* ------- GPIO Group GPP_G ------- */
116 PAD_NC(GPP_G0
, NONE
),
118 PAD_NC(GPP_G1
, NONE
),
120 PAD_NC(GPP_G2
, NONE
),
122 PAD_NC(GPP_G3
, NONE
),
124 PAD_NC(GPP_G4
, NONE
),
125 /* GPP_G5 - SD3_CD# */
126 PAD_NC(GPP_G5
, NONE
),
128 PAD_NC(GPP_G6
, NONE
),
129 /* GPP_G7 - SD3_WP */
130 PAD_NC(GPP_G7
, NONE
),
132 /* ------- GPIO Group SPI ------- */
134 /* ------- GPIO Community 1 ------- */
136 /* ------- GPIO Group GPP_D ------- */
139 PAD_NC(GPP_D0
, NONE
),
141 PAD_NC(GPP_D1
, NONE
),
143 PAD_NC(GPP_D2
, NONE
),
145 PAD_NC(GPP_D3
, NONE
),
147 PAD_NC(GPP_D4
, NONE
),
149 PAD_NC(GPP_D5
, NONE
),
151 PAD_NC(GPP_D6
, NONE
),
153 PAD_NC(GPP_D7
, NONE
),
155 PAD_NC(GPP_D8
, NONE
),
157 PAD_NC(GPP_D9
, NONE
),
159 PAD_NC(GPP_D10
, NONE
),
161 PAD_NC(GPP_D11
, NONE
),
163 PAD_NC(GPP_D12
, NONE
),
165 PAD_NC(GPP_D13
, NONE
),
167 PAD_NC(GPP_D14
, NONE
),
169 PAD_NC(GPP_D15
, NONE
),
171 PAD_NC(GPP_D16
, NONE
),
173 PAD_NC(GPP_D17
, NONE
),
175 PAD_NC(GPP_D18
, NONE
),
177 PAD_NC(GPP_D19
, NONE
),
179 PAD_NC(GPP_D20
, NONE
),
180 /* GPP_D21 - SPI1_IO2 */
181 PAD_NC(GPP_D21
, NONE
),
182 /* GPP_D22 - SPI1_IO3 */
183 PAD_NC(GPP_D22
, NONE
),
185 PAD_NC(GPP_D23
, NONE
),
187 /* ------- GPIO Group GPP_F ------- */
190 PAD_NC(GPP_F0
, NONE
),
192 PAD_NC(GPP_F1
, NONE
),
194 PAD_NC(GPP_F2
, NONE
),
196 PAD_NC(GPP_F3
, NONE
),
198 PAD_NC(GPP_F4
, NONE
),
200 PAD_NC(GPP_F5
, NONE
),
202 PAD_NC(GPP_F6
, NONE
),
204 PAD_NC(GPP_F7
, NONE
),
206 PAD_NC(GPP_F8
, NONE
),
208 PAD_NC(GPP_F9
, NONE
),
210 PAD_NC(GPP_F10
, NONE
),
211 /* GPP_F11 - EMMC_CMD */
212 PAD_CFG_NF(GPP_F11
, NONE
, DEEP
, NF1
),
213 /* GPP_F12 - EMMC_DATA0 */
214 PAD_CFG_NF(GPP_F12
, NONE
, DEEP
, NF1
),
215 /* GPP_F13 - EMMC_DATA1 */
216 PAD_CFG_NF(GPP_F13
, NONE
, DEEP
, NF1
),
217 /* GPP_F14 - EMMC_DATA2 */
218 PAD_CFG_NF(GPP_F14
, NONE
, DEEP
, NF1
),
219 /* GPP_F15 - EMMC_DATA3 */
220 PAD_CFG_NF(GPP_F15
, NONE
, DEEP
, NF1
),
221 /* GPP_F16 - EMMC_DATA4 */
222 PAD_CFG_NF(GPP_F16
, NONE
, DEEP
, NF1
),
223 /* GPP_F17 - EMMC_DATA5 */
224 PAD_CFG_NF(GPP_F17
, NONE
, DEEP
, NF1
),
225 /* GPP_F18 - EMMC_DATA6 */
226 PAD_CFG_NF(GPP_F18
, NONE
, DEEP
, NF1
),
227 /* GPP_F19 - EMMC_DATA7 */
228 PAD_CFG_NF(GPP_F19
, NONE
, DEEP
, NF1
),
229 /* GPP_F20 - EMMC_RCLK */
230 PAD_CFG_NF(GPP_F20
, NONE
, DEEP
, NF1
),
231 /* GPP_F21 - EMMC_CLK */
232 PAD_CFG_NF(GPP_F21
, NONE
, DEEP
, NF1
),
233 /* GPP_F22 - EMMC_RESET# */
234 PAD_CFG_NF(GPP_F22
, NONE
, DEEP
, NF1
),
236 PAD_NC(GPP_F23
, NONE
),
238 /* ------- GPIO Group GPP_H ------- */
241 PAD_NC(GPP_H0
, NONE
),
243 PAD_NC(GPP_H1
, NONE
),
245 PAD_NC(GPP_H2
, NONE
),
247 PAD_NC(GPP_H3
, NONE
),
249 PAD_NC(GPP_H4
, NONE
),
251 PAD_NC(GPP_H5
, NONE
),
253 PAD_NC(GPP_H6
, NONE
),
255 PAD_NC(GPP_H7
, NONE
),
257 PAD_NC(GPP_H8
, NONE
),
259 PAD_NC(GPP_H9
, NONE
),
261 PAD_NC(GPP_H10
, NONE
),
263 PAD_NC(GPP_H11
, NONE
),
265 PAD_NC(GPP_H12
, NONE
),
267 PAD_NC(GPP_H13
, NONE
),
269 PAD_NC(GPP_H14
, NONE
),
271 PAD_NC(GPP_H15
, NONE
),
273 PAD_NC(GPP_H16
, NONE
),
275 PAD_NC(GPP_H17
, NONE
),
276 /* GPP_H18 - CPU_C10_GATE# */
277 PAD_CFG_NF(GPP_H18
, NONE
, DEEP
, NF1
),
279 PAD_NC(GPP_H19
, NONE
),
281 PAD_NC(GPP_H20
, NONE
),
283 PAD_NC(GPP_H21
, NONE
),
285 PAD_NC(GPP_H22
, NONE
),
287 PAD_NC(GPP_H23
, NONE
),
289 /* ------- GPIO Group VGPIO ------- */
291 /* ------- GPIO Community 2 ------- */
293 /* ------- GPIO Group GPD ------- */
296 PAD_CFG_NF(GPD0
, NONE
, RSMRST
, NF1
),
297 /* GPD1 - ACPRESENT */
298 PAD_CFG_NF(GPD1
, NATIVE
, RSMRST
, NF1
),
299 /* GPD2 - LAN_WAKE# */
300 PAD_CFG_NF(GPD2
, NATIVE
, RSMRST
, NF1
),
302 PAD_CFG_NF(GPD3
, UP_20K
, RSMRST
, NF1
),
304 PAD_CFG_NF(GPD4
, NONE
, RSMRST
, NF1
),
306 PAD_CFG_NF(GPD5
, NONE
, RSMRST
, NF1
),
315 /* GPD10 - SLP_S5# */
320 /* ------- GPIO Community 3 ------- */
322 /* ------- GPIO Group AZA ------- */
324 /* ------- GPIO Group CPU ------- */
326 /* ------- GPIO Community 4 ------- */
328 /* ------- GPIO Group GPP_C ------- */
330 /* GPP_C0 - SMBCLK */
331 PAD_CFG_NF(GPP_C0
, NONE
, DEEP
, NF1
),
332 /* GPP_C1 - SMBDATA */
333 PAD_CFG_NF(GPP_C1
, NONE
, DEEP
, NF1
),
335 PAD_NC(GPP_C2
, NONE
),
336 /* GPP_C3 - SML0CLK */
337 PAD_CFG_NF(GPP_C3
, NONE
, DEEP
, NF1
),
338 /* GPP_C4 - SML0DATA */
339 PAD_CFG_NF(GPP_C4
, NONE
, DEEP
, NF1
),
341 PAD_NC(GPP_C5
, NONE
),
342 /* GPP_C6 - SML1CLK */
343 PAD_CFG_NF(GPP_C6
, NONE
, DEEP
, NF1
),
344 /* GPP_C7 - SML1DATA */
345 PAD_CFG_NF(GPP_C7
, NONE
, DEEP
, NF1
),
347 PAD_NC(GPP_C8
, NONE
),
349 PAD_NC(GPP_C9
, NONE
),
351 PAD_NC(GPP_C10
, NONE
),
353 PAD_NC(GPP_C11
, NONE
),
355 PAD_NC(GPP_C12
, NONE
),
357 PAD_NC(GPP_C13
, NONE
),
359 PAD_NC(GPP_C14
, NONE
),
361 PAD_NC(GPP_C15
, NONE
),
363 PAD_NC(GPP_C16
, NONE
),
365 PAD_NC(GPP_C17
, NONE
),
367 PAD_NC(GPP_C18
, NONE
),
369 PAD_NC(GPP_C19
, NONE
),
371 PAD_NC(GPP_C20
, NONE
),
373 PAD_NC(GPP_C21
, NONE
),
375 PAD_NC(GPP_C22
, NONE
),
377 PAD_NC(GPP_C23
, NONE
),
379 /* ------- GPIO Group GPP_E ------- */
382 PAD_NC(GPP_E0
, NONE
),
384 PAD_NC(GPP_E1
, NONE
),
385 /* GPP_E2 - SATAXPCIE2 */
386 PAD_CFG_NF(GPP_E2
, UP_20K
, PLTRST
, NF1
),
388 PAD_NC(GPP_E3
, NONE
),
390 PAD_NC(GPP_E4
, NONE
),
392 PAD_NC(GPP_E5
, NONE
),
394 PAD_NC(GPP_E6
, NONE
),
396 PAD_NC(GPP_E7
, NONE
),
397 /* GPP_E8 - SATALED# */
398 PAD_CFG_NF(GPP_E8
, NONE
, PLTRST
, NF1
),
399 /* GPP_E9 - RESERVED */
400 PAD_NC(GPP_E9
, NONE
),
401 /* GPP_E10 - RESERVED */
402 PAD_NC(GPP_E10
, NONE
),
404 PAD_NC(GPP_E11
, NONE
),
406 PAD_NC(GPP_E12
, NONE
),
407 /* GPP_E13 - DDPB_HPD0 */
408 PAD_CFG_NF(GPP_E13
, NONE
, DEEP
, NF1
),
409 /* GPP_E14 - DDPC_HPD1 */
410 PAD_CFG_NF(GPP_E14
, NONE
, DEEP
, NF1
),
411 /* GPP_E15 - DDPD_HPD2 */
412 PAD_NC(GPP_E15
, NONE
),
414 PAD_NC(GPP_E16
, NONE
),
415 /* GPP_E17 - EDP_HPD */
416 PAD_CFG_NF(GPP_E17
, NONE
, DEEP
, NF1
),
417 /* GPP_E18 - DPPB_CTRLCLK */
418 PAD_CFG_NF(GPP_E18
, NONE
, DEEP
, NF1
),
419 /* GPP_E19 - DPPB_CTRLDATA */
420 PAD_CFG_NF(GPP_E19
, NONE
, DEEP
, NF1
),
421 /* GPP_E20 - DPPC_CTRLCLK */
422 PAD_NC(GPP_E20
, NONE
),
423 /* GPP_E21 - DPPC_CTRLDATA */
424 PAD_NC(GPP_E21
, NONE
),
425 /* GPP_E22 - DPPD_CTRLCLK */
426 PAD_NC(GPP_E22
, NONE
),
427 /* GPP_E23 - DPPD_CTRLDATA */
428 PAD_NC(GPP_E23
, NONE
),
430 /* ------- GPIO Group JTAG ------- */
432 /* ------- GPIO Group HVMOS ------- */
435 const struct pad_config
*board_gpio_table(size_t *num
)
437 *num
= ARRAY_SIZE(gpio_table
);
441 #endif /* CFG_GPIO_H */