4 device ref south_xhci on
5 register
"usb2_ports" = "{
6 [0] = USB2_PORT_TYPE_C(OC_SKIP), // Type-C Port
7 [1] = USB2_PORT_MID(OC1), // Type-A Port (right)
8 [2] = USB2_PORT_MID(OC1), // Type-A Port (right)
9 [3] = USB2_PORT_FLEX(OC2), // Type-A Port (left)
10 [4] = USB2_PORT_FLEX(OC2), // Type-A Port (left)
11 [5] = USB2_PORT_MID(OC_SKIP), // Bluetooth
12 [6] = USB2_PORT_FLEX(OC_SKIP), // Camera
13 [7] = USB2_PORT_FLEX(OC_SKIP), // SD
16 # OC0 should be
for Type-C but it seems
to not have been wired
, according
to
17 # the available schematics
, even though it is labeled
as USB_OC_TYPEC.
18 register
"usb3_ports" = "{
19 [0] = USB3_PORT_DEFAULT(OC_SKIP), // Type-C Port
20 [1] = USB3_PORT_DEFAULT(OC1), // Type-A Port (right)
21 [2] = USB3_PORT_DEFAULT(OC1), // Type-A Port (right)
22 [3] = USB3_PORT_DEFAULT(OC_SKIP), // Type-C Port
25 device ref pcie_rp5 on
end
26 device ref pcie_rp9 on
27 register
"PcieRpClkReqSupport[8]" = "0"
28 register
"PcieRpClkReqNumber[8]" = "2"