device/pci_ids: Add Panther Lake Intel Touch Controller PCI IDs
[coreboot2.git] / src / mainboard / roda / rk9 / acpi / thermal.asl
blob9bf50d9cf64ec09a2dd54973756c7aebd03223a5
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 // Thermal Zone
5 Scope (\_TZ)
7         /* degree Celsius to deci-Kelvin (ACPI temperature unit) */
8         Method(C2dK, 1) {
9                 Local0 = 2732 + Arg0 * 10
10                 Return (Local0)
11         }
13         ThermalZone (THRM)
14         {
16                 // FIXME these could/should be read from the
17                 // GNVS area, so they can be controlled by
18                 // coreboot
19                 Name(TC1V, 0x04)
20                 Name(TC2V, 0x03)
21                 Name(TSPV, 0x96)
23                 // At which temperature should the OS start
24                 // active cooling?
25                 Method (_AC0, 0, Serialized)
26                 {
27                         Return (C2dK(120)) // Value for Rocky
28                 }
30                 // Critical shutdown temperature
31                 Method (_CRT, 0, Serialized)
32                 {
33                         Return (C2dK(155)) // Value for Rocky
34                 }
36                 // CPU throttling start temperature
37                 Method (_PSV, 0, Serialized)
38                 {
39                         Return (C2dK(105)) // Value for Rocky
40                 }
42                 // Get DTS Temperature
43                 Method (_TMP, 0, Serialized)
44                 {
45                         If (\_SB.PCI0.LPCB.EC0.ALRC) {
46                                 \_SB.PCI0.LPCB.EC0.ALRC = 0
47                                 Return(_AC0())
48                         }
50                         If (\_SB.PCI0.LPCB.EC0.ALRL) {
51                                 THRO = 0
52                                 \_SB.PCI0.LPCB.EC0.ALRL = 0
53                         }
55                         If (\_SB.PCI0.LPCB.EC0.ALRH) {
56                                 THRO = 1
57                                 \_SB.PCI0.LPCB.EC0.ALRH = 0
58                         }
60                         /* vendor BIOS reports 0K if TCPU >= 128 deg C ?!? */
61                         Return (C2dK(\_SB.PCI0.LPCB.EC0.TCPU))
62                 }
65                 // Processors used for active cooling
66                 Method (_PSL, 0, Serialized)
67                 {
68                         If (MPEN) {
69                                 Return (Package() {\_SB.CP00, \_SB.CP01})
70                         }
71                         Return (Package() {\_SB.CP00})
72                 }
74                 // TC1 value for passive cooling
75                 Method (_TC1, 0, Serialized)
76                 {
77                         Return (TC1V)
78                 }
80                 // TC2 value for passive cooling
81                 Method (_TC2, 0, Serialized)
82                 {
83                         Return (TC2V)
84                 }
86                 // Sampling period for passive cooling
87                 Method (_TSP, 0, Serialized)
88                 {
89                         Return (TSPV)
90                 }
93         }