1 /* SPDX-License-Identifier: GPL-2.0-only */
3 // Intel PCI to PCI bridge 0:1e.0
7 Name (_ADR, 0x001E0000)
8 Name (_PRW, Package(){ 13, 4 }) // Power Resources for Wake
10 Method (_PRT) // _PRT: PCI Interrupt Routing Table
14 Package() { 0x0001ffff, 0, 0, 0x16 },
15 Package() { 0x0001ffff, 1, 0, 0x15 },
16 Package() { 0x0001ffff, 2, 0, 0x14 },
17 Package() { 0x0001ffff, 3, 0, 0x13 },
18 Package() { 0x0002ffff, 0, 0, 0x12 },
19 Package() { 0x0002ffff, 1, 0, 0x13 },
20 Package() { 0x0002ffff, 2, 0, 0x11 },
21 Package() { 0x0002ffff, 3, 0, 0x10 },
22 Package() { 0x0003ffff, 0, 0, 0x13 },
23 Package() { 0x0003ffff, 1, 0, 0x12 },
24 Package() { 0x0003ffff, 2, 0, 0x15 },
25 Package() { 0x0003ffff, 3, 0, 0x16 },
26 Package() { 0x0000ffff, 0, 0, 0x10 },
27 Package() { 0x0000ffff, 1, 0, 0x11 },
28 Package() { 0x0000ffff, 2, 0, 0x12 },
29 Package() { 0x0000ffff, 3, 0, 0x13 },
33 Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
34 Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
35 Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKE, 0 },
36 Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0 },
37 Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
38 Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
39 Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },
40 Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
41 Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
42 Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },
43 Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 },
44 Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKG, 0 },
45 Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
46 Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },
47 Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
48 Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },