src/mainboard/system76/oryp5/devicetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/cannonlake
   4         register "common_soc_config" = "{
   5                 // Touchpad I2C bus
   6                 .i2c[0] = {
   7                         .speed = I2C_SPEED_FAST,
   8                         .rise_time_ns = 80,
   9                         .fall_time_ns = 110,
  10                 },
  11         }"
  12
  13 # CPU (soc/intel/cannonlake/cpu.c)
  14         # Power limit
  15         register "power_limits_config" = "{
  16                 .tdp_pl1_override = 45,
  17                 .tdp_pl2_override = 78,
  18         }"
  19
  20         # Enable Enhanced Intel SpeedStep
  21         register "eist_enable" = "true"
  22
  23 # FSP Memory (soc/intel/cannonlake/romstage/fsp_params.c)
  24         register "enable_c6dram" = "1"
  25
  26 # FSP Silicon (soc/intel/cannonlake/fsp_params.c)
  27         # Serial I/O
  28         register "SerialIoDevMode" = "{
  29                 [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad I2C bus
  30                 [PchSerialIoIndexI2C1] = PchSerialIoPci,
  31                 [PchSerialIoIndexUART2] = PchSerialIoPci, // Debug console
  32         }"
  33
  34         # Misc
  35         register "AcousticNoiseMitigation" = "1"
  36
  37         # Power
  38         register "PchPmSlpS3MinAssert" = "3" # 50ms
  39         register "PchPmSlpS4MinAssert" = "1" # 1s
  40         register "PchPmSlpSusMinAssert" = "4" # 4s
  41         register "PchPmSlpAMinAssert" = "4" # 2s
  42
  43         # Thermal
  44         register "tcc_offset" = "13"
  45
  46         # Serial IRQ Continuous
  47         register "serirq_mode" = "SERIRQ_CONTINUOUS"
  48
  49 # PM Util (soc/intel/cannonlake/pmutil.c)
  50         # GPE configuration
  51         # Note that GPE events called out in ASL code rely on this
  52         # route. i.e. If this route changes then the affected GPE
  53         # offset bits also need to be changed.
  54         register "gpe0_dw0" = "PMC_GPP_B"
  55         register "gpe0_dw1" = "PMC_GPP_G"
  56         register "gpe0_dw2" = "PMC_GPP_E"
  57
  58 # Actual device tree
  59         device domain 0 on
  60                 subsystemid 0x1558 0x95e6 inherit
  61                 device ref peg0         on
  62                         # PCI Express Graphics #0 x16, Clock 8 (NVIDIA GPU)
  63                         register "PcieClkSrcUsage[8]" = "0x40"
  64                         register "PcieClkSrcClkReq[8]" = "8"
  65                 end
  66                 device ref igpu         on
  67                         register "gfx" = "GMA_DEFAULT_PANEL(0)"
  68                 end
  69                 device ref dptf         on
  70                         register "Device4Enable" = "1"
  71                 end
  72                 device ref thermal      on      end
  73                 device ref xhci         on
  74                         register "usb2_ports" = "{
  75                                 [0] = USB2_PORT_TYPE_C(OC_SKIP),        /* Type-C */
  76                                 [1] = USB2_PORT_TYPE_C(OC_SKIP),        /* Type-C/DP */
  77                                 [2] = USB2_PORT_MID(OC_SKIP),           /* USB 3 Right */
  78                                 [3] = USB2_PORT_MID(OC_SKIP),           /* USB 3 Left */
  79                                 [4] = USB2_PORT_MID(OC_SKIP),           /* Per-key RGB */
  80                                 [6] = USB2_PORT_MID(OC_SKIP),           /* 3G/LTE */
  81                                 [7] = USB2_PORT_MID(OC_SKIP),           /* Camera */
  82                                 [9] = USB2_PORT_MID(OC_SKIP),           /* Fingerprint */
  83                                 [13] = USB2_PORT_MID(OC_SKIP),          /* WLAN/Bluetooth */
  84                         }"
  85                         register "usb3_ports" = "{
  86                                 [0] = USB3_PORT_DEFAULT(OC_SKIP),       /* Type-C */
  87                                 [1] = USB3_PORT_DEFAULT(OC_SKIP),       /* Type-C/DP */
  88                                 [2] = USB3_PORT_DEFAULT(OC_SKIP),       /* USB 3 Right */
  89                                 [3] = USB3_PORT_DEFAULT(OC_SKIP),       /* USB 3 Left */
  90                                 [6] = USB3_PORT_DEFAULT(OC_SKIP),       /* 3G/LTE */
  91                         }"
  92                 end
  93                 device ref shared_sram  on      end
  94                 device ref cnvi_wifi    on
  95                         #chip drivers/intel/wifi
  96                         #       register "wake" = "PME_B0_EN_BIT"
  97                         #end
  98                 end
  99                 device ref i2c0         on
 100                         # I2C HID not supported on PNP0f13
 101                 end
 102                 device ref i2c1         on      end
 103                 device ref sata         on
 104                         register "SataPortsEnable" = "{
 105                                 [1] = 1, /* SSD (SATA1A) */
 106                                 [4] = 1, /* HDD (SATA4) */
 107                         }"
 108                 end
 109                 device ref uart2        on      end
 110                 device ref pcie_rp21    on
 111                         # PCI Express root port #21 x4, Clock 11 (SSD2)
 112                         register "PcieRpEnable[20]" = "1"
 113                         register "PcieRpLtrEnable[20]" = "1"
 114                         register "PcieClkSrcUsage[11]" = "20"
 115                         register "PcieClkSrcClkReq[11]" = "11"
 116                 end
 117                 device ref pcie_rp9     on
 118                         # PCI Express root port #9 x4, Clock 12 (SSD)
 119                         register "PcieRpEnable[8]" = "1"
 120                         register "PcieRpLtrEnable[8]" = "1"
 121                         register "PcieClkSrcUsage[12]" = "8"
 122                         register "PcieClkSrcClkReq[12]" = "12"
 123                 end
 124                 device ref pcie_rp14    on
 125                         # PCI Express root port #14 x1, Clock 13 (WLAN)
 126                         register "PcieRpEnable[13]" = "1"
 127                         register "PcieRpLtrEnable[13]" = "1"
 128                         register "PcieClkSrcUsage[13]" = "13"
 129                         register "PcieClkSrcClkReq[13]" = "13"
 130                 end
 131                 device ref pcie_rp15    on
 132                         # PCI Express root port #15 x1, Clock 14 (GLAN)
 133                         register "PcieRpEnable[14]" = "1"
 134                         register "PcieRpLtrEnable[14]" = "1"
 135                         register "PcieClkSrcUsage[14]" = "14"
 136                         register "PcieClkSrcClkReq[14]" = "14"
 137                 end
 138                 device ref pcie_rp16    on
 139                         # PCI Express root port #16 x1, Clock 15 (Card Reader)
 140                         register "PcieRpEnable[15]" = "1"
 141                         register "PcieRpLtrEnable[15]" = "1"
 142                         register "PcieClkSrcUsage[15]" = "15"
 143                         register "PcieClkSrcClkReq[15]" = "15"
 144                 end
 145                 device ref lpc_espi     on
 146                         register "gen1_dec" = "0x00040069"
 147                         register "gen2_dec" = "0x00fc0e01"
 148                         register "gen3_dec" = "0x00fc0f01"
 149                         chip drivers/pc80/tpm
 150                                 device pnp 0c31.0 on end
 151                         end
 152                 end
 153                 device ref hda          on
 154                         subsystemid 0x1558 0x96e1
 155                         register "PchHdaAudioLinkHda" = "1"
 156                 end
 157                 device ref smbus        on
 158                         chip drivers/i2c/tas5825m
 159                                 register "id" = "0"
 160                                 device i2c 4e on end # (8bit address: 0x9c)
 161                         end # tas5825m
 162                 end
 163         end
 164 end