src/mainboard/system76/rpl/variants/oryp11/overridetree.cb

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 chip soc/intel/alderlake
   4         device domain 0 on
   5                 subsystemid 0x1558 0x66a2 inherit
   6
   7                 device ref tbt_pcie_rp0 on end
   8                 device ref tcss_xhci on
   9                         register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
  10                 end
  11                 device ref tcss_dma0 on end
  12                 device ref xhci on
  13                         register "usb2_ports" = "{
  14                                 [0] = USB2_PORT_MID(OC_SKIP),           /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */
  15                                 [1] = USB2_PORT_TYPE_C(OC_SKIP),        /* J_TYPEC1: USB-C Thunderbolt (Right) */
  16                                 [2] = USB2_PORT_TYPE_C(OC_SKIP),        /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
  17                                 [4] = USB2_PORT_MID(OC_SKIP),           /* Per-key RGB */
  18                                 [5] = USB2_PORT_MID(OC_SKIP),           /* J_USB1: USB-A 3.2 Gen 1 (Right) */
  19                                 [7] = USB2_PORT_MID(OC_SKIP),           /* Camera */
  20                                 [9] = USB2_PORT_MID(OC_SKIP),           /* Bluetooth */
  21                         }"
  22                         register "usb3_ports" = "{
  23                                 [0] = USB3_PORT_DEFAULT(OC_SKIP),       /* AJ_USB1: USB-A 3.2 Gen 1 (Left) */
  24                                 [1] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_USB1: USB-A 3.2 Gen 1 (Right) */
  25                                 [2] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
  26                                 [3] = USB3_PORT_DEFAULT(OC_SKIP),       /* J_TYPEC2: USB-C 3.2 Gen 2 (Back) */
  27                         }"
  28                 end
  29
  30                 device ref i2c0 on
  31                         # Touchpad I2C bus
  32                         register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
  33                         chip drivers/i2c/hid
  34                                 register "generic.hid" = ""ELAN0412""
  35                                 register "generic.desc" = ""ELAN Touchpad""
  36                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
  37                                 register "generic.detect" = "1"
  38                                 register "hid_desc_reg_offset" = "0x01"
  39                                 device i2c 15 on end
  40                         end
  41                         chip drivers/i2c/hid
  42                                 register "generic.hid" = ""FTCS1000""
  43                                 register "generic.desc" = ""FocalTech Touchpad""
  44                                 register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)"
  45                                 register "generic.detect" = "1"
  46                                 register "hid_desc_reg_offset" = "0x01"
  47                                 device i2c 38 on end
  48                         end
  49                 end
  50
  51                 device ref pcie5_0 on
  52                         # CPU PCIe RP#2 x8, Clock 3 (GPU)
  53                         register "cpu_pcie_rp[CPU_RP(2)]" = "{
  54                                 .clk_src = 3,
  55                                 .clk_req = 3,
  56                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  57                         }"
  58                 end
  59                 device ref pcie4_0 on
  60                         # CPU RP#1 x4, Clock 0 (SSD2)
  61                         register "cpu_pcie_rp[CPU_RP(1)]" = "{
  62                                 .clk_src = 0,
  63                                 .clk_req = 0,
  64                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  65                         }"
  66                 end
  67                 device ref pcie4_1 on
  68                         # PCIE RP#3 x4, Clock 4 (SSD1)
  69                         register "cpu_pcie_rp[CPU_RP(3)]" = "{
  70                                 .clk_src = 4,
  71                                 .clk_req = 4,
  72                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  73                         }"
  74                 end
  75                 device ref pcie_rp5 on
  76                         # PCH RP#5 x1, Clock 2 (WLAN)
  77                         register "pch_pcie_rp[PCH_RP(5)]" = "{
  78                                 .clk_src = 2,
  79                                 .clk_req = 2,
  80                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  81                         }"
  82                 end
  83                 device ref pcie_rp6 on
  84                         # PCH RP#6 x1, Clock 5 (CARD)
  85                         register "pch_pcie_rp[PCH_RP(6)]" = "{
  86                                 .clk_src = 5,
  87                                 .clk_req = 5,
  88                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  89                         }"
  90                 end
  91                 device ref pcie_rp7 on
  92                         # PCH RP#7 x1, Clock 6 (GLAN)
  93                         register "pch_pcie_rp[PCH_RP(7)]" = "{
  94                                 .clk_src = 6,
  95                                 .clk_req = 6,
  96                                 .flags = PCIE_RP_LTR | PCIE_RP_AER,
  97                         }"
  98                         device pci 00.0 on end
  99                 end
 100         end
 101 end