mb/google/corsola: Increase ANX7625 data trail time
[coreboot2.git] / src / mainboard / system76 / tgl-h / variants / gaze16-3060 / gpio.c
blobac14b64bf30daa416844d03276805613974315e3
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <soc/gpio.h>
4 #include <variant/gpio.h>
6 static const struct pad_config gpio_table[] = {
7 /* ------- GPIO Group GPD ------- */
8 PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // PM_BATLOW#
9 PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
10 PAD_CFG_GPI(GPD2, NATIVE, PWROK), // LAN_WAKEUP#
11 PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWR_BTN#
12 PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
13 PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
14 PAD_CFG_NF(GPD6, NONE, PWROK, NF1), // SLP_A#
15 PAD_CFG_GPI(GPD7, NONE, PWROK), // GPD_7
16 PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // SUS_CLK
17 PAD_NC(GPD9, NONE), // SLP_WLAN# (test point)
18 PAD_NC(GPD10, NONE), // SLP_S5# (test point)
19 PAD_CFG_GPI(GPD11, NONE, PWROK), // LAN_DISABLE#
20 PAD_NC(GPD12, NONE),
22 /* ------- GPIO Group GPP_A ------- */
23 PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0
24 PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1
25 PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2
26 PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3
27 PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS#
28 PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1), // ESPI_CLK
29 PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), // ESPI_RESET_N
30 PAD_NC(GPP_A7, NONE),
31 PAD_NC(GPP_A8, NONE),
32 PAD_NC(GPP_A9, NONE),
33 PAD_CFG_GPI(GPP_A10, UP_20K, DEEP), // ESPI_ALRT#
34 _PAD_CFG_STRUCT(GPP_A11, 0x80100100, 0x0000), // INTP_OUT
35 PAD_NC(GPP_A12, NONE),
36 PAD_NC(GPP_A13, NONE),
37 PAD_NC(GPP_A14, NONE),
39 /* ------- GPIO Group GPP_B ------- */
40 _PAD_CFG_STRUCT(GPP_B0, 0x40100100, 0x0000), // TPM_PIRQ#
41 PAD_NC(GPP_B1, NONE),
42 PAD_CFG_GPI(GPP_B2, NONE, DEEP), // VRALERT#_PD
43 PAD_CFG_GPO(GPP_B3, 1, DEEP), // BT_EN
44 PAD_NC(GPP_B4, NONE), // 10k pull-up
45 PAD_NC(GPP_B5, NONE),
46 PAD_NC(GPP_B6, NONE),
47 PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), // WLAN_CLKREQ#
48 PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), // CARD_CLKREQ#
49 PAD_NC(GPP_B9, NONE),
50 PAD_NC(GPP_B10, NONE),
51 PAD_NC(GPP_B11, NONE),
52 PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
53 PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
54 PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), // PCH_SPKR
55 PAD_CFG_GPO(GPP_B15, 1, DEEP), // SATA_M2_PWR_EN1
56 PAD_NC(GPP_B16, NONE),
57 PAD_NC(GPP_B17, NONE),
58 PAD_CFG_GPI(GPP_B18, NONE, DEEP), // NO REBOOT strap
59 PAD_NC(GPP_B19, NONE),
60 PAD_NC(GPP_B20, NONE),
61 PAD_NC(GPP_B21, NONE),
62 PAD_CFG_GPI(GPP_B22, NONE, DEEP), // BOOT strap
63 PAD_CFG_GPI(GPP_B23, NONE, DEEP), // CPUNSSC clock
65 /* ------- GPIO Group GPP_C ------- */
66 PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK
67 PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DAT
68 PAD_CFG_GPI(GPP_C2, NONE, DEEP), // SKIN_THRM_SNSR_ALERT_N
69 PAD_NC(GPP_C3, NONE),
70 PAD_NC(GPP_C4, NONE),
71 PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1), // eSPI/LPC select strap
72 PAD_NC(GPP_C6, NONE),
73 PAD_NC(GPP_C7, NONE),
74 PAD_CFG_GPI(GPP_C8, NONE, DEEP), // TPM_DET
75 PAD_CFG_GPI(GPP_C9, NONE, DEEP), // BOARD_ID1
76 PAD_CFG_GPI(GPP_C10, NONE, DEEP), // BOARD_ID2
77 PAD_CFG_GPI(GPP_C11, NONE, DEEP), // BOARD_ID3
78 PAD_CFG_GPI(GPP_C12, NONE, DEEP), // PERKB_ID2#_R
79 PAD_CFG_GPI(GPP_C13, NONE, DEEP), // PERKB_ID1#_R
80 PAD_NC(GPP_C14, NONE),
81 PAD_NC(GPP_C15, NONE),
82 PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), // I2C_SDA_TP
83 PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // I2C_SCL_TP
84 PAD_CFG_GPI(GPP_C18, NONE, DEEP), // SCI#
85 PAD_CFG_GPI(GPP_C19, NONE, DEEP), // SWI#
86 //PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RXD
87 //PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TXD
88 PAD_NC(GPP_C22, NONE),
89 PAD_CFG_GPI(GPP_C23, NONE, DEEP), // SMI#
91 /* ------- GPIO Group GPP_D ------- */
92 PAD_NC(GPP_D0, NONE),
93 PAD_NC(GPP_D1, NONE),
94 PAD_NC(GPP_D2, NONE),
95 PAD_NC(GPP_D3, NONE),
96 PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1), // SML1CLK
97 PAD_CFG_NF(GPP_D5, NONE, DEEP, NF2), // CNVI_RF_RST#
98 PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3), // CNVI_CLKREQ
99 PAD_NC(GPP_D7, NONE),
100 PAD_NC(GPP_D8, NONE),
101 PAD_CFG_NF(GPP_D9, NONE, DEEP, NF1), // SML0_DATA
102 PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1), // SML0_CLK
103 PAD_NC(GPP_D11, NONE),
104 PAD_NC(GPP_D12, NONE),
105 PAD_NC(GPP_D13, NONE),
106 PAD_NC(GPP_D14, NONE),
107 PAD_CFG_NF(GPP_D15, NONE, DEEP, NF1), // SML1DATA
108 PAD_NC(GPP_D16, NONE),
109 PAD_NC(GPP_D17, NONE),
110 PAD_NC(GPP_D18, NONE),
111 PAD_NC(GPP_D19, NONE),
112 PAD_NC(GPP_D20, NONE),
113 PAD_NC(GPP_D21, NONE),
114 PAD_NC(GPP_D22, NONE),
115 PAD_CFG_GPO(GPP_D23, 1, DEEP), // GPU_EVENT#
117 /* ------- GPIO Group GPP_E ------- */
118 PAD_NC(GPP_E0, NONE),
119 PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1), // SATAGP1
120 PAD_NC(GPP_E2, NONE),
121 PAD_CFG_GPI(GPP_E3, NONE, DEEP), // SMI#
122 PAD_CFG_NF(GPP_E4, NONE, PWROK, NF1), // DEVSLP0
123 PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), // DEVSLP1
124 PAD_NC(GPP_E6, NONE),
125 PAD_NC(GPP_E7, NONE),
126 PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), // SATA_LED#
127 PAD_CFG_GPI(GPP_E9, NONE, DEEP), // USB_OC0#
128 PAD_CFG_GPI(GPP_E10, NONE, DEEP), // USB_OC1#
129 PAD_CFG_GPI(GPP_E11, NONE, DEEP), // USB_OC2#
130 PAD_CFG_GPI(GPP_E12, NONE, DEEP), // USB_OC3#
132 /* ------- GPIO Group GPP_F ------- */
133 PAD_NC(GPP_F0, NONE),
134 PAD_NC(GPP_F1, NONE),
135 PAD_CFG_GPO(GPP_F2, 1, PLTRST), // GPIO_LANRTD3
136 PAD_CFG_GPO(GPP_F3, 1, DEEP), // LAN_PLT_RST#
137 PAD_CFG_GPO(GPP_F4, 1, DEEP), // SATA_PWR_EN
138 PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1), // 1P05_CTRL
139 PAD_NC(GPP_F6, NONE),
140 PAD_CFG_GPI(GPP_F7, NONE, DEEP), // GPIO4_GC6_NVDD_EN_R
141 //PAD_CFG_GPO(GPP_F8, 1, DEEP), // DGPU_RST#_PCH
142 //PAD_CFG_GPO(GPP_F9, 1, DEEP), // DGPU_PWR_EN
143 PAD_CFG_GPI(GPP_F10, NONE, DEEP), // BIOS_REC
144 PAD_CFG_GPI(GPP_F11, NONE, DEEP), // PCH_RSVD
145 PAD_CFG_GPI(GPP_F12, NONE, DEEP), // WLAN_EN
146 PAD_CFG_GPI(GPP_F13, NONE, DEEP), // GP39_GFX_CRB_DETECT
147 PAD_NC(GPP_F14, NONE),
148 PAD_CFG_GPI(GPP_F15, NONE, DEEP), // H_SKTOCC_N
149 PAD_NC(GPP_F16, NONE),
150 PAD_CFG_GPO(GPP_F17, 1, DEEP), // SB_BLON
151 PAD_NC(GPP_F18, NONE),
152 //PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NB_ENAVDD
153 PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), // BLON
154 PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), // EDP_BRIGHTNESS
155 PAD_NC(GPP_F22, NONE), // VNN_CTRL
156 PAD_NC(GPP_F23, NONE),
158 /* ------- GPIO Group GPP_G ------- */
159 PAD_NC(GPP_G0, NONE),
160 PAD_CFG_GPI(GPP_G1, NONE, DEEP), // CNVI_DET#
161 PAD_NC(GPP_G2, NONE),
162 PAD_NC(GPP_G3, NONE),
163 PAD_NC(GPP_G4, NONE),
164 PAD_NC(GPP_G5, NONE),
165 PAD_NC(GPP_G6, NONE),
166 PAD_NC(GPP_G7, NONE),
167 PAD_NC(GPP_G8, NONE),
168 PAD_CFG_GPI(GPP_G9, NONE, DEEP), // GPP_G9
169 PAD_NC(GPP_G10, NONE),
170 PAD_CFG_GPI(GPP_G11, NONE, DEEP), // GPP_G11
171 PAD_NC(GPP_G12, NATIVE),
172 PAD_CFG_GPI(GPP_G13, NONE, DEEP), // GPP_G13
173 PAD_NC(GPP_G14, NONE),
174 PAD_NC(GPP_G15, NONE),
176 /* ------- GPIO Group GPP_H ------- */
177 PAD_NC(GPP_H0, NONE),
178 PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1), // SDD_CLKREQ#
179 PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1), // LAN_CLKREQ#
180 PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1), // PEG_CLKREQ#
181 PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), // SDD2_CLKREQ#
182 PAD_NC(GPP_H5, NONE),
183 PAD_CFG_GPI(GPP_H6, NONE, DEEP), // SB_KBCRST#
184 PAD_NC(GPP_H7, NONE),
185 PAD_NC(GPP_H8, NONE),
186 PAD_NC(GPP_H9, NONE),
187 PAD_NC(GPP_H10, NONE),
188 PAD_NC(GPP_H11, NONE),
189 PAD_NC(GPP_H12, NONE),
190 PAD_NC(GPP_H13, NONE),
191 PAD_NC(GPP_H14, NONE),
192 PAD_NC(GPP_H15, NONE),
193 PAD_NC(GPP_H16, NONE),
194 PAD_CFG_GPO(GPP_H17, 1, DEEP), // SATA_M2_PWR_EN2
195 PAD_NC(GPP_H18, NONE),
196 PAD_NC(GPP_H19, NONE), // GSYNC_DET
197 PAD_NC(GPP_H20, NONE),
198 PAD_NC(GPP_H21, NONE),
199 PAD_NC(GPP_H22, NONE),
200 PAD_CFG_GPO(GPP_H23, 1, DEEP), // GPP_H23_SDD_RST#
202 /* ------- GPIO Group GPP_I ------- */
203 PAD_NC(GPP_I0, NONE),
204 _PAD_CFG_STRUCT(GPP_I1, 0x46880100, 0x0000), // MDP_E_HPD_PCH
205 _PAD_CFG_STRUCT(GPP_I2, 0x46880100, 0x0000), // DP_F_HPD
206 PAD_NC(GPP_I3, NONE),
207 PAD_NC(GPP_I4, NONE),
208 PAD_CFG_NF(GPP_I5, NONE, DEEP, NF1), // HDMI_CTRLCLK
209 PAD_CFG_NF(GPP_I6, NONE, DEEP, NF1), // HDMI_CTRLDATA
210 PAD_NC(GPP_I7, NONE),
211 PAD_NC(GPP_I8, NONE),
212 PAD_CFG_GPO(GPP_I9, 1, DEEP), // GGPP_I9_SDD2_RST#
213 PAD_CFG_TERM_GPO(GPP_I10, 0, DN_20K, DEEP), // GPP_I10_TEST_R
214 PAD_CFG_NF(GPP_I11, NONE, DEEP, NF2), // SMD_7411
215 PAD_CFG_NF(GPP_I12, NONE, DEEP, NF2), // SMC_7411
216 PAD_CFG_GPI(GPP_I13, NONE, PLTRST), // USB_OC6#
217 PAD_CFG_GPI(GPP_I14, NONE, PLTRST), // USB_OC7#
219 /* ------- GPIO Group GPP_J ------- */
220 PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
221 PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1), // CPU_C10_GATE#
222 PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1), // CNVI_BRI_DT / crystal select
223 PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
224 PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1), // CNVI_RGI_DT / M.2 CNVi strap
225 PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
226 PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
227 PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
228 PAD_CFG_GPI(GPP_J8, NONE, PLTRST), // GPIO4_GC6_NVDD_EN_R
229 PAD_NC(GPP_J9, NONE),
231 /* ------- GPIO Group GPP_K ------- */
232 PAD_CFG_GPO(GPP_K0, 0, DEEP), // DGPU_OVRM
233 PAD_NC(GPP_K1, NONE),
234 PAD_CFG_GPI(GPP_K2, NONE, DEEP), // DGPU_PWRGD_R
235 PAD_NC(GPP_K3, NONE),
236 PAD_NC(GPP_K4, NONE),
237 PAD_NC(GPP_K5, NONE),
238 PAD_CFG_NF(GPP_K6, NONE, DEEP, NF1), // EDP_HPD
239 PAD_CFG_NF(GPP_K7, NONE, DEEP, NF1), // HDMI_HPD
240 PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1), // CORE_VID0
241 PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1), // CORE_VID1
242 PAD_NC(GPP_K10, NONE),
243 PAD_CFG_GPI(GPP_K11, NONE, PLTRST), // GC6_FB_EN_PCH
245 /* ------- GPIO Group GPP_R ------- */
246 PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
247 PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
248 PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT / ME_WE
249 PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
250 PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#
251 PAD_NC(GPP_R5, NONE),
252 PAD_NC(GPP_R6, NONE),
253 PAD_NC(GPP_R7, NONE),
254 PAD_NC(GPP_R8, NONE),
255 PAD_NC(GPP_R9, NONE),
256 PAD_NC(GPP_R10, NONE),
257 PAD_NC(GPP_R11, NONE),
258 PAD_CFG_GPI_INT(GPP_R12, NONE, PLTRST, LEVEL), // TP_ATTN#
259 PAD_NC(GPP_R13, NONE),
260 PAD_NC(GPP_R14, NONE),
261 PAD_NC(GPP_R15, NONE),
262 PAD_NC(GPP_R16, NONE),
263 PAD_NC(GPP_R17, NONE),
264 PAD_NC(GPP_R18, NONE),
265 PAD_NC(GPP_R19, NONE),
267 /* ------- GPIO Group GPP_S ------- */
268 PAD_NC(GPP_S0, NONE),
269 PAD_NC(GPP_S1, NONE),
270 PAD_NC(GPP_S2, NONE),
271 PAD_NC(GPP_S3, NONE), // 100k pull-down
272 PAD_NC(GPP_S4, NONE),
273 PAD_NC(GPP_S5, NONE),
274 PAD_CFG_GPI(GPP_S6, NONE, DEEP), // MIC_CLK_PCH
275 PAD_CFG_GPI(GPP_S7, NONE, DEEP), // MIC_DATA_PCH
278 void variant_configure_gpios(void)
280 gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));