1 /* SPDX-License-Identifier: GPL-2.0-only */
9 * Pad configuration was generated automatically using intelp2m utility.
11 * todo: check HOSTSW_OWN_{NORTH, NORTHWEST, SOUTHWEST, WEST} to set DRIVER
12 * mode for the corresponding pads.
14 static const struct pad_config gpio_table
[] = {
15 /* ------- GPIO Group North ------- */
18 PAD_CFG_GPI_TRIG_OWN(GPIO_0
, NONE
, PWROK
, OFF
, ACPI
),
21 PAD_CFG_GPI_TRIG_OWN(GPIO_1
, NONE
, PWROK
, OFF
, ACPI
),
24 PAD_CFG_GPI_TRIG_OWN(GPIO_2
, NONE
, PWROK
, OFF
, ACPI
),
27 PAD_CFG_GPI_TRIG_OWN(GPIO_3
, NONE
, PWROK
, OFF
, ACPI
),
30 PAD_CFG_GPI_TRIG_OWN(GPIO_4
, NONE
, PWROK
, OFF
, ACPI
),
33 PAD_CFG_GPI_TRIG_OWN(GPIO_5
, NONE
, DEEP
, OFF
, ACPI
),
36 PAD_CFG_GPO(GPIO_6
, 1, DEEP
),
39 PAD_CFG_GPO(GPIO_7
, 1, DEEP
),
42 PAD_CFG_GPO(GPIO_8
, 1, DEEP
),
45 PAD_CFG_GPO(GPIO_9
, 1, DEEP
),
48 PAD_CFG_GPO(GPIO_10
, 1, DEEP
),
51 PAD_CFG_GPO(GPIO_11
, 1, DEEP
),
54 PAD_CFG_GPO(GPIO_12
, 1, DEEP
),
57 PAD_CFG_GPI_TRIG_OWN(GPIO_13
, NONE
, DEEP
, OFF
, ACPI
),
60 PAD_CFG_GPI_TRIG_OWN(GPIO_14
, NONE
, DEEP
, OFF
, ACPI
),
63 PAD_CFG_GPI_TRIG_OWN(GPIO_15
, NONE
, DEEP
, OFF
, ACPI
),
66 PAD_CFG_GPI_SCI_IOS(GPIO_16
, NONE
, DEEP
, LEVEL
, INVERT
, TxDRxE
, SAME
),
69 PAD_CFG_GPO(GPIO_17
, 1, DEEP
),
72 PAD_CFG_GPO(GPIO_18
, 1, DEEP
),
75 PAD_CFG_TERM_GPO(GPIO_19
, 1, UP_20K
, DEEP
),
78 PAD_CFG_GPI_TRIG_OWN(GPIO_20
, NONE
, DEEP
, OFF
, ACPI
),
81 PAD_CFG_GPO(GPIO_21
, 1, DEEP
),
84 PAD_CFG_GPI_TRIG_OWN(GPIO_22
, NONE
, DEEP
, OFF
, ACPI
),
87 PAD_CFG_GPI_TRIG_OWN(GPIO_23
, NONE
, DEEP
, OFF
, ACPI
),
90 PAD_CFG_GPI_TRIG_OWN(GPIO_24
, NONE
, DEEP
, OFF
, ACPI
),
93 PAD_CFG_GPI_TRIG_OWN(GPIO_25
, NONE
, DEEP
, OFF
, ACPI
),
96 PAD_CFG_GPI_TRIG_OWN(GPIO_26
, NONE
, DEEP
, OFF
, ACPI
),
99 PAD_CFG_GPO(GPIO_27
, 1, DEEP
),
101 /* GPIO_28 - *GPIO */
102 PAD_CFG_GPI_TRIG_OWN(GPIO_28
, UP_20K
, DEEP
, OFF
, ACPI
),
104 /* GPIO_29 - *GPIO */
105 PAD_CFG_GPI_TRIG_OWN(GPIO_29
, UP_20K
, DEEP
, OFF
, ACPI
),
107 /* GPIO_30 - *GPIO */
108 PAD_CFG_GPI_TRIG_OWN(GPIO_30
, UP_20K
, DEEP
, OFF
, ACPI
),
110 /* GPIO_31 - *GPIO */
111 PAD_CFG_GPI_TRIG_OWN(GPIO_31
, UP_20K
, DEEP
, OFF
, ACPI
),
113 /* GPIO_32 - *GPIO */
114 PAD_CFG_GPI_TRIG_OWN(GPIO_32
, NONE
, DEEP
, OFF
, ACPI
),
116 /* GPIO_33 - *GPIO */
117 PAD_CFG_GPI_TRIG_OWN(GPIO_33
, NONE
, DEEP
, OFF
, ACPI
),
120 PAD_CFG_NF(GPIO_34
, DN_20K
, DEEP
, NF1
),
123 PAD_CFG_NF(GPIO_35
, DN_20K
, DEEP
, NF1
),
125 /* GPIO_36 - *GPIO */
126 PAD_CFG_GPO(GPIO_36
, 1, DEEP
),
129 PAD_CFG_NF(GPIO_37
, DN_20K
, PWROK
, NF1
),
131 /* GPIO_38 - LPSS_UART0_RXD */
132 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
134 /* GPIO_39 - LPSS_UART0_TXD */
135 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39
, UP_20K
, DEEP
, NF1
, TxLASTRxE
, DISPUPD
),
137 /* GPIO_40 - LPSS_UART0_RTS_N */
138 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40
, UP_20K
, DEEP
, NF1
, TxLASTRxE
, DISPUPD
),
140 /* GPIO_41 - LPSS_UART0_CTS_N */
141 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
143 /* GPIO_42 - LPSS_UART1_RXD */
144 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
146 /* GPIO_43 - LPSS_UART1_TXD */
147 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43
, UP_20K
, DEEP
, NF1
, HIZCRx0
, DISPUPD
),
149 /* GPIO_44 - LPSS_UART1_RTS_N */
150 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44
, UP_20K
, DEEP
, NF1
, TxLASTRxE
, DISPUPD
),
152 /* GPIO_45 - LPSS_UART1_CTS_N */
153 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45
, NONE
, DEEP
, NF1
, HIZCRx0
, DISPUPD
),
155 /* GPIO_46 - *GPIO */
156 PAD_CFG_GPI_TRIG_OWN(GPIO_46
, NONE
, DEEP
, OFF
, ACPI
),
158 /* GPIO_47 - *GPIO */
159 PAD_CFG_GPI_TRIG_OWN(GPIO_47
, NONE
, DEEP
, OFF
, ACPI
),
161 /* GPIO_48 - *GPIO */
162 PAD_CFG_GPI_TRIG_OWN(GPIO_48
, NONE
, DEEP
, OFF
, ACPI
),
164 /* GPIO_49 - *GPIO */
165 PAD_CFG_GPI_TRIG_OWN(GPIO_49
, NONE
, DEEP
, OFF
, ACPI
),
167 /* GPIO_62 - *GPIO */
168 PAD_CFG_GPI_TRIG_OWN(GPIO_62
, NONE
, DEEP
, OFF
, ACPI
),
170 /* GPIO_63 - *GPIO */
171 PAD_CFG_GPI_TRIG_OWN(GPIO_63
, NONE
, DEEP
, OFF
, ACPI
),
173 /* GPIO_64 - *GPIO */
174 PAD_CFG_GPI_TRIG_OWN(GPIO_64
, NONE
, DEEP
, OFF
, ACPI
),
176 /* GPIO_65 - *GPIO */
177 PAD_CFG_GPI_TRIG_OWN(GPIO_65
, NONE
, DEEP
, OFF
, ACPI
),
179 /* GPIO_66 - *GPIO */
180 PAD_CFG_GPI_TRIG_OWN(GPIO_66
, NONE
, DEEP
, OFF
, ACPI
),
182 /* GPIO_67 - *GPIO */
183 PAD_CFG_GPI_TRIG_OWN(GPIO_67
, NONE
, DEEP
, OFF
, ACPI
),
185 /* GPIO_68 - *GPIO */
186 PAD_CFG_GPI_TRIG_OWN(GPIO_68
, NONE
, DEEP
, OFF
, ACPI
),
188 /* GPIO_69 - *GPIO */
189 PAD_CFG_GPI_TRIG_OWN(GPIO_69
, NONE
, DEEP
, OFF
, ACPI
),
191 /* GPIO_70 - *GPIO */
192 PAD_CFG_GPI_TRIG_OWN(GPIO_70
, NONE
, DEEP
, OFF
, ACPI
),
194 /* GPIO_71 - *GPIO */
195 PAD_CFG_GPI_TRIG_OWN(GPIO_71
, NONE
, DEEP
, OFF
, ACPI
),
197 /* GPIO_72 - *GPIO */
198 PAD_CFG_TERM_GPO(GPIO_72
, 0, DN_20K
, DEEP
),
200 /* GPIO_73 - *GPIO */
201 PAD_CFG_TERM_GPO(GPIO_73
, 0, DN_20K
, DEEP
),
203 /* TCK - *JTAG_TCK */
204 PAD_CFG_NF_IOSTANDBY_IGNORE(TCK
, DN_20K
, DEEP
, NF1
),
206 /* TRST_B - *JTAG_TRST_N */
207 PAD_CFG_NF_IOSTANDBY_IGNORE(TRST_B
, DN_20K
, DEEP
, NF1
),
209 /* TMS - *JTAG_TMS */
210 PAD_CFG_NF_IOSTANDBY_IGNORE(TMS
, UP_20K
, DEEP
, NF1
),
212 /* TDI - *JTAG_TDI */
213 PAD_CFG_NF_IOSTANDBY_IGNORE(TDI
, UP_20K
, DEEP
, NF1
),
215 /* CX_PMODE - *JTAG_PMODE */
216 PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PMODE
, NONE
, DEEP
, NF1
),
218 /* CX_PREQ_B - *JTAG_PREQ_N */
219 PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PREQ_B
, UP_20K
, DEEP
, NF1
),
222 PAD_CFG_NF_IOSTANDBY_IGNORE(JTAGX
, UP_20K
, DEEP
, NF1
),
224 /* CX_PRDY_B - *JTAG_PRDY_N */
225 PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PRDY_B
, UP_20K
, DEEP
, NF1
),
227 /* TDO - *JTAG_TDO */
228 PAD_CFG_NF_IOSTANDBY_IGNORE(TDO
, UP_20K
, DEEP
, NF1
),
230 /* CNV_BRI_DT - GPIO */
231 PAD_CFG_GPO_IOSSTATE_IOSTERM(CNV_BRI_DT
, 1, DEEP
, DN_20K
, IGNORE
, SAME
),
233 /* CNV_BRI_RSP - GPIO */
234 PAD_CFG_TERM_GPO(CNV_BRI_RSP
, 1, UP_1K
, DEEP
),
236 /* CNV_RGI_DT - GPIO */
237 PAD_CFG_GPO(CNV_RGI_DT
, 1, DEEP
),
239 /* CNV_RGI_RSP - RESERVED */
241 /* SVID0_ALERT_B - GPIO */
242 PAD_CFG_GPI_TRIG_OWN(SVID0_ALERT_B
, NONE
, DEEP
, OFF
, ACPI
),
244 /* SVID0_DATA - GPIO */
245 PAD_CFG_GPI_TRIG_OWN(SVID0_DATA
, NONE
, DEEP
, OFF
, ACPI
),
247 /* SVID0_CLK - GPIO */
248 PAD_CFG_GPI_TRIG_OWN(SVID0_CLK
, NONE
, DEEP
, OFF
, ACPI
),
250 /* ------- GPIO Group North-West ------- */
252 /* GPIO_187 - *DDI0_DDC_SDA */
253 PAD_CFG_NF_IOSSTATE(GPIO_187
, UP_20K
, DEEP
, NF1
, HIZCRx0
),
255 /* GPIO_188 - *DDI0_DDC_SCL */
256 PAD_CFG_NF_IOSSTATE(GPIO_188
, UP_20K
, DEEP
, NF1
, HIZCRx0
),
258 /* GPIO_189 - *DDI1_DDC_SDA */
259 PAD_CFG_NF(GPIO_189
, UP_2K
, DEEP
, NF1
),
261 /* GPIO_190 - *DDI1_DDC_SCL */
262 PAD_CFG_NF(GPIO_190
, UP_2K
, DEEP
, NF1
),
264 /* GPIO_191 - GPIO */
265 PAD_CFG_GPI_TRIG_OWN(GPIO_191
, NONE
, DEEP
, OFF
, ACPI
),
267 /* GPIO_192 - GPIO */
268 PAD_CFG_GPI_TRIG_OWN(GPIO_192
, NONE
, DEEP
, OFF
, ACPI
),
270 /* GPIO_193 - *PNL0_VDDEN */
271 PAD_CFG_NF_IOSSTATE(GPIO_193
, DN_20K
, DEEP
, NF1
, Tx0RxDCRx0
),
273 /* GPIO_194 - *PNL0_BKLTEN */
274 PAD_CFG_NF_IOSSTATE(GPIO_194
, DN_20K
, DEEP
, NF1
, Tx0RxDCRx0
),
276 /* GPIO_195 - *PNL0_BKLTCTL */
277 PAD_CFG_NF_IOSSTATE(GPIO_195
, DN_20K
, DEEP
, NF1
, Tx0RxDCRx0
),
279 /* GPIO_196 - GPIO */
280 PAD_CFG_GPI_TRIG_OWN(GPIO_196
, NONE
, DEEP
, OFF
, ACPI
),
282 /* GPIO_197 - GPIO */
283 PAD_CFG_GPI_TRIG_OWN(GPIO_197
, NONE
, DEEP
, OFF
, ACPI
),
285 /* GPIO_198 - GPIO */
286 PAD_CFG_GPI_TRIG_OWN(GPIO_198
, NONE
, DEEP
, OFF
, ACPI
),
288 /* GPIO_199 - DDI1_HPD */
289 PAD_CFG_NF(GPIO_199
, UP_20K
, DEEP
, NF2
),
291 /* GPIO_200 - DDI0_HPD */
292 PAD_CFG_NF(GPIO_200
, UP_20K
, DEEP
, NF2
),
294 /* GPIO_201 - GPIO */
295 PAD_CFG_GPI_TRIG_OWN(GPIO_201
, NONE
, DEEP
, OFF
, ACPI
),
297 /* GPIO_202 - GPIO */
298 PAD_CFG_GPI_TRIG_OWN(GPIO_202
, NONE
, DEEP
, OFF
, ACPI
),
300 /* GPIO_203 - GPIO */
301 PAD_CFG_GPI_TRIG_OWN(GPIO_203
, NONE
, DEEP
, OFF
, ACPI
),
303 /* GPIO_204 - GPIO */
304 PAD_CFG_GPI_TRIG_OWN(GPIO_204
, NONE
, DEEP
, OFF
, ACPI
),
306 /* PMC_SPI_FS0 - GPIO */
307 PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS0
, NONE
, DEEP
, OFF
, ACPI
),
309 /* PMC_SPI_FS1 - DDI2_HPD */
310 PAD_CFG_NF(PMC_SPI_FS1
, UP_20K
, DEEP
, NF2
),
312 /* PMC_SPI_FS2 - GPIO */
313 PAD_CFG_GPI_TRIG_OWN(PMC_SPI_FS2
, NONE
, DEEP
, OFF
, ACPI
),
315 /* PMC_SPI_RXD - GPIO */
316 PAD_CFG_GPI_TRIG_OWN(PMC_SPI_RXD
, NONE
, DEEP
, OFF
, ACPI
),
318 /* PMC_SPI_TXD - GPIO */
319 PAD_CFG_GPI_TRIG_OWN(PMC_SPI_TXD
, NONE
, DEEP
, OFF
, ACPI
),
321 /* PMC_SPI_CLK - GPIO */
322 PAD_CFG_GPI_TRIG_OWN(PMC_SPI_CLK
, NONE
, DEEP
, OFF
, ACPI
),
324 /* PMIC_PWRGOOD - GPIO */
325 PAD_CFG_TERM_GPO(PMIC_PWRGOOD
, 1, UP_1K
, DEEP
),
327 /* PMIC_RESET_B - GPIO */
328 PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_RESET_B
, NONE
, DEEP
, OFF
, IGNORE
, ACPI
),
330 /* GPIO_213 - GPIO */
331 PAD_CFG_TERM_GPO(GPIO_213
, 1, UP_20K
, DEEP
),
333 /* GPIO_214 - GPIO */
334 PAD_CFG_GPI_TRIG_IOS_OWN(GPIO_214
, UP_20K
, DEEP
, OFF
, TxLASTRxE
, ENPU
, ACPI
),
336 /* GPIO_215 - GPIO */
337 PAD_CFG_GPI_TRIG_IOS_OWN(GPIO_215
, UP_20K
, DEEP
, OFF
, TxLASTRxE
, ENPU
, ACPI
),
339 /* PMIC_THERMTRIP_B - *THERMTRIP_N */
340 PAD_CFG_NF(PMIC_THERMTRIP_B
, UP_20K
, DEEP
, NF1
),
342 /* PMIC_STDBY - GPIO */
343 PAD_CFG_TERM_GPO(PMIC_STDBY
, 1, DN_20K
, DEEP
),
345 /* PROCHOT_B - *PROCHOT_N */
346 PAD_CFG_NF_IOSSTATE(PROCHOT_B
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
348 /* PMIC_I2C_SCL - RESERVED */
350 /* PMIC_I2C_SDA - RESERVED */
352 /* GPIO_74 - *GPIO */
353 PAD_CFG_GPI_TRIG_OWN(GPIO_74
, NONE
, DEEP
, OFF
, ACPI
),
355 /* GPIO_75 - *GPIO */
356 PAD_CFG_GPI_TRIG_OWN(GPIO_75
, NONE
, DEEP
, OFF
, ACPI
),
358 /* GPIO_76 - *GPIO */
359 PAD_CFG_GPI_TRIG_OWN(GPIO_76
, NONE
, DEEP
, OFF
, ACPI
),
361 /* GPIO_77 - *GPIO */
362 PAD_CFG_GPI_TRIG_OWN(GPIO_77
, NONE
, DEEP
, OFF
, ACPI
),
364 /* GPIO_78 - *GPIO */
365 PAD_CFG_GPI_TRIG_OWN(GPIO_78
, NONE
, DEEP
, OFF
, ACPI
),
367 /* GPIO_79 - AVS_DMIC_CLK_A1 */
368 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79
, DN_20K
, DEEP
, NF1
),
370 /* GPIO_80 - AVS_DMIC_CLK_B1 */
371 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80
, DN_20K
, DEEP
, NF1
),
373 /* GPIO_81 - AVS_DMIC_DATA_1 */
374 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_81
, DN_20K
, DEEP
, NF1
, TxDRxE
, ENPD
),
376 /* GPIO_82 - AVS_DMIC_CLK_AB2 */
377 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82
, DN_20K
, DEEP
, NF1
),
379 /* GPIO_83 - AVS_DMIC_DATA_2 */
380 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_83
, DN_20K
, DEEP
, NF1
, TxDRxE
, ENPD
),
382 /* GPIO_84 - AVS_I2S2_MCLK */
383 PAD_CFG_NF(GPIO_84
, DN_20K
, DEEP
, NF1
),
385 /* GPIO_85 - AVS_I2S2_BCLK */
386 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_85
, DN_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
388 /* GPIO_86 - AVS_I2S2_WS_SYNC */
389 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_86
, DN_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
391 /* GPIO_87 - AVS_I2S2_SDI */
392 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_87
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
394 /* GPIO_88 - AVS_I2S2_SDO */
395 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_88
, NONE
, DEEP
, NF1
, HIZCRx0
, ENPD
),
397 /* GPIO_89 - *GPIO */
398 PAD_CFG_GPI_TRIG_OWN(GPIO_89
, NONE
, DEEP
, OFF
, ACPI
),
400 /* GPIO_90 - *GPIO */
401 PAD_CFG_GPI_TRIG_OWN(GPIO_90
, NONE
, DEEP
, OFF
, ACPI
),
403 /* GPIO_91 - *GPIO */
404 PAD_CFG_GPI_TRIG_OWN(GPIO_91
, NONE
, DEEP
, OFF
, ACPI
),
406 /* GPIO_92 - *GPIO */
407 PAD_CFG_GPI_TRIG_OWN(GPIO_92
, NONE
, DEEP
, OFF
, ACPI
),
409 /* GPIO_97 - *FST_SPI_CS0_N */
410 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_97
, NATIVE
, DEEP
, NF1
),
413 PAD_CFG_GPI_TRIG_OWN(GPIO_98
, NONE
, DEEP
, OFF
, ACPI
),
415 /* GPIO_99 - *FST_SPI_MOSI_IO0 */
416 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99
, NATIVE
, DEEP
, NF1
),
418 /* GPIO_100 - *FST_SPI_MISO_IO1 */
419 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100
, NATIVE
, DEEP
, NF1
),
421 /* GPIO_101 - GPIO */
422 PAD_CFG_GPI_TRIG_OWN(GPIO_101
, NONE
, DEEP
, OFF
, ACPI
),
424 /* GPIO_102 - GPIO */
425 PAD_CFG_GPI_TRIG_OWN(GPIO_102
, NONE
, DEEP
, OFF
, ACPI
),
427 /* GPIO_103 - *FST_SPI_CLK */
428 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103
, NATIVE
, DEEP
, NF1
),
430 /* FST_SPI_CLK_FB - *n/a */
431 PAD_CFG_NF_IOSTANDBY_IGNORE(FST_SPI_CLK_FB
, NONE
, DEEP
, NF1
),
433 /* GPIO_104 - SIO_SPI_0_CLK */
434 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104
, DN_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
436 /* GPIO_105 - SIO_SPI_0_FS0 */
437 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
439 /* GPIO_106 - SIO_SPI_0_FS1 */
440 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
442 /* GPIO_109 - SIO_SPI_0_RXD */
443 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
445 /* GPIO_110 - SIO_SPI_0_TXD */
446 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
448 /* GPIO_111 - SIO_SPI_1_CLK */
449 PAD_CFG_NF(GPIO_111
, DN_20K
, DEEP
, NF1
),
451 /* GPIO_112 - SIO_SPI_1_FS0 */
452 PAD_CFG_NF(GPIO_112
, DN_20K
, DEEP
, NF1
),
454 /* GPIO_113 - SIO_SPI_1_FS1 */
455 PAD_CFG_NF(GPIO_113
, DN_20K
, DEEP
, NF1
),
457 /* GPIO_116 - SIO_SPI_1_RXD */
458 PAD_CFG_NF_IOSSTATE(GPIO_116
, DN_20K
, DEEP
, NF1
, HIZCRx0
),
460 /* GPIO_117 - SIO_SPI_1_TXD */
461 PAD_CFG_NF(GPIO_117
, DN_20K
, DEEP
, NF1
),
463 /* GPIO_118 - SIO_SPI_2_CLK */
464 PAD_CFG_NF(GPIO_118
, DN_20K
, DEEP
, NF1
),
466 /* GPIO_119 - SIO_SPI_2_FS0 */
467 PAD_CFG_NF(GPIO_119
, DN_20K
, DEEP
, NF1
),
469 /* GPIO_120 - SIO_SPI_2_FS1 */
470 PAD_CFG_NF(GPIO_120
, DN_20K
, DEEP
, NF1
),
472 /* GPIO_121 - SIO_SPI_2_FS2 */
473 PAD_CFG_NF(GPIO_121
, DN_20K
, DEEP
, NF1
),
475 /* GPIO_122 - SIO_SPI_2_RXD */
476 PAD_CFG_NF(GPIO_122
, DN_20K
, DEEP
, NF1
),
478 /* GPIO_123 - SIO_SPI_2_TXD */
479 PAD_CFG_NF(GPIO_123
, DN_20K
, DEEP
, NF1
),
481 /* ------- GPIO Group West ------- */
483 /* GPIO_124 - LPSS_I2C0_SDA */
484 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
486 /* GPIO_125 - LPSS_I2C0_SCL */
487 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
489 /* GPIO_126 - LPSS_I2C1_SDA */
490 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
492 /* GPIO_127 - LPSS_I2C1_SCL */
493 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
495 /* GPIO_128 - LPSS_I2C2_SDA */
496 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
498 /* GPIO_129 - LPSS_I2C2_SCL */
499 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
501 /* GPIO_130 - LPSS_I2C3_SDA */
502 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
504 /* GPIO_131 - LPSS_I2C3_SCL */
505 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
507 /* GPIO_132 - LPSS_I2C4_SDA */
508 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
510 /* GPIO_133 - LPSS_I2C4_SCL */
511 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133
, UP_1K
, DEEP
, NF1
, Tx1RxDCRx1
, ENPU
),
513 /* GPIO_134 - LPSS_I2C5_SDA */
514 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_134
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
516 /* GPIO_135 - LPSS_I2C5_SCL */
517 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_135
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
519 /* GPIO_136 - LPSS_I2C6_SDA */
520 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_136
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
522 /* GPIO_137 - LPSS_I2C6_SCL */
523 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_137
, UP_20K
, DEEP
, NF1
, HIZCRx0
, ENPD
),
525 /* GPIO_138 - LPSS_I2C7_SDA */
526 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138
, UP_1K
, DEEP
, NF1
, Tx0RxDCRx0
, ENPU
),
528 /* GPIO_139 - LPSS_I2C7_SCL */
529 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139
, UP_1K
, DEEP
, NF1
, Tx0RxDCRx0
, ENPU
),
531 /* GPIO_146 - AVS_I2S6_BCLK */
532 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_146
, DN_20K
, DEEP
, NF2
),
534 /* GPIO_147 - AVS_I2S6_WS_SYNC */
535 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_147
, DN_20K
, DEEP
, NF2
),
537 /* GPIO_148 - AVS_I2S6_SDI */
538 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_148
, DN_20K
, DEEP
, NF2
),
540 /* GPIO_149 - AVS_I2S6_SDO */
541 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_149
, DN_20K
, DEEP
, NF2
),
543 /* GPIO_150 - AVS_I2S5_BCLK */
544 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_150
, DN_20K
, DEEP
, NF2
, HIZCRx0
, ENPD
),
546 /* GPIO_151 - AVS_I2S5_WS_SYNC */
547 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151
, DN_20K
, DEEP
, NF2
, HIZCRx0
, ENPD
),
549 /* GPIO_152 - AVS_I2S5_SDI */
550 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_152
, DN_20K
, DEEP
, NF2
, HIZCRx0
, ENPD
),
552 /* GPIO_153 - AVS_I2S5_SDO */
553 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_153
, NONE
, DEEP
, NF2
, HIZCRx0
, ENPD
),
555 /* GPIO_154 - *GPIO */
556 PAD_CFG_GPI_TRIG_OWN(GPIO_154
, NONE
, DEEP
, OFF
, ACPI
),
558 /* GPIO_155 - SPKR */
559 PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_155
, DN_20K
, DEEP
, NF2
),
561 /* GPIO_209 - *PCIE_CLKREQ0_N */
562 PAD_CFG_NF(GPIO_209
, DN_20K
, DEEP
, NF1
),
564 /* GPIO_210 - *PCIE_CLKREQ1_N */
565 PAD_CFG_NF(GPIO_210
, DN_20K
, DEEP
, NF1
),
567 /* GPIO_211 - *PCIE_CLKREQ2_N */
568 PAD_CFG_NF(GPIO_211
, DN_20K
, DEEP
, NF1
),
570 /* GPIO_212 - *PCIE_CLKREQ3_N */
571 PAD_CFG_NF(GPIO_212
, DN_20K
, DEEP
, NF1
),
573 /* OSC_CLK_OUT_0 - *OSC_CLK_OUT_0 */
574 PAD_CFG_NF(OSC_CLK_OUT_0
, DN_20K
, DEEP
, NF1
),
576 /* OSC_CLK_OUT_1 - *OSC_CLK_OUT_1 */
577 PAD_CFG_NF(OSC_CLK_OUT_1
, DN_20K
, DEEP
, NF1
),
579 /* OSC_CLK_OUT_2 - *OSC_CLK_OUT_2 */
580 PAD_CFG_NF(OSC_CLK_OUT_2
, DN_20K
, DEEP
, NF1
),
582 /* OSC_CLK_OUT_3 - *OSC_CLK_OUT_3 */
583 PAD_CFG_NF(OSC_CLK_OUT_3
, DN_20K
, DEEP
, NF1
),
585 /* OSC_CLK_OUT_4 - GPIO */
586 PAD_CFG_GPI_TRIG_OWN(OSC_CLK_OUT_4
, NONE
, DEEP
, OFF
, ACPI
),
588 /* PMU_AC_PRESENT - *GPIO */
589 PAD_CFG_GPI_TRIG_OWN(PMU_AC_PRESENT
, NONE
, DEEP
, OFF
, ACPI
),
591 /* PMU_BATLOW_B - GPIO */
592 PAD_CFG_GPI_TRIG_OWN(PMU_BATLOW_B
, NONE
, DEEP
, OFF
, ACPI
),
594 /* PMU_PLTRST_B - *PMU_PLTRST_N */
595 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PLTRST_B
, NONE
, DEEP
, NF1
),
597 /* PMU_PWRBTN_B - *PMU_PWRBTN_N */
598 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PWRBTN_B
, UP_20K
, DEEP
, NF1
),
600 /* PMU_RESETBUTTON_B - *PMU_RSTBTN_N */
601 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_RESETBUTTON_B
, NONE
, DEEP
, NF1
),
603 /* PMU_SLP_S0_B - *PMU_SLP_S0_N */
604 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B
, NONE
, DEEP
, NF1
),
606 /* PMU_SLP_S3_B - *PMU_SLP_S3_N */
607 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S3_B
, NONE
, DEEP
, NF1
),
609 /* PMU_SLP_S4_B - *PMU_SLP_S4_N */
610 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S4_B
, NONE
, DEEP
, NF1
),
612 /* PMU_SUSCLK - *PMU_SUSCLK */
613 PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SUSCLK
, NONE
, DEEP
, NF1
),
615 /* PMU_WAKE_B - *GPIO */
616 PAD_CFG_GPO_IOSSTATE_IOSTERM(PMU_WAKE_B
, 1, DEEP
, UP_20K
, IGNORE
, SAME
),
618 /* SUS_STAT_B - *SUS_STAT_B */
619 PAD_CFG_NF_IOSTANDBY_IGNORE(SUS_STAT_B
, NONE
, DEEP
, NF1
),
621 /* SUSPWRDNACK - GPIO */
622 PAD_CFG_GPI_TRIG_OWN(SUSPWRDNACK
, NONE
, DEEP
, OFF
, ACPI
),
624 /* ------- GPIO Group South-West ------- */
626 /* GPIO_205 - PCIE_WAKE0_N */
627 PAD_CFG_NF(GPIO_205
, NONE
, DEEP
, NF1
),
629 /* GPIO_206 - PCIE_WAKE1_N */
630 PAD_CFG_NF(GPIO_206
, NONE
, DEEP
, NF1
),
632 /* GPIO_207 - PCIE_WAKE2_N */
633 PAD_CFG_NF(GPIO_207
, NONE
, DEEP
, NF1
),
635 /* GPIO_208 - PCIE_WAKE3_N */
636 PAD_CFG_NF(GPIO_208
, NONE
, DEEP
, NF1
),
638 /* GPIO_156 - *EMMC_CLK */
639 PAD_CFG_NF_IOSSTATE(GPIO_156
, DN_20K
, DEEP
, NF1
, Tx0RxDCRx0
),
641 /* GPIO_157 - *EMMC_D0 */
642 PAD_CFG_NF_IOSSTATE(GPIO_157
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
644 /* GPIO_158 - *EMMC_D1 */
645 PAD_CFG_NF_IOSSTATE(GPIO_158
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
647 /* GPIO_159 - *EMMC_D2 */
648 PAD_CFG_NF_IOSSTATE(GPIO_159
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
650 /* GPIO_160 - *EMMC_D3 */
651 PAD_CFG_NF_IOSSTATE(GPIO_160
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
653 /* GPIO_161 - *EMMC_D4 */
654 PAD_CFG_NF_IOSSTATE(GPIO_161
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
656 /* GPIO_162 - *EMMC_D5 */
657 PAD_CFG_NF_IOSSTATE(GPIO_162
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
659 /* GPIO_163 - *EMMC_D6 */
660 PAD_CFG_NF_IOSSTATE(GPIO_163
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
662 /* GPIO_164 - *EMMC_D7 */
663 PAD_CFG_NF_IOSSTATE(GPIO_164
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
665 /* GPIO_165 - *EMMC_CMD */
666 PAD_CFG_NF_IOSSTATE(GPIO_165
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
668 /* GPIO_166 - *GPIO */
669 PAD_CFG_GPIO_HI_Z(GPIO_166
, DN_20K
, DEEP
, TxLASTRxE
, SAME
),
671 /* GPIO_167 - *GPIO */
672 PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_167
, UP_20K
, DEEP
, OFF
, HIZCRx1
, ACPI
),
674 /* GPIO_168 - *GPIO */
675 PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_168
, UP_20K
, DEEP
, OFF
, HIZCRx1
, ACPI
),
677 /* GPIO_169 - *GPIO */
678 PAD_CFG_TERM_GPO(GPIO_169
, 0, UP_20K
, DEEP
),
680 /* GPIO_170 - *GPIO */
681 PAD_CFG_TERM_GPO(GPIO_170
, 1, UP_20K
, DEEP
),
683 /* GPIO_171 - *GPIO */
684 PAD_CFG_TERM_GPO(GPIO_171
, 1, UP_20K
, DEEP
),
686 /* GPIO_172 - SDCARD_CLK */
687 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_172
, DN_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
690 PAD_CFG_NF(GPIO_179
, DN_20K
, DEEP
, NF1
),
692 /* GPIO_173 - SDCARD_D0 */
693 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
695 /* GPIO_174 - SDCARD_D1 */
696 PAD_CFG_NF_IOSSTATE(GPIO_174
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
698 /* GPIO_175 - SDCARD_D2 */
699 PAD_CFG_NF_IOSSTATE(GPIO_175
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
701 /* GPIO_176 - SDCARD_D3 */
702 PAD_CFG_NF_IOSSTATE(GPIO_176
, UP_20K
, DEEP
, NF1
, HIZCRx1
),
704 /* GPIO_177 - SDCARD_CD_B */
705 PAD_CFG_NF(GPIO_177
, UP_20K
, DEEP
, NF1
),
707 /* GPIO_178 - SDCARD_CMD */
708 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_178
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
710 /* GPIO_186 - SDCARD_LVL_WP */
711 PAD_CFG_NF(GPIO_186
, UP_20K
, DEEP
, NF1
),
713 /* GPIO_182 - *EMMC_RCLK */
714 PAD_CFG_NF_IOSSTATE(GPIO_182
, DN_20K
, DEEP
, NF1
, HIZCRx0
),
716 /* GPIO_183 - GPIO */
717 PAD_CFG_TERM_GPO(GPIO_183
, 0, DN_20K
, DEEP
),
719 /* SMB_ALERTB - SMB_ALERT_N */
720 PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_ALERTB
, UP_20K
, DEEP
, NF1
),
722 /* SMB_CLK - SMB_CLK */
723 PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK
, UP_20K
, DEEP
, NF1
),
725 /* SMB_DATA - SMB_DATA */
726 PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA
, UP_20K
, DEEP
, NF1
),
730 * Note: It's unconfirmed if this redundancy to the bootblock table is necessary.
733 /* LPC_ILB_SERIRQ - LPC_ILB_SERIRQ */
734 PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ
, UP_20K
, DEEP
, NF1
),
736 /* LPC_CLKOUT0 - LPC_CLKOUT0 */
737 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT0
, NONE
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
739 /* LPC_CLKOUT1 - LPC_CLKOUT1 */
740 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1
, NONE
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
742 /* LPC_AD0 - LPC_AD0 */
743 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
745 /* LPC_AD1 - LPC_AD1 */
746 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
748 /* LPC_AD2 - LPC_AD2 */
749 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
751 /* LPC_AD3 - LPC_AD3 */
752 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
754 /* LPC_CLKRUNB - LPC_CLKRUNB */
755 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKRUNB
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
757 /* LPC_FRAMEB - LPC_FRAMEB */
758 PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
760 /* ------- GPIO Group North ------- */
764 * Note: It's unconfirmed if this redundancy to the bootblock table is necessary.
767 /* GPIO_38 - LPSS_UART0_RXD */
768 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
770 /* GPIO_39 - LPSS_UART0_TXD */
771 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39
, UP_20K
, DEEP
, NF1
, TxLASTRxE
, DISPUPD
),
773 /* GPIO_42 - LPSS_UART1_RXD */
774 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42
, UP_20K
, DEEP
, NF1
, HIZCRx1
, DISPUPD
),
776 /* GPIO_43 - LPSS_UART1_TXD */
777 PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43
, UP_20K
, DEEP
, NF1
, HIZCRx0
, DISPUPD
),
781 * Pad configuration to put MiniPCIe port into mSATA mode.
783 static const struct pad_config msata_mode_gpio_table
[] = {
784 /* ------- GPIO Group North-West ------- */
786 /* GPIO_213 - GPIO */
787 PAD_CFG_TERM_GPO(GPIO_213
, 0, UP_20K
, DEEP
),
790 #endif /* CFG_GPIO_H */