commonlib: Refactor CSE sync eventLog
[coreboot2.git] / src / northbridge / amd / pi / 00730F01 / Kconfig
blob46acb2d59dea5fb2ef5f78f97568bfd5351639ce
1 # SPDX-License-Identifier: GPL-2.0-only
3 config NORTHBRIDGE_AMD_PI_00730F01
4         bool
5         select USE_DDR3
7 if NORTHBRIDGE_AMD_PI_00730F01
9 config CHIPSET_DEVICETREE
10         string
11         default "northbridge/amd/pi/00730F01/chipset.cb"
13 config ECAM_MMCONF_BASE_ADDRESS
14         default 0xF8000000
16 config ECAM_MMCONF_BUS_NUMBER
17         default 64
19 config VGA_BIOS_ID
20         string
21         default "1002,9850"
22         help
23           The default VGA BIOS PCI vendor/device ID should be set to the
24           result of the map_oprom_vendev() function in northbridge.c.
26 config VGA_BIOS_FILE
27         string
28         default "3rdparty/blobs/northbridge/amd/00730F01/VBIOS.bin"
30 endif