src/northbridge/intel/i945/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0-only
   2
   3 config NORTHBRIDGE_INTEL_I945
   4         bool
   5         select HAVE_DEBUG_RAM_SETUP
   6         select VGA
   7         select INTEL_GMA_ACPI
   8         select INTEL_GMA_SSC_ALTERNATE_REF
   9         select INTEL_EDID
  10         select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
  11         select USE_DDR2
  12         select NEED_SMALL_2MB_PAGE_TABLES
  13
  14 if NORTHBRIDGE_INTEL_I945
  15
  16 config VBOOT
  17         select VBOOT_STARTS_IN_BOOTBLOCK
  18 config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
  19         def_bool n
  20 config NORTHBRIDGE_INTEL_SUBTYPE_I945GM
  21         def_bool n
  22
  23 config VGA_BIOS_ID
  24         string
  25         default "8086,27a2" if NORTHBRIDGE_INTEL_SUBTYPE_I945GM
  26         default "8086,2772" if NORTHBRIDGE_INTEL_SUBTYPE_I945GC
  27
  28 config I945_LVDS
  29         def_bool n
  30         select MAINBOARD_HAS_NATIVE_VGA_INIT
  31         select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
  32         help
  33           Selected by mainboards that use native graphics initialization
  34           for the LVDS port. A linear framebuffer is only supported for
  35           LVDS.
  36
  37 config ECAM_MMCONF_BASE_ADDRESS
  38         default 0xf0000000
  39
  40 config ECAM_MMCONF_BUS_NUMBER
  41         int
  42         default 64
  43
  44 # This number must be equal or lower than what's reported in ACPI PCI _CRS
  45 config DOMAIN_RESOURCE_32BIT_LIMIT
  46         default 0xfec00000
  47
  48 config OVERRIDE_CLOCK_DISABLE
  49         bool
  50         default n
  51         help
  52           Usually system firmware turns off system memory clock
  53           signals to unused SO-DIMM slots to reduce EMI and power
  54           consumption.
  55           However, some boards do not like unused clock signals to
  56           be disabled.
  57
  58 config MAXIMUM_SUPPORTED_FREQUENCY
  59         int
  60         default 0
  61         help
  62           If non-zero, this designates the maximum DDR frequency
  63           the board supports, despite what the chipset should be
  64           capable of.
  65
  66 config CHECK_SLFRCS_ON_RESUME
  67         def_bool n
  68         help
  69           On some boards it may be necessary to hard reset early
  70           during resume from S3 if the SLFRCS register indicates that
  71           a memory channel is not guaranteed to be in self-refresh.
  72           On other boards the check always creates a false positive,
  73           effectively making it impossible to resume.
  74
  75 config SMM_RESERVED_SIZE
  76         hex
  77         default 0x100000
  78
  79 config MAX_CPUS
  80         int
  81         default 4
  82
  83 config FIXED_MCHBAR_MMIO_BASE
  84         default 0xfed14000
  85
  86 config FIXED_DMIBAR_MMIO_BASE
  87         default 0xfed18000
  88
  89 config FIXED_EPBAR_MMIO_BASE
  90         default 0xfed19000
  91
  92 endif